Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

===================================================================
RCS file: /ftp/cvs/cvsroot/src/sys/arch/sparc64/include/psl.h,v
rcsdiff: /ftp/cvs/cvsroot/src/sys/arch/sparc64/include/psl.h,v: warning: Unknown phrases like `commitid ...;' are present.
retrieving revision 1.28
retrieving revision 1.28.2.2
diff -u -p -r1.28 -r1.28.2.2
--- src/sys/arch/sparc64/include/psl.h	2005/06/19 23:36:47	1.28
+++ src/sys/arch/sparc64/include/psl.h	2006/12/30 20:47:02	1.28.2.2
@@ -1,4 +1,4 @@
-/*	$NetBSD: psl.h,v 1.28 2005/06/19 23:36:47 thorpej Exp $ */
+/*	$NetBSD: psl.h,v 1.28.2.2 2006/12/30 20:47:02 yamt Exp $ */
 
 /*
  * Copyright (c) 1992, 1993
@@ -81,11 +81,12 @@
 #define PIL_TTY		6
 #define PIL_LPT		6
 #define PIL_NET		6
-#define PIL_IMP		7
+#define PIL_VM		7
 #define	PIL_AUD		8
 #define PIL_CLOCK	10
 #define PIL_FD		11
 #define PIL_SER		12
+#define	PIL_STATCLOCK	14
 #define PIL_HIGH	15
 #define PIL_SCHED	PIL_CLOCK
 #define PIL_LOCK	PIL_HIGH
@@ -255,14 +256,14 @@ getpstate(void)
 {
 	int pstate;
 
-	__asm __volatile("rdpr %%pstate,%0" : "=r" (pstate));
+	__asm volatile("rdpr %%pstate,%0" : "=r" (pstate));
 	return (pstate);
 }
 
 static __inline void
 setpstate(int newpstate)
 {
-	__asm __volatile("wrpr %0,0,%%pstate" : : "r" (newpstate));
+	__asm volatile("wrpr %0,0,%%pstate" : : "r" (newpstate));
 }
 
 static __inline int
@@ -270,14 +271,14 @@ getcwp(void)
 {
 	int cwp;
 
-	__asm __volatile("rdpr %%cwp,%0" : "=r" (cwp));
+	__asm volatile("rdpr %%cwp,%0" : "=r" (cwp));
 	return (cwp);
 }
 
 static __inline void
 setcwp(int newcwp)
 {
-	__asm __volatile("wrpr %0,0,%%cwp" : : "r" (newcwp));
+	__asm volatile("wrpr %0,0,%%cwp" : : "r" (newcwp));
 }
 
 static __inline uint64_t
@@ -285,7 +286,7 @@ getver(void)
 {
 	uint64_t ver;
 
-	__asm __volatile("rdpr %%ver,%0" : "=r" (ver));
+	__asm volatile("rdpr %%ver,%0" : "=r" (ver));
 	return (ver);
 }
 
@@ -309,7 +310,7 @@ intr_restore(int pstate)
  */
 
 #ifdef SPLDEBUG
-void prom_printf __P((const char *fmt, ...));
+void prom_printf(const char *fmt, ...);
 extern int printspl;
 #define SPLPRINT(x) \
 { \
@@ -324,9 +325,9 @@ extern int printspl;
 static __inline int name##X(const char* file, int line) \
 { \
 	int oldpil; \
-	__asm __volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
+	__asm volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
 	SPLPRINT(("{%s:%d %d=>%d}", file, line, oldpil, newpil)); \
-	__asm __volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil)); \
+	__asm volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil)); \
 	return (oldpil); \
 }
 /* A non-priority-decreasing version of SPL */
@@ -334,11 +335,11 @@ static __inline int name##X(const char* 
 static __inline int name##X(const char* file, int line) \
 { \
 	int oldpil; \
-	__asm __volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
+	__asm volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
 	if (newpil <= oldpil) \
 		return oldpil; \
 	SPLPRINT(("{%s:%d %d->!d}", file, line, oldpil, newpil)); \
-	__asm __volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil)); \
+	__asm volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil)); \
 	return (oldpil); \
 }
 
@@ -348,8 +349,8 @@ static __inline int name##X(const char* 
 static __inline int name(void) \
 { \
 	int oldpil; \
-	__asm __volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
-	__asm __volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil)); \
+	__asm volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
+	__asm volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil)); \
 	return (oldpil); \
 }
 /* A non-priority-decreasing version of SPL */
@@ -357,14 +358,43 @@ static __inline int name(void) \
 static __inline int name(void) \
 { \
 	int oldpil; \
-	__asm __volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
+	__asm volatile("rdpr %%pil,%0" : "=r" (oldpil)); \
 	if (newpil <= oldpil) \
 		return oldpil; \
-	__asm __volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil)); \
+	__asm volatile("wrpr %%g0,%0,%%pil" : : "n" (newpil)); \
 	return (oldpil); \
 }
 #endif
 
+typedef uint8_t ipl_t;
+typedef struct {
+	ipl_t _ipl;
+} ipl_cookie_t;
+
+static inline ipl_cookie_t
+makeiplcookie(ipl_t ipl)
+{
+
+	return (ipl_cookie_t){._ipl = ipl};
+}
+
+static __inline int __attribute__((__unused__))
+splraiseipl(ipl_cookie_t icookie)
+{
+	int newpil = icookie._ipl;
+	int oldpil;
+
+	/*
+	 * NetBSD/sparc64's IPL_* constants equate directly to the
+	 * corresponding PIL_* names; no need to map them here.
+	 */
+	__asm __volatile("rdpr %%pil,%0" : "=r" (oldpil));
+	if (newpil <= oldpil)
+		return (oldpil);
+	__asm __volatile("wrpr %0,0,%%pil" : : "r" (newpil));
+	return (oldpil);
+}
+
 SPL(spl0, 0)
 
 SPL(spllowersoftclock, 1)
@@ -396,7 +426,7 @@ SPLHOLD(spllpt, PIL_LPT)
 /*
  * Memory allocation (must be as high as highest network, tty, or disk device)
  */
-SPLHOLD(splvm, PIL_IMP)
+SPLHOLD(splvm, PIL_VM)
 
 SPLHOLD(splclock, PIL_CLOCK)
 
@@ -411,7 +441,7 @@ SPLHOLD(splserial, PIL_SER)
 SPLHOLD(splaudio, PIL_AUD)
 
 /* second sparc timer interrupts at level 14 */
-SPLHOLD(splstatclock, 14)
+SPLHOLD(splstatclock, PIL_STATCLOCK)
 
 SPLHOLD(splsched, PIL_SCHED)
 SPLHOLD(spllock, PIL_LOCK)
@@ -453,10 +483,10 @@ static __inline void splx(int newpil)
 #ifdef SPLDEBUG
 	int pil;
 
-	__asm __volatile("rdpr %%pil,%0" : "=r" (pil));
+	__asm volatile("rdpr %%pil,%0" : "=r" (pil));
 	SPLPRINT(("{%d->%d}", pil, newpil));
 #endif
-	__asm __volatile("wrpr %%g0,%0,%%pil" : : "rn" (newpil));
+	__asm volatile("wrpr %%g0,%0,%%pil" : : "rn" (newpil));
 }
 #endif /* KERNEL && !_LOCORE */