Annotation of src/sys/arch/sparc/sparc/locore.s, Revision 1.148.4.11
1.148.4.11! nathanw 1: /* $NetBSD: locore.s,v 1.148.4.10 2002/08/01 02:43:28 nathanw Exp $ */
1.148.4.2 pk 2:
3: /*
4: * Copyright (c) 1996 Paul Kranenburg
5: * Copyright (c) 1996
6: * The President and Fellows of Harvard College. All rights reserved.
7: * Copyright (c) 1992, 1993
8: * The Regents of the University of California. All rights reserved.
9: *
10: * This software was developed by the Computer Systems Engineering group
11: * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
12: * contributed to Berkeley.
13: *
14: * All advertising materials mentioning features or use of this software
15: * must display the following acknowledgement:
16: * This product includes software developed by the University of
17: * California, Lawrence Berkeley Laboratory.
18: * This product includes software developed by Harvard University.
19: *
20: * Redistribution and use in source and binary forms, with or without
21: * modification, are permitted provided that the following conditions
22: * are met:
23: * 1. Redistributions of source code must retain the above copyright
24: * notice, this list of conditions and the following disclaimer.
25: * 2. Redistributions in binary form must reproduce the above copyright
26: * notice, this list of conditions and the following disclaimer in the
27: * documentation and/or other materials provided with the distribution.
28: * 3. All advertising materials mentioning features or use of this software
29: * must display the following acknowledgement:
30: * This product includes software developed by the University of
31: * California, Berkeley and its contributors.
32: * This product includes software developed by Harvard University.
33: * This product includes software developed by Paul Kranenburg.
34: * 4. Neither the name of the University nor the names of its contributors
35: * may be used to endorse or promote products derived from this software
36: * without specific prior written permission.
37: *
38: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
39: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
40: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
41: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
42: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
43: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
44: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
45: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
46: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
47: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
48: * SUCH DAMAGE.
49: *
50: * @(#)locore.s 8.4 (Berkeley) 12/10/93
51: */
52:
53: #include "opt_ddb.h"
54: #include "opt_kgdb.h"
55: #include "opt_compat_svr4.h"
56: #include "opt_compat_sunos.h"
57: #include "opt_multiprocessor.h"
58: #include "opt_lockdebug.h"
59:
60: #include "assym.h"
61: #include <machine/param.h>
62: #include <machine/asm.h>
63: #include <sparc/sparc/intreg.h>
64: #include <sparc/sparc/timerreg.h>
65: #include <sparc/sparc/vaddrs.h>
66: #ifdef notyet
67: #include <sparc/dev/zsreg.h>
68: #endif
69: #include <machine/ctlreg.h>
70: #include <machine/psl.h>
71: #include <machine/signal.h>
72: #include <machine/trap.h>
73: #include <sys/syscall.h>
74:
75: /*
76: * GNU assembler does not understand `.empty' directive; Sun assembler
77: * gripes about labels without it. To allow cross-compilation using
78: * the Sun assembler, and because .empty directives are useful documentation,
79: * we use this trick.
80: */
81: #ifdef SUN_AS
82: #define EMPTY .empty
83: #else
84: #define EMPTY /* .empty */
85: #endif
86:
87: /* use as needed to align things on longword boundaries */
88: #define _ALIGN .align 4
89:
90: /*
91: * CCFSZ (C Compiler Frame SiZe) is the size of a stack frame required if
92: * a function is to call C code. It should be just 64, but Sun defined
93: * their frame with space to hold arguments 0 through 5 (plus some junk),
94: * and varargs routines (such as printf) demand this, and gcc uses this
95: * area at times anyway.
96: */
97: #define CCFSZ 96
98:
99: /*
100: * A handy macro for maintaining instrumentation counters.
101: * Note that this clobbers %o0 and %o1. Normal usage is
102: * something like:
103: * foointr:
104: * TRAP_SETUP(...) ! makes %o registers safe
105: * INCR(cnt+V_FOO) ! count a foo
106: */
107: #define INCR(what) \
108: sethi %hi(what), %o0; \
109: ld [%o0 + %lo(what)], %o1; \
110: inc %o1; \
111: st %o1, [%o0 + %lo(what)]
112:
113: /*
114: * Another handy macro: load one register window, given `base' address.
115: * This can be either a simple register (e.g., %sp) or include an initial
116: * offset (e.g., %g6 + PCB_RW).
117: */
118: #define LOADWIN(addr) \
119: ldd [addr], %l0; \
120: ldd [addr + 8], %l2; \
121: ldd [addr + 16], %l4; \
122: ldd [addr + 24], %l6; \
123: ldd [addr + 32], %i0; \
124: ldd [addr + 40], %i2; \
125: ldd [addr + 48], %i4; \
126: ldd [addr + 56], %i6
127:
128: /*
129: * To return from trap we need the two-instruction sequence
130: * `jmp %l1; rett %l2', which is defined here for convenience.
131: */
132: #define RETT jmp %l1; rett %l2
133:
134: .data
135: /*
136: * The interrupt stack.
137: *
138: * This is the very first thing in the data segment, and therefore has
139: * the lowest kernel stack address. We count on this in the interrupt
140: * trap-frame setup code, since we may need to switch from the kernel
141: * stack to the interrupt stack (iff we are not already on the interrupt
142: * stack). One sethi+cmp is all we need since this is so carefully
143: * arranged.
144: *
145: * In SMP kernels, each CPU has its own interrupt stack and the computation
146: * to determine whether we're already on the interrupt stack is slightly
147: * more time consuming (see INTR_SETUP() below).
148: */
149: .globl _C_LABEL(intstack)
150: .globl _C_LABEL(eintstack)
151: _C_LABEL(intstack):
152: .skip INT_STACK_SIZE ! 16k = 128 128-byte stack frames
153: _C_LABEL(eintstack):
154:
155: _EINTSTACKP = CPUINFO_VA + CPUINFO_EINTSTACK
156:
157: /*
158: * CPUINFO_VA is a CPU-local virtual address; cpi->ci_self is a global
159: * virtual address for the same structure. It must be stored in p->p_cpu
160: * upon context switch.
161: */
162: _CISELFP = CPUINFO_VA + CPUINFO_SELF
163: _CIFLAGS = CPUINFO_VA + CPUINFO_FLAGS
164:
165: /*
166: * When a process exits and its u. area goes away, we set cpcb to point
167: * to this `u.', leaving us with something to use for an interrupt stack,
168: * and letting all the register save code have a pcb_uw to examine.
169: * This is also carefully arranged (to come just before u0, so that
170: * process 0's kernel stack can quietly overrun into it during bootup, if
171: * we feel like doing that).
172: */
173: .globl _C_LABEL(idle_u)
174: _C_LABEL(idle_u):
175: .skip USPACE
176: /*
177: * On SMP kernels, there's an idle u-area for each CPU and we must
178: * read its location from cpuinfo.
179: */
180: IDLE_UP = CPUINFO_VA + CPUINFO_IDLE_U
181:
182: /*
183: * Process 0's u.
184: *
185: * This must be aligned on an 8 byte boundary.
186: */
187: .globl _C_LABEL(u0)
188: _C_LABEL(u0): .skip USPACE
189: estack0:
190:
191: #ifdef KGDB
192: /*
193: * Another item that must be aligned, easiest to put it here.
194: */
195: KGDB_STACK_SIZE = 2048
196: .globl _C_LABEL(kgdb_stack)
197: _C_LABEL(kgdb_stack):
198: .skip KGDB_STACK_SIZE ! hope this is enough
199: #endif
200:
201: /*
202: * cpcb points to the current pcb (and hence u. area).
203: * Initially this is the special one.
204: */
205: cpcb = CPUINFO_VA + CPUINFO_CURPCB
206:
1.148.4.10 nathanw 207: /* curlwp points to the current LWP that has the CPU */
208: curlwp = CPUINFO_VA + CPUINFO_CURLWP
1.148.4.2 pk 209:
210: /*
211: * cputyp is the current cpu type, used to distinguish between
212: * the many variations of different sun4* machines. It contains
213: * the value CPU_SUN4, CPU_SUN4C, or CPU_SUN4M.
214: */
215: .globl _C_LABEL(cputyp)
216: _C_LABEL(cputyp):
217: .word 1
218:
219: #if defined(SUN4C) || defined(SUN4M)
220: cputypval:
221: .asciz "sun4c"
222: .ascii " "
223: cputypvar:
224: .asciz "compatible"
225: _ALIGN
226: #endif
227:
228: /*
229: * There variables are pointed to by the cpp symbols PGSHIFT, NBPG,
230: * and PGOFSET.
231: */
232: .globl _C_LABEL(pgshift), _C_LABEL(nbpg), _C_LABEL(pgofset)
233: _C_LABEL(pgshift):
234: .word 0
235: _C_LABEL(nbpg):
236: .word 0
237: _C_LABEL(pgofset):
238: .word 0
239:
240: .globl _C_LABEL(trapbase)
241: _C_LABEL(trapbase):
242: .word 0
243:
244: #if 0
245: #if defined(SUN4M)
246: _mapme:
247: .asciz "0 0 f8000000 15c6a0 map-pages"
248: #endif
249: #endif
250:
1.148.4.11! nathanw 251: #if !defined(SUN4D)
! 252: sun4d_notsup:
! 253: .asciz "cr .( NetBSD/sparc: this kernel does not support the sun4d) cr"
! 254: #endif
1.148.4.2 pk 255: #if !defined(SUN4M)
256: sun4m_notsup:
257: .asciz "cr .( NetBSD/sparc: this kernel does not support the sun4m) cr"
258: #endif
259: #if !defined(SUN4C)
260: sun4c_notsup:
261: .asciz "cr .( NetBSD/sparc: this kernel does not support the sun4c) cr"
262: #endif
263: #if !defined(SUN4)
264: sun4_notsup:
265: ! the extra characters at the end are to ensure the zs fifo drains
266: ! before we halt. Sick, eh?
267: .asciz "NetBSD/sparc: this kernel does not support the sun4\n\r \b"
268: #endif
269: _ALIGN
270:
271: .text
272:
273: /*
274: * The first thing in the real text segment is the trap vector table,
275: * which must be aligned on a 4096 byte boundary. The text segment
276: * starts beyond page 0 of KERNBASE so that there is a red zone
277: * between user and kernel space. Since the boot ROM loads us at
278: * PROM_LOADADDR, it is far easier to start at KERNBASE+PROM_LOADADDR than to
279: * buck the trend. This is two or four pages in (depending on if
280: * pagesize is 8192 or 4096). We place two items in this area:
281: * the message buffer (phys addr 0) and the cpu_softc structure for
282: * the first processor in the system (phys addr 0x2000).
283: * Because the message buffer is in our "red zone" between user and
284: * kernel space we remap it in configure() to another location and
285: * invalidate the mapping at KERNBASE.
286: */
287:
288: /*
289: * Each trap has room for four instructions, of which one perforce must
290: * be a branch. On entry the hardware has copied pc and npc to %l1 and
291: * %l2 respectively. We use two more to read the psr into %l0, and to
292: * put the trap type value into %l3 (with a few exceptions below).
293: * We could read the trap type field of %tbr later in the code instead,
294: * but there is no need, and that would require more instructions
295: * (read+mask, vs 1 `mov' here).
296: *
297: * I used to generate these numbers by address arithmetic, but gas's
298: * expression evaluator has about as much sense as your average slug
299: * (oddly enough, the code looks about as slimy too). Thus, all the
300: * trap numbers are given as arguments to the trap macros. This means
301: * there is one line per trap. Sigh.
302: *
303: * Note that only the local registers may be used, since the trap
304: * window is potentially the last window. Its `in' registers are
305: * the previous window's outs (as usual), but more important, its
306: * `out' registers may be in use as the `topmost' window's `in' registers.
307: * The global registers are of course verboten (well, until we save
308: * them away).
309: *
310: * Hardware interrupt vectors can be `linked'---the linkage is to regular
311: * C code---or rewired to fast in-window handlers. The latter are good
312: * for unbuffered hardware like the Zilog serial chip and the AMD audio
313: * chip, where many interrupts can be handled trivially with pseudo-DMA or
314: * similar. Only one `fast' interrupt can be used per level, however, and
315: * direct and `fast' interrupts are incompatible. Routines in intr.c
316: * handle setting these, with optional paranoia.
317: */
318:
319: /* regular vectored traps */
320: #define VTRAP(type, label) \
321: mov (type), %l3; b label; mov %psr, %l0; nop
322:
323: /* hardware interrupts (can be linked or made `fast') */
324: #define HARDINT44C(lev) \
325: mov (lev), %l3; b _C_LABEL(sparc_interrupt44c); mov %psr, %l0; nop
326:
327: /* hardware interrupts (can be linked or made `fast') */
328: #define HARDINT4M(lev) \
329: mov (lev), %l3; b _C_LABEL(sparc_interrupt4m); mov %psr, %l0; nop
330:
331: /* software interrupts (may not be made direct, sorry---but you
332: should not be using them trivially anyway) */
333: #define SOFTINT44C(lev, bit) \
334: mov (lev), %l3; mov (bit), %l4; b softintr_sun44c; mov %psr, %l0
335:
336: /* There's no SOFTINT4M(): both hard and soft vector the same way */
337:
338: /* traps that just call trap() */
339: #define TRAP(type) VTRAP(type, slowtrap)
340:
341: /* architecturally undefined traps (cause panic) */
342: #define UTRAP(type) VTRAP(type, slowtrap)
343:
344: /* software undefined traps (may be replaced) */
345: #define STRAP(type) VTRAP(type, slowtrap)
346:
347: /* breakpoint acts differently under kgdb */
348: #ifdef KGDB
349: #define BPT VTRAP(T_BREAKPOINT, bpt)
350: #define BPT_KGDB_EXEC VTRAP(T_KGDB_EXEC, bpt)
351: #else
352: #define BPT TRAP(T_BREAKPOINT)
353: #define BPT_KGDB_EXEC TRAP(T_KGDB_EXEC)
354: #endif
355:
356: /* special high-speed 1-instruction-shaved-off traps (get nothing in %l3) */
357: #define SYSCALL b _C_LABEL(_syscall); mov %psr, %l0; nop; nop
358: #define WINDOW_OF b window_of; mov %psr, %l0; nop; nop
359: #define WINDOW_UF b window_uf; mov %psr, %l0; nop; nop
360: #ifdef notyet
361: #define ZS_INTERRUPT b zshard; mov %psr, %l0; nop; nop
362: #else
363: #define ZS_INTERRUPT44C HARDINT44C(12)
364: #define ZS_INTERRUPT4M HARDINT4M(12)
365: #endif
366:
367: .globl _ASM_LABEL(start), _C_LABEL(kernel_text)
368: _C_LABEL(kernel_text) = start ! for kvm_mkdb(8)
369: _ASM_LABEL(start):
370: /*
371: * Put sun4 traptable first, since it needs the most stringent aligment (8192)
372: */
373: #if defined(SUN4)
374: trapbase_sun4:
375: /* trap 0 is special since we cannot receive it */
376: b dostart; nop; nop; nop ! 00 = reset (fake)
377: VTRAP(T_TEXTFAULT, memfault_sun4) ! 01 = instr. fetch fault
378: TRAP(T_ILLINST) ! 02 = illegal instruction
379: TRAP(T_PRIVINST) ! 03 = privileged instruction
380: TRAP(T_FPDISABLED) ! 04 = fp instr, but EF bit off in psr
381: WINDOW_OF ! 05 = window overflow
382: WINDOW_UF ! 06 = window underflow
383: TRAP(T_ALIGN) ! 07 = address alignment error
384: VTRAP(T_FPE, fp_exception) ! 08 = fp exception
385: VTRAP(T_DATAFAULT, memfault_sun4) ! 09 = data fetch fault
386: TRAP(T_TAGOF) ! 0a = tag overflow
387: UTRAP(0x0b)
388: UTRAP(0x0c)
389: UTRAP(0x0d)
390: UTRAP(0x0e)
391: UTRAP(0x0f)
392: UTRAP(0x10)
393: SOFTINT44C(1, IE_L1) ! 11 = level 1 interrupt
394: HARDINT44C(2) ! 12 = level 2 interrupt
395: HARDINT44C(3) ! 13 = level 3 interrupt
396: SOFTINT44C(4, IE_L4) ! 14 = level 4 interrupt
397: HARDINT44C(5) ! 15 = level 5 interrupt
398: SOFTINT44C(6, IE_L6) ! 16 = level 6 interrupt
399: HARDINT44C(7) ! 17 = level 7 interrupt
400: HARDINT44C(8) ! 18 = level 8 interrupt
401: HARDINT44C(9) ! 19 = level 9 interrupt
402: HARDINT44C(10) ! 1a = level 10 interrupt
403: HARDINT44C(11) ! 1b = level 11 interrupt
404: ZS_INTERRUPT44C ! 1c = level 12 (zs) interrupt
405: HARDINT44C(13) ! 1d = level 13 interrupt
406: HARDINT44C(14) ! 1e = level 14 interrupt
407: VTRAP(15, nmi_sun4) ! 1f = nonmaskable interrupt
408: UTRAP(0x20)
409: UTRAP(0x21)
410: UTRAP(0x22)
411: UTRAP(0x23)
412: TRAP(T_CPDISABLED) ! 24 = coprocessor instr, EC bit off in psr
413: UTRAP(0x25)
414: UTRAP(0x26)
415: UTRAP(0x27)
416: TRAP(T_CPEXCEPTION) ! 28 = coprocessor exception
417: UTRAP(0x29)
418: UTRAP(0x2a)
419: UTRAP(0x2b)
420: UTRAP(0x2c)
421: UTRAP(0x2d)
422: UTRAP(0x2e)
423: UTRAP(0x2f)
424: UTRAP(0x30)
425: UTRAP(0x31)
426: UTRAP(0x32)
427: UTRAP(0x33)
428: UTRAP(0x34)
429: UTRAP(0x35)
430: UTRAP(0x36)
431: UTRAP(0x37)
432: UTRAP(0x38)
433: UTRAP(0x39)
434: UTRAP(0x3a)
435: UTRAP(0x3b)
436: UTRAP(0x3c)
437: UTRAP(0x3d)
438: UTRAP(0x3e)
439: UTRAP(0x3f)
440: UTRAP(0x40)
441: UTRAP(0x41)
442: UTRAP(0x42)
443: UTRAP(0x43)
444: UTRAP(0x44)
445: UTRAP(0x45)
446: UTRAP(0x46)
447: UTRAP(0x47)
448: UTRAP(0x48)
449: UTRAP(0x49)
450: UTRAP(0x4a)
451: UTRAP(0x4b)
452: UTRAP(0x4c)
453: UTRAP(0x4d)
454: UTRAP(0x4e)
455: UTRAP(0x4f)
456: UTRAP(0x50)
457: UTRAP(0x51)
458: UTRAP(0x52)
459: UTRAP(0x53)
460: UTRAP(0x54)
461: UTRAP(0x55)
462: UTRAP(0x56)
463: UTRAP(0x57)
464: UTRAP(0x58)
465: UTRAP(0x59)
466: UTRAP(0x5a)
467: UTRAP(0x5b)
468: UTRAP(0x5c)
469: UTRAP(0x5d)
470: UTRAP(0x5e)
471: UTRAP(0x5f)
472: UTRAP(0x60)
473: UTRAP(0x61)
474: UTRAP(0x62)
475: UTRAP(0x63)
476: UTRAP(0x64)
477: UTRAP(0x65)
478: UTRAP(0x66)
479: UTRAP(0x67)
480: UTRAP(0x68)
481: UTRAP(0x69)
482: UTRAP(0x6a)
483: UTRAP(0x6b)
484: UTRAP(0x6c)
485: UTRAP(0x6d)
486: UTRAP(0x6e)
487: UTRAP(0x6f)
488: UTRAP(0x70)
489: UTRAP(0x71)
490: UTRAP(0x72)
491: UTRAP(0x73)
492: UTRAP(0x74)
493: UTRAP(0x75)
494: UTRAP(0x76)
495: UTRAP(0x77)
496: UTRAP(0x78)
497: UTRAP(0x79)
498: UTRAP(0x7a)
499: UTRAP(0x7b)
500: UTRAP(0x7c)
501: UTRAP(0x7d)
502: UTRAP(0x7e)
503: UTRAP(0x7f)
504: SYSCALL ! 80 = sun syscall
505: BPT ! 81 = pseudo breakpoint instruction
506: TRAP(T_DIV0) ! 82 = divide by zero
507: TRAP(T_FLUSHWIN) ! 83 = flush windows
508: TRAP(T_CLEANWIN) ! 84 = provide clean windows
509: TRAP(T_RANGECHECK) ! 85 = ???
510: TRAP(T_FIXALIGN) ! 86 = fix up unaligned accesses
511: TRAP(T_INTOF) ! 87 = integer overflow
512: SYSCALL ! 88 = svr4 syscall
513: SYSCALL ! 89 = bsd syscall
514: BPT_KGDB_EXEC ! 8a = enter kernel gdb on kernel startup
515: STRAP(0x8b)
516: STRAP(0x8c)
517: STRAP(0x8d)
518: STRAP(0x8e)
519: STRAP(0x8f)
520: STRAP(0x90)
521: STRAP(0x91)
522: STRAP(0x92)
523: STRAP(0x93)
524: STRAP(0x94)
525: STRAP(0x95)
526: STRAP(0x96)
527: STRAP(0x97)
528: STRAP(0x98)
529: STRAP(0x99)
530: STRAP(0x9a)
531: STRAP(0x9b)
532: STRAP(0x9c)
533: STRAP(0x9d)
534: STRAP(0x9e)
535: STRAP(0x9f)
536: STRAP(0xa0)
537: STRAP(0xa1)
538: STRAP(0xa2)
539: STRAP(0xa3)
540: STRAP(0xa4)
541: STRAP(0xa5)
542: STRAP(0xa6)
543: STRAP(0xa7)
544: STRAP(0xa8)
545: STRAP(0xa9)
546: STRAP(0xaa)
547: STRAP(0xab)
548: STRAP(0xac)
549: STRAP(0xad)
550: STRAP(0xae)
551: STRAP(0xaf)
552: STRAP(0xb0)
553: STRAP(0xb1)
554: STRAP(0xb2)
555: STRAP(0xb3)
556: STRAP(0xb4)
557: STRAP(0xb5)
558: STRAP(0xb6)
559: STRAP(0xb7)
560: STRAP(0xb8)
561: STRAP(0xb9)
562: STRAP(0xba)
563: STRAP(0xbb)
564: STRAP(0xbc)
565: STRAP(0xbd)
566: STRAP(0xbe)
567: STRAP(0xbf)
568: STRAP(0xc0)
569: STRAP(0xc1)
570: STRAP(0xc2)
571: STRAP(0xc3)
572: STRAP(0xc4)
573: STRAP(0xc5)
574: STRAP(0xc6)
575: STRAP(0xc7)
576: STRAP(0xc8)
577: STRAP(0xc9)
578: STRAP(0xca)
579: STRAP(0xcb)
580: STRAP(0xcc)
581: STRAP(0xcd)
582: STRAP(0xce)
583: STRAP(0xcf)
584: STRAP(0xd0)
585: STRAP(0xd1)
586: STRAP(0xd2)
587: STRAP(0xd3)
588: STRAP(0xd4)
589: STRAP(0xd5)
590: STRAP(0xd6)
591: STRAP(0xd7)
592: STRAP(0xd8)
593: STRAP(0xd9)
594: STRAP(0xda)
595: STRAP(0xdb)
596: STRAP(0xdc)
597: STRAP(0xdd)
598: STRAP(0xde)
599: STRAP(0xdf)
600: STRAP(0xe0)
601: STRAP(0xe1)
602: STRAP(0xe2)
603: STRAP(0xe3)
604: STRAP(0xe4)
605: STRAP(0xe5)
606: STRAP(0xe6)
607: STRAP(0xe7)
608: STRAP(0xe8)
609: STRAP(0xe9)
610: STRAP(0xea)
611: STRAP(0xeb)
612: STRAP(0xec)
613: STRAP(0xed)
614: STRAP(0xee)
615: STRAP(0xef)
616: STRAP(0xf0)
617: STRAP(0xf1)
618: STRAP(0xf2)
619: STRAP(0xf3)
620: STRAP(0xf4)
621: STRAP(0xf5)
622: STRAP(0xf6)
623: STRAP(0xf7)
624: STRAP(0xf8)
625: STRAP(0xf9)
626: STRAP(0xfa)
627: STRAP(0xfb)
628: STRAP(0xfc)
629: STRAP(0xfd)
630: STRAP(0xfe)
631: STRAP(0xff)
632: #endif
633:
634: #if defined(SUN4C)
635: trapbase_sun4c:
636: /* trap 0 is special since we cannot receive it */
637: b dostart; nop; nop; nop ! 00 = reset (fake)
638: VTRAP(T_TEXTFAULT, memfault_sun4c) ! 01 = instr. fetch fault
639: TRAP(T_ILLINST) ! 02 = illegal instruction
640: TRAP(T_PRIVINST) ! 03 = privileged instruction
641: TRAP(T_FPDISABLED) ! 04 = fp instr, but EF bit off in psr
642: WINDOW_OF ! 05 = window overflow
643: WINDOW_UF ! 06 = window underflow
644: TRAP(T_ALIGN) ! 07 = address alignment error
645: VTRAP(T_FPE, fp_exception) ! 08 = fp exception
646: VTRAP(T_DATAFAULT, memfault_sun4c) ! 09 = data fetch fault
647: TRAP(T_TAGOF) ! 0a = tag overflow
648: UTRAP(0x0b)
649: UTRAP(0x0c)
650: UTRAP(0x0d)
651: UTRAP(0x0e)
652: UTRAP(0x0f)
653: UTRAP(0x10)
654: SOFTINT44C(1, IE_L1) ! 11 = level 1 interrupt
655: HARDINT44C(2) ! 12 = level 2 interrupt
656: HARDINT44C(3) ! 13 = level 3 interrupt
657: SOFTINT44C(4, IE_L4) ! 14 = level 4 interrupt
658: HARDINT44C(5) ! 15 = level 5 interrupt
659: SOFTINT44C(6, IE_L6) ! 16 = level 6 interrupt
660: HARDINT44C(7) ! 17 = level 7 interrupt
661: HARDINT44C(8) ! 18 = level 8 interrupt
662: HARDINT44C(9) ! 19 = level 9 interrupt
663: HARDINT44C(10) ! 1a = level 10 interrupt
664: HARDINT44C(11) ! 1b = level 11 interrupt
665: ZS_INTERRUPT44C ! 1c = level 12 (zs) interrupt
666: HARDINT44C(13) ! 1d = level 13 interrupt
667: HARDINT44C(14) ! 1e = level 14 interrupt
668: VTRAP(15, nmi_sun4c) ! 1f = nonmaskable interrupt
669: UTRAP(0x20)
670: UTRAP(0x21)
671: UTRAP(0x22)
672: UTRAP(0x23)
673: TRAP(T_CPDISABLED) ! 24 = coprocessor instr, EC bit off in psr
674: UTRAP(0x25)
675: UTRAP(0x26)
676: UTRAP(0x27)
677: TRAP(T_CPEXCEPTION) ! 28 = coprocessor exception
678: UTRAP(0x29)
679: UTRAP(0x2a)
680: UTRAP(0x2b)
681: UTRAP(0x2c)
682: UTRAP(0x2d)
683: UTRAP(0x2e)
684: UTRAP(0x2f)
685: UTRAP(0x30)
686: UTRAP(0x31)
687: UTRAP(0x32)
688: UTRAP(0x33)
689: UTRAP(0x34)
690: UTRAP(0x35)
691: UTRAP(0x36)
692: UTRAP(0x37)
693: UTRAP(0x38)
694: UTRAP(0x39)
695: UTRAP(0x3a)
696: UTRAP(0x3b)
697: UTRAP(0x3c)
698: UTRAP(0x3d)
699: UTRAP(0x3e)
700: UTRAP(0x3f)
701: UTRAP(0x40)
702: UTRAP(0x41)
703: UTRAP(0x42)
704: UTRAP(0x43)
705: UTRAP(0x44)
706: UTRAP(0x45)
707: UTRAP(0x46)
708: UTRAP(0x47)
709: UTRAP(0x48)
710: UTRAP(0x49)
711: UTRAP(0x4a)
712: UTRAP(0x4b)
713: UTRAP(0x4c)
714: UTRAP(0x4d)
715: UTRAP(0x4e)
716: UTRAP(0x4f)
717: UTRAP(0x50)
718: UTRAP(0x51)
719: UTRAP(0x52)
720: UTRAP(0x53)
721: UTRAP(0x54)
722: UTRAP(0x55)
723: UTRAP(0x56)
724: UTRAP(0x57)
725: UTRAP(0x58)
726: UTRAP(0x59)
727: UTRAP(0x5a)
728: UTRAP(0x5b)
729: UTRAP(0x5c)
730: UTRAP(0x5d)
731: UTRAP(0x5e)
732: UTRAP(0x5f)
733: UTRAP(0x60)
734: UTRAP(0x61)
735: UTRAP(0x62)
736: UTRAP(0x63)
737: UTRAP(0x64)
738: UTRAP(0x65)
739: UTRAP(0x66)
740: UTRAP(0x67)
741: UTRAP(0x68)
742: UTRAP(0x69)
743: UTRAP(0x6a)
744: UTRAP(0x6b)
745: UTRAP(0x6c)
746: UTRAP(0x6d)
747: UTRAP(0x6e)
748: UTRAP(0x6f)
749: UTRAP(0x70)
750: UTRAP(0x71)
751: UTRAP(0x72)
752: UTRAP(0x73)
753: UTRAP(0x74)
754: UTRAP(0x75)
755: UTRAP(0x76)
756: UTRAP(0x77)
757: UTRAP(0x78)
758: UTRAP(0x79)
759: UTRAP(0x7a)
760: UTRAP(0x7b)
761: UTRAP(0x7c)
762: UTRAP(0x7d)
763: UTRAP(0x7e)
764: UTRAP(0x7f)
765: SYSCALL ! 80 = sun syscall
766: BPT ! 81 = pseudo breakpoint instruction
767: TRAP(T_DIV0) ! 82 = divide by zero
768: TRAP(T_FLUSHWIN) ! 83 = flush windows
769: TRAP(T_CLEANWIN) ! 84 = provide clean windows
770: TRAP(T_RANGECHECK) ! 85 = ???
771: TRAP(T_FIXALIGN) ! 86 = fix up unaligned accesses
772: TRAP(T_INTOF) ! 87 = integer overflow
773: SYSCALL ! 88 = svr4 syscall
774: SYSCALL ! 89 = bsd syscall
775: BPT_KGDB_EXEC ! 8a = enter kernel gdb on kernel startup
776: STRAP(0x8b)
777: STRAP(0x8c)
778: STRAP(0x8d)
779: STRAP(0x8e)
780: STRAP(0x8f)
781: STRAP(0x90)
782: STRAP(0x91)
783: STRAP(0x92)
784: STRAP(0x93)
785: STRAP(0x94)
786: STRAP(0x95)
787: STRAP(0x96)
788: STRAP(0x97)
789: STRAP(0x98)
790: STRAP(0x99)
791: STRAP(0x9a)
792: STRAP(0x9b)
793: STRAP(0x9c)
794: STRAP(0x9d)
795: STRAP(0x9e)
796: STRAP(0x9f)
797: STRAP(0xa0)
798: STRAP(0xa1)
799: STRAP(0xa2)
800: STRAP(0xa3)
801: STRAP(0xa4)
802: STRAP(0xa5)
803: STRAP(0xa6)
804: STRAP(0xa7)
805: STRAP(0xa8)
806: STRAP(0xa9)
807: STRAP(0xaa)
808: STRAP(0xab)
809: STRAP(0xac)
810: STRAP(0xad)
811: STRAP(0xae)
812: STRAP(0xaf)
813: STRAP(0xb0)
814: STRAP(0xb1)
815: STRAP(0xb2)
816: STRAP(0xb3)
817: STRAP(0xb4)
818: STRAP(0xb5)
819: STRAP(0xb6)
820: STRAP(0xb7)
821: STRAP(0xb8)
822: STRAP(0xb9)
823: STRAP(0xba)
824: STRAP(0xbb)
825: STRAP(0xbc)
826: STRAP(0xbd)
827: STRAP(0xbe)
828: STRAP(0xbf)
829: STRAP(0xc0)
830: STRAP(0xc1)
831: STRAP(0xc2)
832: STRAP(0xc3)
833: STRAP(0xc4)
834: STRAP(0xc5)
835: STRAP(0xc6)
836: STRAP(0xc7)
837: STRAP(0xc8)
838: STRAP(0xc9)
839: STRAP(0xca)
840: STRAP(0xcb)
841: STRAP(0xcc)
842: STRAP(0xcd)
843: STRAP(0xce)
844: STRAP(0xcf)
845: STRAP(0xd0)
846: STRAP(0xd1)
847: STRAP(0xd2)
848: STRAP(0xd3)
849: STRAP(0xd4)
850: STRAP(0xd5)
851: STRAP(0xd6)
852: STRAP(0xd7)
853: STRAP(0xd8)
854: STRAP(0xd9)
855: STRAP(0xda)
856: STRAP(0xdb)
857: STRAP(0xdc)
858: STRAP(0xdd)
859: STRAP(0xde)
860: STRAP(0xdf)
861: STRAP(0xe0)
862: STRAP(0xe1)
863: STRAP(0xe2)
864: STRAP(0xe3)
865: STRAP(0xe4)
866: STRAP(0xe5)
867: STRAP(0xe6)
868: STRAP(0xe7)
869: STRAP(0xe8)
870: STRAP(0xe9)
871: STRAP(0xea)
872: STRAP(0xeb)
873: STRAP(0xec)
874: STRAP(0xed)
875: STRAP(0xee)
876: STRAP(0xef)
877: STRAP(0xf0)
878: STRAP(0xf1)
879: STRAP(0xf2)
880: STRAP(0xf3)
881: STRAP(0xf4)
882: STRAP(0xf5)
883: STRAP(0xf6)
884: STRAP(0xf7)
885: STRAP(0xf8)
886: STRAP(0xf9)
887: STRAP(0xfa)
888: STRAP(0xfb)
889: STRAP(0xfc)
890: STRAP(0xfd)
891: STRAP(0xfe)
892: STRAP(0xff)
893: #endif
894:
895: #if defined(SUN4M)
896: trapbase_sun4m:
897: /* trap 0 is special since we cannot receive it */
898: b dostart; nop; nop; nop ! 00 = reset (fake)
899: VTRAP(T_TEXTFAULT, memfault_sun4m) ! 01 = instr. fetch fault
900: TRAP(T_ILLINST) ! 02 = illegal instruction
901: TRAP(T_PRIVINST) ! 03 = privileged instruction
902: TRAP(T_FPDISABLED) ! 04 = fp instr, but EF bit off in psr
903: WINDOW_OF ! 05 = window overflow
904: WINDOW_UF ! 06 = window underflow
905: TRAP(T_ALIGN) ! 07 = address alignment error
906: VTRAP(T_FPE, fp_exception) ! 08 = fp exception
907: VTRAP(T_DATAFAULT, memfault_sun4m) ! 09 = data fetch fault
908: TRAP(T_TAGOF) ! 0a = tag overflow
909: UTRAP(0x0b)
910: UTRAP(0x0c)
911: UTRAP(0x0d)
912: UTRAP(0x0e)
913: UTRAP(0x0f)
914: UTRAP(0x10)
915: HARDINT4M(1) ! 11 = level 1 interrupt
916: HARDINT4M(2) ! 12 = level 2 interrupt
917: HARDINT4M(3) ! 13 = level 3 interrupt
918: HARDINT4M(4) ! 14 = level 4 interrupt
919: HARDINT4M(5) ! 15 = level 5 interrupt
920: HARDINT4M(6) ! 16 = level 6 interrupt
921: HARDINT4M(7) ! 17 = level 7 interrupt
922: HARDINT4M(8) ! 18 = level 8 interrupt
923: HARDINT4M(9) ! 19 = level 9 interrupt
924: HARDINT4M(10) ! 1a = level 10 interrupt
925: HARDINT4M(11) ! 1b = level 11 interrupt
926: ZS_INTERRUPT4M ! 1c = level 12 (zs) interrupt
927: HARDINT4M(13) ! 1d = level 13 interrupt
928: HARDINT4M(14) ! 1e = level 14 interrupt
929: VTRAP(15, nmi_sun4m) ! 1f = nonmaskable interrupt
930: UTRAP(0x20)
931: UTRAP(0x21)
932: UTRAP(0x22)
933: UTRAP(0x23)
934: TRAP(T_CPDISABLED) ! 24 = coprocessor instr, EC bit off in psr
935: UTRAP(0x25)
936: UTRAP(0x26)
937: UTRAP(0x27)
938: TRAP(T_CPEXCEPTION) ! 28 = coprocessor exception
939: UTRAP(0x29)
940: UTRAP(0x2a)
941: VTRAP(T_STOREBUFFAULT, memfault_sun4m) ! 2b = SuperSPARC store buffer fault
942: UTRAP(0x2c)
943: UTRAP(0x2d)
944: UTRAP(0x2e)
945: UTRAP(0x2f)
946: UTRAP(0x30)
947: UTRAP(0x31)
948: UTRAP(0x32)
949: UTRAP(0x33)
950: UTRAP(0x34)
951: UTRAP(0x35)
952: UTRAP(0x36)
953: UTRAP(0x37)
954: UTRAP(0x38)
955: UTRAP(0x39)
956: UTRAP(0x3a)
957: UTRAP(0x3b)
958: UTRAP(0x3c)
959: UTRAP(0x3d)
960: UTRAP(0x3e)
961: UTRAP(0x3f)
962: UTRAP(0x40)
963: UTRAP(0x41)
964: UTRAP(0x42)
965: UTRAP(0x43)
966: UTRAP(0x44)
967: UTRAP(0x45)
968: UTRAP(0x46)
969: UTRAP(0x47)
970: UTRAP(0x48)
971: UTRAP(0x49)
972: UTRAP(0x4a)
973: UTRAP(0x4b)
974: UTRAP(0x4c)
975: UTRAP(0x4d)
976: UTRAP(0x4e)
977: UTRAP(0x4f)
978: UTRAP(0x50)
979: UTRAP(0x51)
980: UTRAP(0x52)
981: UTRAP(0x53)
982: UTRAP(0x54)
983: UTRAP(0x55)
984: UTRAP(0x56)
985: UTRAP(0x57)
986: UTRAP(0x58)
987: UTRAP(0x59)
988: UTRAP(0x5a)
989: UTRAP(0x5b)
990: UTRAP(0x5c)
991: UTRAP(0x5d)
992: UTRAP(0x5e)
993: UTRAP(0x5f)
994: UTRAP(0x60)
995: UTRAP(0x61)
996: UTRAP(0x62)
997: UTRAP(0x63)
998: UTRAP(0x64)
999: UTRAP(0x65)
1000: UTRAP(0x66)
1001: UTRAP(0x67)
1002: UTRAP(0x68)
1003: UTRAP(0x69)
1004: UTRAP(0x6a)
1005: UTRAP(0x6b)
1006: UTRAP(0x6c)
1007: UTRAP(0x6d)
1008: UTRAP(0x6e)
1009: UTRAP(0x6f)
1010: UTRAP(0x70)
1011: UTRAP(0x71)
1012: UTRAP(0x72)
1013: UTRAP(0x73)
1014: UTRAP(0x74)
1015: UTRAP(0x75)
1016: UTRAP(0x76)
1017: UTRAP(0x77)
1018: UTRAP(0x78)
1019: UTRAP(0x79)
1020: UTRAP(0x7a)
1021: UTRAP(0x7b)
1022: UTRAP(0x7c)
1023: UTRAP(0x7d)
1024: UTRAP(0x7e)
1025: UTRAP(0x7f)
1026: SYSCALL ! 80 = sun syscall
1027: BPT ! 81 = pseudo breakpoint instruction
1028: TRAP(T_DIV0) ! 82 = divide by zero
1029: TRAP(T_FLUSHWIN) ! 83 = flush windows
1030: TRAP(T_CLEANWIN) ! 84 = provide clean windows
1031: TRAP(T_RANGECHECK) ! 85 = ???
1032: TRAP(T_FIXALIGN) ! 86 = fix up unaligned accesses
1033: TRAP(T_INTOF) ! 87 = integer overflow
1034: SYSCALL ! 88 = svr4 syscall
1035: SYSCALL ! 89 = bsd syscall
1036: BPT_KGDB_EXEC ! 8a = enter kernel gdb on kernel startup
1037: STRAP(0x8b)
1038: STRAP(0x8c)
1039: STRAP(0x8d)
1040: STRAP(0x8e)
1041: STRAP(0x8f)
1042: STRAP(0x90)
1043: STRAP(0x91)
1044: STRAP(0x92)
1045: STRAP(0x93)
1046: STRAP(0x94)
1047: STRAP(0x95)
1048: STRAP(0x96)
1049: STRAP(0x97)
1050: STRAP(0x98)
1051: STRAP(0x99)
1052: STRAP(0x9a)
1053: STRAP(0x9b)
1054: STRAP(0x9c)
1055: STRAP(0x9d)
1056: STRAP(0x9e)
1057: STRAP(0x9f)
1058: STRAP(0xa0)
1059: STRAP(0xa1)
1060: STRAP(0xa2)
1061: STRAP(0xa3)
1062: STRAP(0xa4)
1063: STRAP(0xa5)
1064: STRAP(0xa6)
1065: STRAP(0xa7)
1066: STRAP(0xa8)
1067: STRAP(0xa9)
1068: STRAP(0xaa)
1069: STRAP(0xab)
1070: STRAP(0xac)
1071: STRAP(0xad)
1072: STRAP(0xae)
1073: STRAP(0xaf)
1074: STRAP(0xb0)
1075: STRAP(0xb1)
1076: STRAP(0xb2)
1077: STRAP(0xb3)
1078: STRAP(0xb4)
1079: STRAP(0xb5)
1080: STRAP(0xb6)
1081: STRAP(0xb7)
1082: STRAP(0xb8)
1083: STRAP(0xb9)
1084: STRAP(0xba)
1085: STRAP(0xbb)
1086: STRAP(0xbc)
1087: STRAP(0xbd)
1088: STRAP(0xbe)
1089: STRAP(0xbf)
1090: STRAP(0xc0)
1091: STRAP(0xc1)
1092: STRAP(0xc2)
1093: STRAP(0xc3)
1094: STRAP(0xc4)
1095: STRAP(0xc5)
1096: STRAP(0xc6)
1097: STRAP(0xc7)
1098: STRAP(0xc8)
1099: STRAP(0xc9)
1100: STRAP(0xca)
1101: STRAP(0xcb)
1102: STRAP(0xcc)
1103: STRAP(0xcd)
1104: STRAP(0xce)
1105: STRAP(0xcf)
1106: STRAP(0xd0)
1107: STRAP(0xd1)
1108: STRAP(0xd2)
1109: STRAP(0xd3)
1110: STRAP(0xd4)
1111: STRAP(0xd5)
1112: STRAP(0xd6)
1113: STRAP(0xd7)
1114: STRAP(0xd8)
1115: STRAP(0xd9)
1116: STRAP(0xda)
1117: STRAP(0xdb)
1118: STRAP(0xdc)
1119: STRAP(0xdd)
1120: STRAP(0xde)
1121: STRAP(0xdf)
1122: STRAP(0xe0)
1123: STRAP(0xe1)
1124: STRAP(0xe2)
1125: STRAP(0xe3)
1126: STRAP(0xe4)
1127: STRAP(0xe5)
1128: STRAP(0xe6)
1129: STRAP(0xe7)
1130: STRAP(0xe8)
1131: STRAP(0xe9)
1132: STRAP(0xea)
1133: STRAP(0xeb)
1134: STRAP(0xec)
1135: STRAP(0xed)
1136: STRAP(0xee)
1137: STRAP(0xef)
1138: STRAP(0xf0)
1139: STRAP(0xf1)
1140: STRAP(0xf2)
1141: STRAP(0xf3)
1142: STRAP(0xf4)
1143: STRAP(0xf5)
1144: STRAP(0xf6)
1145: STRAP(0xf7)
1146: STRAP(0xf8)
1147: STRAP(0xf9)
1148: STRAP(0xfa)
1149: STRAP(0xfb)
1150: STRAP(0xfc)
1151: STRAP(0xfd)
1152: STRAP(0xfe)
1153: STRAP(0xff)
1154: #endif
1155:
1156: /*
1157: * Pad the trap table to max page size.
1158: * Trap table size is 0x100 * 4instr * 4byte/instr = 4096 bytes;
1159: * need to .skip 4096 to pad to page size iff. the number of trap tables
1160: * defined above is odd.
1161: */
1162: #if (defined(SUN4) + defined(SUN4C) + defined(SUN4M)) % 2 == 1
1163: .skip 4096
1164: #endif
1165:
1166: #ifdef DEBUG
1167: /*
1168: * A hardware red zone is impossible. We simulate one in software by
1169: * keeping a `red zone' pointer; if %sp becomes less than this, we panic.
1170: * This is expensive and is only enabled when debugging.
1171: */
1172:
1173: /* `redzone' is located in the per-CPU information structure */
1174: _redzone = CPUINFO_VA + CPUINFO_REDZONE
1175: .data
1176: #define REDSTACK 2048 /* size of `panic: stack overflow' region */
1177: _redstack:
1178: .skip REDSTACK
1179: .text
1180: Lpanic_red:
1181: .asciz "stack overflow"
1182: _ALIGN
1183:
1184: /* set stack pointer redzone to base+minstack; alters base */
1185: #define SET_SP_REDZONE(base, tmp) \
1186: add base, REDSIZE, base; \
1187: sethi %hi(_redzone), tmp; \
1188: st base, [tmp + %lo(_redzone)]
1189:
1190: /* variant with a constant */
1191: #define SET_SP_REDZONE_CONST(const, tmp1, tmp2) \
1192: set (const) + REDSIZE, tmp1; \
1193: sethi %hi(_redzone), tmp2; \
1194: st tmp1, [tmp2 + %lo(_redzone)]
1195:
1196: /* variant with a variable & offset */
1197: #define SET_SP_REDZONE_VAR(var, offset, tmp1, tmp2) \
1198: sethi %hi(var), tmp1; \
1199: ld [tmp1 + %lo(var)], tmp1; \
1200: sethi %hi(offset), tmp2; \
1201: add tmp1, tmp2, tmp1; \
1202: SET_SP_REDZONE(tmp1, tmp2)
1203:
1204: /* check stack pointer against redzone (uses two temps) */
1205: #define CHECK_SP_REDZONE(t1, t2) \
1206: sethi %hi(_redzone), t1; \
1207: ld [t1 + %lo(_redzone)], t2; \
1208: cmp %sp, t2; /* if sp >= t2, not in red zone */ \
1209: bgeu 7f; nop; /* and can continue normally */ \
1210: /* move to panic stack */ \
1211: st %g0, [t1 + %lo(_redzone)]; \
1212: set _redstack + REDSTACK - 96, %sp; \
1213: /* prevent panic() from lowering ipl */ \
1214: sethi %hi(_C_LABEL(panicstr)), t2; \
1215: set Lpanic_red, t2; \
1216: st t2, [t1 + %lo(_C_LABEL(panicstr))]; \
1217: rd %psr, t1; /* t1 = splhigh() */ \
1218: or t1, PSR_PIL, t2; \
1219: wr t2, 0, %psr; \
1220: wr t2, PSR_ET, %psr; /* turn on traps */ \
1221: nop; nop; nop; \
1222: save %sp, -CCFSZ, %sp; /* preserve current window */ \
1223: sethi %hi(Lpanic_red), %o0; \
1224: call _C_LABEL(panic); or %o0, %lo(Lpanic_red), %o0; \
1225: 7:
1226:
1227: #else
1228:
1229: #define SET_SP_REDZONE(base, tmp)
1230: #define SET_SP_REDZONE_CONST(const, t1, t2)
1231: #define SET_SP_REDZONE_VAR(var, offset, t1, t2)
1232: #define CHECK_SP_REDZONE(t1, t2)
1233: #endif /* DEBUG */
1234:
1235: /*
1236: * The window code must verify user stack addresses before using them.
1237: * A user stack pointer is invalid if:
1238: * - it is not on an 8 byte boundary;
1239: * - its pages (a register window, being 64 bytes, can occupy
1240: * two pages) are not readable or writable.
1241: * We define three separate macros here for testing user stack addresses.
1242: *
1243: * PTE_OF_ADDR locates a PTE, branching to a `bad address'
1244: * handler if the stack pointer points into the hole in the
1245: * address space (i.e., top 3 bits are not either all 1 or all 0);
1246: * CMP_PTE_USER_READ compares the located PTE against `user read' mode;
1247: * CMP_PTE_USER_WRITE compares the located PTE against `user write' mode.
1248: * The compares give `equal' if read or write is OK.
1249: *
1250: * Note that the user stack pointer usually points into high addresses
1251: * (top 3 bits all 1), so that is what we check first.
1252: *
1253: * The code below also assumes that PTE_OF_ADDR is safe in a delay
1254: * slot; it is, at it merely sets its `pte' register to a temporary value.
1255: */
1256: #if defined(SUN4) || defined(SUN4C)
1257: /* input: addr, output: pte; aux: bad address label */
1258: #define PTE_OF_ADDR4_4C(addr, pte, bad, page_offset) \
1259: sra addr, PG_VSHIFT, pte; \
1260: cmp pte, -1; \
1261: be,a 1f; andn addr, page_offset, pte; \
1262: tst pte; \
1263: bne bad; EMPTY; \
1264: andn addr, page_offset, pte; \
1265: 1:
1266:
1267: /* input: pte; output: condition codes */
1268: #define CMP_PTE_USER_READ4_4C(pte) \
1269: lda [pte] ASI_PTE, pte; \
1270: srl pte, PG_PROTSHIFT, pte; \
1271: andn pte, (PG_W >> PG_PROTSHIFT), pte; \
1272: cmp pte, PG_PROTUREAD
1273:
1274: /* input: pte; output: condition codes */
1275: #define CMP_PTE_USER_WRITE4_4C(pte) \
1276: lda [pte] ASI_PTE, pte; \
1277: srl pte, PG_PROTSHIFT, pte; \
1278: cmp pte, PG_PROTUWRITE
1279: #endif
1280:
1281: /*
1282: * The Sun4M does not have the memory hole that the 4C does. Thus all
1283: * we need to do here is clear the page offset from addr.
1284: */
1285: #if defined(SUN4M)
1286: #define PTE_OF_ADDR4M(addr, pte, bad, page_offset) \
1287: andn addr, page_offset, pte
1288:
1289: /*
1290: * After obtaining the PTE through ASI_SRMMUFP, we read the Sync Fault
1291: * Status register. This is necessary on Hypersparcs which stores and
1292: * locks the fault address and status registers if the translation
1293: * fails (thanks to Chris Torek for finding this quirk).
1294: */
1295: /* note: pmap currently does not use the PPROT_R_R and PPROT_RW_RW cases */
1296: #define CMP_PTE_USER_READ4M(pte, tmp) \
1297: or pte, ASI_SRMMUFP_L3, pte; \
1298: lda [pte] ASI_SRMMUFP, pte; \
1299: set SRMMU_SFSR, tmp; \
1300: and pte, (SRMMU_TETYPE | SRMMU_PROT_MASK), pte; \
1301: cmp pte, (SRMMU_TEPTE | PPROT_RWX_RWX); \
1302: be 8f; \
1303: lda [tmp] ASI_SRMMU, %g0; \
1304: cmp pte, (SRMMU_TEPTE | PPROT_RX_RX); \
1305: 8:
1306:
1307:
1308: /* note: PTE bit 4 set implies no user writes */
1309: #define CMP_PTE_USER_WRITE4M(pte, tmp) \
1310: or pte, ASI_SRMMUFP_L3, pte; \
1311: lda [pte] ASI_SRMMUFP, pte; \
1312: set SRMMU_SFSR, tmp; \
1313: lda [tmp] ASI_SRMMU, %g0; \
1314: and pte, (SRMMU_TETYPE | 0x14), pte; \
1315: cmp pte, (SRMMU_TEPTE | PPROT_WRITE)
1316: #endif /* 4m */
1317:
1318: #if defined(SUN4M) && !(defined(SUN4C) || defined(SUN4))
1319:
1320: #define PTE_OF_ADDR(addr, pte, bad, page_offset, label) \
1321: PTE_OF_ADDR4M(addr, pte, bad, page_offset)
1322: #define CMP_PTE_USER_WRITE(pte, tmp, label) CMP_PTE_USER_WRITE4M(pte,tmp)
1323: #define CMP_PTE_USER_READ(pte, tmp, label) CMP_PTE_USER_READ4M(pte,tmp)
1324:
1325: #elif (defined(SUN4C) || defined(SUN4)) && !defined(SUN4M)
1326:
1327: #define PTE_OF_ADDR(addr, pte, bad, page_offset,label) \
1328: PTE_OF_ADDR4_4C(addr, pte, bad, page_offset)
1329: #define CMP_PTE_USER_WRITE(pte, tmp, label) CMP_PTE_USER_WRITE4_4C(pte)
1330: #define CMP_PTE_USER_READ(pte, tmp, label) CMP_PTE_USER_READ4_4C(pte)
1331:
1332: #else /* both defined, ugh */
1333:
1334: #define PTE_OF_ADDR(addr, pte, bad, page_offset, label) \
1335: label: b,a 2f; \
1336: PTE_OF_ADDR4M(addr, pte, bad, page_offset); \
1337: b,a 3f; \
1338: 2: \
1339: PTE_OF_ADDR4_4C(addr, pte, bad, page_offset); \
1340: 3:
1341:
1342: #define CMP_PTE_USER_READ(pte, tmp, label) \
1343: label: b,a 1f; \
1344: CMP_PTE_USER_READ4M(pte,tmp); \
1345: b,a 2f; \
1346: 1: \
1347: CMP_PTE_USER_READ4_4C(pte); \
1348: 2:
1349:
1350: #define CMP_PTE_USER_WRITE(pte, tmp, label) \
1351: label: b,a 1f; \
1352: CMP_PTE_USER_WRITE4M(pte,tmp); \
1353: b,a 2f; \
1354: 1: \
1355: CMP_PTE_USER_WRITE4_4C(pte); \
1356: 2:
1357: #endif
1358:
1359:
1360: /*
1361: * The calculations in PTE_OF_ADDR and CMP_PTE_USER_* are rather slow:
1362: * in particular, according to Gordon Irlam of the University of Adelaide
1363: * in Australia, these consume at least 18 cycles on an SS1 and 37 on an
1364: * SS2. Hence, we try to avoid them in the common case.
1365: *
1366: * A chunk of 64 bytes is on a single page if and only if:
1367: *
1368: * ((base + 64 - 1) & ~(NBPG-1)) == (base & ~(NBPG-1))
1369: *
1370: * Equivalently (and faster to test), the low order bits (base & 4095) must
1371: * be small enough so that the sum (base + 63) does not carry out into the
1372: * upper page-address bits, i.e.,
1373: *
1374: * (base & (NBPG-1)) < (NBPG - 63)
1375: *
1376: * so we allow testing that here. This macro is also assumed to be safe
1377: * in a delay slot (modulo overwriting its temporary).
1378: */
1379: #define SLT_IF_1PAGE_RW(addr, tmp, page_offset) \
1380: and addr, page_offset, tmp; \
1381: sub page_offset, 62, page_offset; \
1382: cmp tmp, page_offset
1383:
1384: /*
1385: * Every trap that enables traps must set up stack space.
1386: * If the trap is from user mode, this involves switching to the kernel
1387: * stack for the current process, and we must also set cpcb->pcb_uw
1388: * so that the window overflow handler can tell user windows from kernel
1389: * windows.
1390: *
1391: * The number of user windows is:
1392: *
1393: * cpcb->pcb_uw = (cpcb->pcb_wim - 1 - CWP) % nwindows
1394: *
1395: * (where pcb_wim = log2(current %wim) and CWP = low 5 bits of %psr).
1396: * We compute this expression by table lookup in uwtab[CWP - pcb_wim],
1397: * which has been set up as:
1398: *
1399: * for i in [-nwin+1 .. nwin-1]
1400: * uwtab[i] = (nwin - 1 - i) % nwin;
1401: *
1402: * (If you do not believe this works, try it for yourself.)
1403: *
1404: * We also keep one or two more tables:
1405: *
1406: * for i in 0..nwin-1
1407: * wmask[i] = 1 << ((i + 1) % nwindows);
1408: *
1409: * wmask[CWP] tells whether a `rett' would return into the invalid window.
1410: */
1411: .data
1412: .skip 32 ! alignment byte & negative indicies
1413: uwtab: .skip 32 ! u_char uwtab[-31..31];
1414: wmask: .skip 32 ! u_char wmask[0..31];
1415:
1416: .text
1417: /*
1418: * Things begin to grow uglier....
1419: *
1420: * Each trap handler may (always) be running in the trap window.
1421: * If this is the case, it cannot enable further traps until it writes
1422: * the register windows into the stack (or, if the stack is no good,
1423: * the current pcb).
1424: *
1425: * ASSUMPTIONS: TRAP_SETUP() is called with:
1426: * %l0 = %psr
1427: * %l1 = return pc
1428: * %l2 = return npc
1429: * %l3 = (some value that must not be altered)
1430: * which means we have 4 registers to work with.
1431: *
1432: * The `stackspace' argument is the number of stack bytes to allocate
1433: * for register-saving, and must be at least -64 (and typically more,
1434: * for global registers and %y).
1435: *
1436: * Trapframes should use -CCFSZ-80. (80 = sizeof(struct trapframe);
1437: * see trap.h. This basically means EVERYONE. Interrupt frames could
1438: * get away with less, but currently do not.)
1439: *
1440: * The basic outline here is:
1441: *
1442: * if (trap came from kernel mode) {
1443: * if (we are in the trap window)
1444: * save it away;
1445: * %sp = %fp - stackspace;
1446: * } else {
1447: * compute the number of user windows;
1448: * if (we are in the trap window)
1449: * save it away;
1450: * %sp = (top of kernel stack) - stackspace;
1451: * }
1452: *
1453: * Again, the number of user windows is:
1454: *
1455: * cpcb->pcb_uw = (cpcb->pcb_wim - 1 - CWP) % nwindows
1456: *
1457: * (where pcb_wim = log2(current %wim) and CWP is the low 5 bits of %psr),
1458: * and this is computed as `uwtab[CWP - pcb_wim]'.
1459: *
1460: * NOTE: if you change this code, you will have to look carefully
1461: * at the window overflow and underflow handlers and make sure they
1462: * have similar changes made as needed.
1463: */
1464: #define CALL_CLEAN_TRAP_WINDOW \
1465: sethi %hi(clean_trap_window), %l7; \
1466: jmpl %l7 + %lo(clean_trap_window), %l4; \
1467: mov %g7, %l7 /* save %g7 in %l7 for clean_trap_window */
1468:
1469: #define TRAP_SETUP(stackspace) \
1470: rd %wim, %l4; \
1471: mov 1, %l5; \
1472: sll %l5, %l0, %l5; \
1473: btst PSR_PS, %l0; \
1474: bz 1f; \
1475: btst %l5, %l4; \
1476: /* came from kernel mode; cond codes indicate trap window */ \
1477: bz,a 3f; \
1478: add %fp, stackspace, %sp; /* want to just set %sp */ \
1479: CALL_CLEAN_TRAP_WINDOW; /* but maybe need to clean first */ \
1480: b 3f; \
1481: add %fp, stackspace, %sp; \
1482: 1: \
1483: /* came from user mode: compute pcb_nw */ \
1484: sethi %hi(cpcb), %l6; \
1485: ld [%l6 + %lo(cpcb)], %l6; \
1486: ld [%l6 + PCB_WIM], %l5; \
1487: and %l0, 31, %l4; \
1488: sub %l4, %l5, %l5; \
1489: set uwtab, %l4; \
1490: ldub [%l4 + %l5], %l5; \
1491: st %l5, [%l6 + PCB_UW]; \
1492: /* cond codes still indicate whether in trap window */ \
1493: bz,a 2f; \
1494: sethi %hi(USPACE+(stackspace)), %l5; \
1495: /* yes, in trap window; must clean it */ \
1496: CALL_CLEAN_TRAP_WINDOW; \
1497: sethi %hi(cpcb), %l6; \
1498: ld [%l6 + %lo(cpcb)], %l6; \
1499: sethi %hi(USPACE+(stackspace)), %l5; \
1500: 2: \
1501: /* trap window is (now) clean: set %sp */ \
1502: or %l5, %lo(USPACE+(stackspace)), %l5; \
1503: add %l6, %l5, %sp; \
1504: SET_SP_REDZONE(%l6, %l5); \
1505: 3: \
1506: CHECK_SP_REDZONE(%l6, %l5)
1507:
1508: /*
1509: * Interrupt setup is almost exactly like trap setup, but we need to
1510: * go to the interrupt stack if (a) we came from user mode or (b) we
1511: * came from kernel mode on the kernel stack.
1512: */
1513: #if defined(MULTIPROCESSOR)
1514: /*
1515: * SMP kernels: read `eintstack' from cpuinfo structure. Since the
1516: * location of the interrupt stack is not known in advance, we need
1517: * to check the current %fp against both ends of the stack space.
1518: */
1519: #define INTR_SETUP(stackspace) \
1520: rd %wim, %l4; \
1521: mov 1, %l5; \
1522: sll %l5, %l0, %l5; \
1523: btst PSR_PS, %l0; \
1524: bz 1f; \
1525: btst %l5, %l4; \
1526: /* came from kernel mode; cond codes still indicate trap window */ \
1527: bz,a 0f; \
1528: sethi %hi(_EINTSTACKP), %l7; \
1529: CALL_CLEAN_TRAP_WINDOW; \
1530: sethi %hi(_EINTSTACKP), %l7; \
1531: 0: /* now if not intstack > %fp >= eintstack, we were on the kernel stack */ \
1532: ld [%l7 + %lo(_EINTSTACKP)], %l7; \
1533: cmp %fp, %l7; \
1534: bge,a 3f; /* %fp >= eintstack */ \
1535: add %l7, stackspace, %sp; /* so switch to intstack */ \
1536: sethi %hi(INT_STACK_SIZE), %l6; \
1537: sub %l7, %l6, %l6; \
1538: cmp %fp, %l6; \
1539: blu,a 3f; /* %fp < intstack */ \
1540: add %l7, stackspace, %sp; /* so switch to intstack */ \
1541: b 4f; \
1542: add %fp, stackspace, %sp; /* else stay on intstack */ \
1543: 1: \
1544: /* came from user mode: compute pcb_nw */ \
1545: sethi %hi(cpcb), %l6; \
1546: ld [%l6 + %lo(cpcb)], %l6; \
1547: ld [%l6 + PCB_WIM], %l5; \
1548: and %l0, 31, %l4; \
1549: sub %l4, %l5, %l5; \
1550: set uwtab, %l4; \
1551: ldub [%l4 + %l5], %l5; \
1552: st %l5, [%l6 + PCB_UW]; \
1553: /* cond codes still indicate whether in trap window */ \
1554: bz,a 2f; \
1555: sethi %hi(_EINTSTACKP), %l7; \
1556: /* yes, in trap window; must save regs */ \
1557: CALL_CLEAN_TRAP_WINDOW; \
1558: sethi %hi(_EINTSTACKP), %l7; \
1559: 2: \
1560: ld [%l7 + %lo(_EINTSTACKP)], %l7; \
1561: add %l7, stackspace, %sp; \
1562: 3: \
1563: SET_SP_REDZONE_VAR(_EINTSTACKP, -INT_STACK_SIZE, %l6, %l5); \
1564: 4: \
1565: CHECK_SP_REDZONE(%l6, %l5)
1566:
1567: #else /* MULTIPROCESSOR */
1568:
1569: #define INTR_SETUP(stackspace) \
1570: rd %wim, %l4; \
1571: mov 1, %l5; \
1572: sll %l5, %l0, %l5; \
1573: btst PSR_PS, %l0; \
1574: bz 1f; \
1575: btst %l5, %l4; \
1576: /* came from kernel mode; cond codes still indicate trap window */ \
1577: bz,a 0f; \
1578: sethi %hi(_C_LABEL(eintstack)), %l7; \
1579: CALL_CLEAN_TRAP_WINDOW; \
1580: sethi %hi(_C_LABEL(eintstack)), %l7; \
1581: 0: /* now if %fp >= eintstack, we were on the kernel stack */ \
1582: cmp %fp, %l7; \
1583: bge,a 3f; \
1584: add %l7, stackspace, %sp; /* so switch to intstack */ \
1585: b 4f; \
1586: add %fp, stackspace, %sp; /* else stay on intstack */ \
1587: 1: \
1588: /* came from user mode: compute pcb_nw */ \
1589: sethi %hi(cpcb), %l6; \
1590: ld [%l6 + %lo(cpcb)], %l6; \
1591: ld [%l6 + PCB_WIM], %l5; \
1592: and %l0, 31, %l4; \
1593: sub %l4, %l5, %l5; \
1594: set uwtab, %l4; \
1595: ldub [%l4 + %l5], %l5; \
1596: st %l5, [%l6 + PCB_UW]; \
1597: /* cond codes still indicate whether in trap window */ \
1598: bz,a 2f; \
1599: sethi %hi(_C_LABEL(eintstack)), %l7; \
1600: /* yes, in trap window; must save regs */ \
1601: CALL_CLEAN_TRAP_WINDOW; \
1602: sethi %hi(_C_LABEL(eintstack)), %l7; \
1603: 2: \
1604: add %l7, stackspace, %sp; \
1605: 3: \
1606: SET_SP_REDZONE_CONST(_C_LABEL(intstack), %l6, %l5); \
1607: 4: \
1608: CHECK_SP_REDZONE(%l6, %l5)
1609: #endif /* MULTIPROCESSOR */
1610:
1611: /*
1612: * Handler for making the trap window shiny clean.
1613: *
1614: * On entry:
1615: * cpcb->pcb_nw = number of user windows
1616: * %l0 = %psr
1617: * %l1 must not be clobbered
1618: * %l2 must not be clobbered
1619: * %l3 must not be clobbered
1620: * %l4 = address for `return'
1621: * %l7 = saved %g7 (we put this in a delay slot above, to save work)
1622: *
1623: * On return:
1624: * %wim has changed, along with cpcb->pcb_wim
1625: * %g7 has been restored
1626: *
1627: * Normally, we push only one window.
1628: */
1629: clean_trap_window:
1630: mov %g5, %l5 ! save %g5
1631: mov %g6, %l6 ! ... and %g6
1632: /* mov %g7, %l7 ! ... and %g7 (already done for us) */
1633: sethi %hi(cpcb), %g6 ! get current pcb
1634: ld [%g6 + %lo(cpcb)], %g6
1635:
1636: /* Figure out whether it is a user window (cpcb->pcb_uw > 0). */
1637: ld [%g6 + PCB_UW], %g7
1638: deccc %g7
1639: bge ctw_user
1640: save %g0, %g0, %g0 ! in any case, enter window to save
1641:
1642: /* The window to be pushed is a kernel window. */
1643: std %l0, [%sp + (0*8)]
1644: ctw_merge:
1645: std %l2, [%sp + (1*8)]
1646: std %l4, [%sp + (2*8)]
1647: std %l6, [%sp + (3*8)]
1648: std %i0, [%sp + (4*8)]
1649: std %i2, [%sp + (5*8)]
1650: std %i4, [%sp + (6*8)]
1651: std %i6, [%sp + (7*8)]
1652:
1653: /* Set up new window invalid mask, and update cpcb->pcb_wim. */
1654: rd %psr, %g7 ! g7 = (junk << 5) + new_cwp
1655: mov 1, %g5 ! g5 = 1 << new_cwp;
1656: sll %g5, %g7, %g5
1657: wr %g5, 0, %wim ! setwim(g5);
1658: and %g7, 31, %g7 ! cpcb->pcb_wim = g7 & 31;
1659: sethi %hi(cpcb), %g6 ! re-get current pcb
1660: ld [%g6 + %lo(cpcb)], %g6
1661: st %g7, [%g6 + PCB_WIM]
1662: nop
1663: restore ! back to trap window
1664:
1665: mov %l5, %g5 ! restore g5
1666: mov %l6, %g6 ! ... and g6
1667: jmp %l4 + 8 ! return to caller
1668: mov %l7, %g7 ! ... and g7
1669: /* NOTREACHED */
1670:
1671: ctw_user:
1672: /*
1673: * The window to be pushed is a user window.
1674: * We must verify the stack pointer (alignment & permissions).
1675: * See comments above definition of PTE_OF_ADDR.
1676: */
1677: st %g7, [%g6 + PCB_UW] ! cpcb->pcb_uw--;
1678: btst 7, %sp ! if not aligned,
1679: bne ctw_invalid ! choke on it
1680: EMPTY
1681:
1682: sethi %hi(_C_LABEL(pgofset)), %g6 ! trash %g6=curpcb
1683: ld [%g6 + %lo(_C_LABEL(pgofset))], %g6
1684: PTE_OF_ADDR(%sp, %g7, ctw_invalid, %g6, NOP_ON_4M_1)
1685: CMP_PTE_USER_WRITE(%g7, %g5, NOP_ON_4M_2) ! likewise if not writable
1686: bne ctw_invalid
1687: EMPTY
1688: /* Note side-effect of SLT_IF_1PAGE_RW: decrements %g6 by 62 */
1689: SLT_IF_1PAGE_RW(%sp, %g7, %g6)
1690: bl,a ctw_merge ! all ok if only 1
1691: std %l0, [%sp]
1692: add %sp, 7*8, %g5 ! check last addr too
1.148.4.9 nathanw 1693: add %g6, 62, %g6 /* restore %g6 to `pgofset' */
1.148.4.2 pk 1694: PTE_OF_ADDR(%g5, %g7, ctw_invalid, %g6, NOP_ON_4M_3)
1695: CMP_PTE_USER_WRITE(%g7, %g6, NOP_ON_4M_4)
1696: be,a ctw_merge ! all ok: store <l0,l1> and merge
1697: std %l0, [%sp]
1698:
1699: /*
1700: * The window we wanted to push could not be pushed.
1701: * Instead, save ALL user windows into the pcb.
1702: * We will notice later that we did this, when we
1703: * get ready to return from our trap or syscall.
1704: *
1705: * The code here is run rarely and need not be optimal.
1706: */
1707: ctw_invalid:
1708: /*
1709: * Reread cpcb->pcb_uw. We decremented this earlier,
1710: * so it is off by one.
1711: */
1712: sethi %hi(cpcb), %g6 ! re-get current pcb
1713: ld [%g6 + %lo(cpcb)], %g6
1714:
1715: ld [%g6 + PCB_UW], %g7 ! (number of user windows) - 1
1716: add %g6, PCB_RW, %g5
1717:
1718: /* save g7+1 windows, starting with the current one */
1719: 1: ! do {
1720: std %l0, [%g5 + (0*8)] ! rw->rw_local[0] = l0;
1721: std %l2, [%g5 + (1*8)] ! ...
1722: std %l4, [%g5 + (2*8)]
1723: std %l6, [%g5 + (3*8)]
1724: std %i0, [%g5 + (4*8)]
1725: std %i2, [%g5 + (5*8)]
1726: std %i4, [%g5 + (6*8)]
1727: std %i6, [%g5 + (7*8)]
1728: deccc %g7 ! if (n > 0) save(), rw++;
1729: bge,a 1b ! } while (--n >= 0);
1730: save %g5, 64, %g5
1731:
1732: /* stash sp for bottommost window */
1733: st %sp, [%g5 + 64 + (7*8)]
1734:
1735: /* set up new wim */
1736: rd %psr, %g7 ! g7 = (junk << 5) + new_cwp;
1737: mov 1, %g5 ! g5 = 1 << new_cwp;
1738: sll %g5, %g7, %g5
1739: wr %g5, 0, %wim ! wim = g5;
1740: and %g7, 31, %g7
1741: st %g7, [%g6 + PCB_WIM] ! cpcb->pcb_wim = new_cwp;
1742:
1743: /* fix up pcb fields */
1744: ld [%g6 + PCB_UW], %g7 ! n = cpcb->pcb_uw;
1745: add %g7, 1, %g5
1746: st %g5, [%g6 + PCB_NSAVED] ! cpcb->pcb_nsaved = n + 1;
1747: st %g0, [%g6 + PCB_UW] ! cpcb->pcb_uw = 0;
1748:
1749: /* return to trap window */
1750: 1: deccc %g7 ! do {
1751: bge 1b ! restore();
1752: restore ! } while (--n >= 0);
1753:
1754: mov %l5, %g5 ! restore g5, g6, & g7, and return
1755: mov %l6, %g6
1756: jmp %l4 + 8
1757: mov %l7, %g7
1758: /* NOTREACHED */
1759:
1760:
1761: /*
1762: * Each memory access (text or data) fault, from user or kernel mode,
1763: * comes here. We read the error register and figure out what has
1764: * happened.
1765: *
1766: * This cannot be done from C code since we must not enable traps (and
1767: * hence may not use the `save' instruction) until we have decided that
1768: * the error is or is not an asynchronous one that showed up after a
1769: * synchronous error, but which must be handled before the sync err.
1770: *
1771: * Most memory faults are user mode text or data faults, which can cause
1772: * signal delivery or ptracing, for which we must build a full trapframe.
1773: * It does not seem worthwhile to work to avoid this in the other cases,
1774: * so we store all the %g registers on the stack immediately.
1775: *
1776: * On entry:
1777: * %l0 = %psr
1778: * %l1 = return pc
1779: * %l2 = return npc
1780: * %l3 = T_TEXTFAULT or T_DATAFAULT
1781: *
1782: * Internal:
1783: * %l4 = %y, until we call mem_access_fault (then onto trapframe)
1784: * %l5 = IE_reg_addr, if async mem error
1785: *
1786: */
1787:
1788: #if defined(SUN4)
1789: memfault_sun4:
1790: TRAP_SETUP(-CCFSZ-80)
1791: INCR(_C_LABEL(uvmexp)+V_FAULTS) ! cnt.v_faults++ (clobbers %o0,%o1)
1792:
1793: st %g1, [%sp + CCFSZ + 20] ! save g1
1794: rd %y, %l4 ! save y
1795:
1796: /*
1797: * registers:
1798: * memerr.ctrl = memory error control reg., error if 0x80 set
1799: * memerr.vaddr = address of memory error
1800: * buserr = basically just like sun4c sync error reg but
1801: * no SER_WRITE bit (have to figure out from code).
1802: */
1803: set _C_LABEL(par_err_reg), %o0 ! memerr ctrl addr -- XXX mapped?
1804: ld [%o0], %o0 ! get it
1805: std %g2, [%sp + CCFSZ + 24] ! save g2, g3
1806: ld [%o0], %o1 ! memerr ctrl register
1807: inc 4, %o0 ! now VA of memerr vaddr register
1808: std %g4, [%sp + CCFSZ + 32] ! (sneak g4,g5 in here)
1809: ld [%o0], %o2 ! memerr virt addr
1810: st %g0, [%o0] ! NOTE: this clears latching!!!
1811: btst ME_REG_IERR, %o1 ! memory error?
1812: ! XXX this value may not be correct
1813: ! as I got some parity errors and the
1814: ! correct bits were not on?
1815: std %g6, [%sp + CCFSZ + 40]
1816: bz,a 0f ! no, just a regular fault
1817: wr %l0, PSR_ET, %psr ! (and reenable traps)
1818:
1819: /* memory error = death for now XXX */
1820: clr %o3
1821: clr %o4
1822: call _C_LABEL(memerr4_4c) ! memerr(0, ser, sva, 0, 0)
1823: clr %o0
1824: call _C_LABEL(prom_halt)
1825: nop
1826:
1827: 0:
1828: /*
1829: * have to make SUN4 emulate SUN4C. 4C code expects
1830: * SER in %o1 and the offending VA in %o2, everything else is ok.
1831: * (must figure out if SER_WRITE should be set)
1832: */
1833: set AC_BUS_ERR, %o0 ! bus error register
1834: cmp %l3, T_TEXTFAULT ! text fault always on PC
1835: be normal_mem_fault ! go
1836: lduba [%o0] ASI_CONTROL, %o1 ! get its value
1837:
1838: #define STORE_BIT 21 /* bit that indicates a store instruction for sparc */
1839: ld [%l1], %o3 ! offending instruction in %o3 [l1=pc]
1840: srl %o3, STORE_BIT, %o3 ! get load/store bit (wont fit simm13)
1841: btst 1, %o3 ! test for store operation
1842:
1843: bz normal_mem_fault ! if (z) is a load (so branch)
1844: sethi %hi(SER_WRITE), %o5 ! damn SER_WRITE wont fit simm13
1845: ! or %lo(SER_WRITE), %o5, %o5! not necessary since %lo is zero
1846: or %o5, %o1, %o1 ! set SER_WRITE
1847: #if defined(SUN4C) || defined(SUN4M)
1848: ba,a normal_mem_fault
1849: !!nop ! XXX make efficient later
1850: #endif /* SUN4C || SUN4M */
1851: #endif /* SUN4 */
1852:
1853: memfault_sun4c:
1854: #if defined(SUN4C)
1855: TRAP_SETUP(-CCFSZ-80)
1856: INCR(_C_LABEL(uvmexp)+V_FAULTS) ! cnt.v_faults++ (clobbers %o0,%o1)
1857:
1858: st %g1, [%sp + CCFSZ + 20] ! save g1
1859: rd %y, %l4 ! save y
1860:
1861: /*
1862: * We know about the layout of the error registers here.
1863: * addr reg
1864: * ---- ---
1865: * a AC_SYNC_ERR
1866: * a+4 AC_SYNC_VA
1867: * a+8 AC_ASYNC_ERR
1868: * a+12 AC_ASYNC_VA
1869: */
1870:
1871: #if AC_SYNC_ERR + 4 != AC_SYNC_VA || \
1872: AC_SYNC_ERR + 8 != AC_ASYNC_ERR || AC_SYNC_ERR + 12 != AC_ASYNC_VA
1873: help help help ! I, I, I wanna be a lifeguard
1874: #endif
1875: set AC_SYNC_ERR, %o0
1876: std %g2, [%sp + CCFSZ + 24] ! save g2, g3
1877: lda [%o0] ASI_CONTROL, %o1 ! sync err reg
1878: inc 4, %o0
1879: std %g4, [%sp + CCFSZ + 32] ! (sneak g4,g5 in here)
1880: lda [%o0] ASI_CONTROL, %o2 ! sync virt addr
1881: btst SER_MEMERR, %o1 ! memory error?
1882: std %g6, [%sp + CCFSZ + 40]
1883: bz,a normal_mem_fault ! no, just a regular fault
1884: wr %l0, PSR_ET, %psr ! (and reenable traps)
1885:
1886: /*
1887: * We got a synchronous memory error. It could be one that
1888: * happened because there were two stores in a row, and the
1889: * first went into the write buffer, and the second caused this
1890: * synchronous trap; so there could now be a pending async error.
1891: * This is in fact the case iff the two va's differ.
1892: */
1893: inc 4, %o0
1894: lda [%o0] ASI_CONTROL, %o3 ! async err reg
1895: inc 4, %o0
1896: lda [%o0] ASI_CONTROL, %o4 ! async virt addr
1897: cmp %o2, %o4
1898: be,a 1f ! no, not an async err
1899: wr %l0, PSR_ET, %psr ! (and reenable traps)
1900:
1901: /*
1902: * Handle the async error; ignore the sync error for now
1903: * (we may end up getting it again, but so what?).
1904: * This code is essentially the same as that at `nmi' below,
1905: * but the register usage is different and we cannot merge.
1906: */
1907: sethi %hi(INTRREG_VA), %l5 ! ienab_bic(IE_ALLIE);
1908: ldub [%l5 + %lo(INTRREG_VA)], %o0
1909: andn %o0, IE_ALLIE, %o0
1910: stb %o0, [%l5 + %lo(INTRREG_VA)]
1911:
1912: /*
1913: * Now reenable traps and call C code.
1914: * %o1 through %o4 still hold the error reg contents.
1915: * If memerr() returns, return from the trap.
1916: */
1917: wr %l0, PSR_ET, %psr
1918: call _C_LABEL(memerr4_4c) ! memerr(0, ser, sva, aer, ava)
1919: clr %o0
1920:
1921: ld [%sp + CCFSZ + 20], %g1 ! restore g1 through g7
1922: wr %l0, 0, %psr ! and disable traps, 3 instr delay
1923: ldd [%sp + CCFSZ + 24], %g2
1924: ldd [%sp + CCFSZ + 32], %g4
1925: ldd [%sp + CCFSZ + 40], %g6
1926: /* now safe to set IE_ALLIE again */
1927: ldub [%l5 + %lo(INTRREG_VA)], %o1
1928: or %o1, IE_ALLIE, %o1
1929: stb %o1, [%l5 + %lo(INTRREG_VA)]
1930: b return_from_trap
1931: wr %l4, 0, %y ! restore y
1932:
1933: /*
1934: * Trap was a synchronous memory error.
1935: * %o1 through %o4 still hold the error reg contents.
1936: */
1937: 1:
1938: call _C_LABEL(memerr4_4c) ! memerr(1, ser, sva, aer, ava)
1939: mov 1, %o0
1940:
1941: ld [%sp + CCFSZ + 20], %g1 ! restore g1 through g7
1942: ldd [%sp + CCFSZ + 24], %g2
1943: ldd [%sp + CCFSZ + 32], %g4
1944: ldd [%sp + CCFSZ + 40], %g6
1945: wr %l4, 0, %y ! restore y
1946: b return_from_trap
1947: wr %l0, 0, %psr
1948: /* NOTREACHED */
1949: #endif /* SUN4C */
1950:
1951: #if defined(SUN4M)
1952: memfault_sun4m:
1953: ! DANGER: we use the fact that %lo(CPUINFO_VA) is zero
1954: .if CPUINFO_VA & 0x1fff
1955: BARF
1956: .endif
1957: sethi %hi(CPUINFO_VA), %l4
1958: ld [%l4 + %lo(CPUINFO_VA+CPUINFO_GETSYNCFLT)], %l5
1959: jmpl %l5, %l7
1960: or %l4, %lo(CPUINFO_SYNCFLTDUMP), %l4
1961: TRAP_SETUP(-CCFSZ-80)
1962: INCR(_C_LABEL(uvmexp)+V_FAULTS) ! cnt.v_faults++ (clobbers %o0,%o1)
1963:
1964: st %g1, [%sp + CCFSZ + 20] ! save g1
1965: rd %y, %l4 ! save y
1966:
1967: std %g2, [%sp + CCFSZ + 24] ! save g2, g3
1968: std %g4, [%sp + CCFSZ + 32] ! save g4, g5
1969: std %g6, [%sp + CCFSZ + 40] ! sneak in g6, g7
1970:
1971: ! retrieve sync fault status/address
1972: sethi %hi(CPUINFO_VA+CPUINFO_SYNCFLTDUMP), %o0
1973: ld [%o0 + %lo(CPUINFO_VA+CPUINFO_SYNCFLTDUMP)], %o1
1974: ld [%o0 + %lo(CPUINFO_VA+CPUINFO_SYNCFLTDUMP+4)], %o2
1975:
1976: wr %l0, PSR_ET, %psr ! reenable traps
1977:
1978: /* Finish stackframe, call C trap handler */
1979: std %l0, [%sp + CCFSZ + 0] ! set tf.tf_psr, tf.tf_pc
1980: mov %l3, %o0 ! (argument: type)
1981: st %l2, [%sp + CCFSZ + 8] ! set tf.tf_npc
1982: st %l4, [%sp + CCFSZ + 12] ! set tf.tf_y
1983: std %i0, [%sp + CCFSZ + 48] ! tf.tf_out[0], etc
1984: std %i2, [%sp + CCFSZ + 56]
1985: std %i4, [%sp + CCFSZ + 64]
1986: std %i6, [%sp + CCFSZ + 72]
1987: ! mem_access_fault(type,sfsr,sfva,&tf);
1988: call _C_LABEL(mem_access_fault4m)
1989: add %sp, CCFSZ, %o3 ! (argument: &tf)
1990:
1991: ldd [%sp + CCFSZ + 0], %l0 ! load new values
1992: ldd [%sp + CCFSZ + 8], %l2
1993: wr %l3, 0, %y
1994: ld [%sp + CCFSZ + 20], %g1
1995: ldd [%sp + CCFSZ + 24], %g2
1996: ldd [%sp + CCFSZ + 32], %g4
1997: ldd [%sp + CCFSZ + 40], %g6
1998: ldd [%sp + CCFSZ + 48], %i0
1999: ldd [%sp + CCFSZ + 56], %i2
2000: ldd [%sp + CCFSZ + 64], %i4
2001: ldd [%sp + CCFSZ + 72], %i6
2002:
2003: b return_from_trap ! go return
2004: wr %l0, 0, %psr ! (but first disable traps again)
2005: #endif /* SUN4M */
2006:
2007: normal_mem_fault:
2008: /*
2009: * Trap was some other error; call C code to deal with it.
2010: * Must finish trap frame (psr,pc,npc,%y,%o0..%o7) in case
2011: * we decide to deliver a signal or ptrace the process.
2012: * %g1..%g7 were already set up above.
2013: */
2014: std %l0, [%sp + CCFSZ + 0] ! set tf.tf_psr, tf.tf_pc
2015: mov %l3, %o0 ! (argument: type)
2016: st %l2, [%sp + CCFSZ + 8] ! set tf.tf_npc
2017: st %l4, [%sp + CCFSZ + 12] ! set tf.tf_y
2018: mov %l1, %o3 ! (argument: pc)
2019: std %i0, [%sp + CCFSZ + 48] ! tf.tf_out[0], etc
2020: std %i2, [%sp + CCFSZ + 56]
2021: mov %l0, %o4 ! (argument: psr)
2022: std %i4, [%sp + CCFSZ + 64]
2023: std %i6, [%sp + CCFSZ + 72]
2024: call _C_LABEL(mem_access_fault)! mem_access_fault(type, ser, sva,
2025: ! pc, psr, &tf);
2026: add %sp, CCFSZ, %o5 ! (argument: &tf)
2027:
2028: ldd [%sp + CCFSZ + 0], %l0 ! load new values
2029: ldd [%sp + CCFSZ + 8], %l2
2030: wr %l3, 0, %y
2031: ld [%sp + CCFSZ + 20], %g1
2032: ldd [%sp + CCFSZ + 24], %g2
2033: ldd [%sp + CCFSZ + 32], %g4
2034: ldd [%sp + CCFSZ + 40], %g6
2035: ldd [%sp + CCFSZ + 48], %i0
2036: ldd [%sp + CCFSZ + 56], %i2
2037: ldd [%sp + CCFSZ + 64], %i4
2038: ldd [%sp + CCFSZ + 72], %i6
2039:
2040: b return_from_trap ! go return
2041: wr %l0, 0, %psr ! (but first disable traps again)
2042:
2043:
2044: /*
2045: * fp_exception has to check to see if we are trying to save
2046: * the FP state, and if so, continue to save the FP state.
2047: *
2048: * We do not even bother checking to see if we were in kernel mode,
2049: * since users have no access to the special_fp_store instruction.
2050: *
2051: * This whole idea was stolen from Sprite.
2052: */
2053: fp_exception:
2054: set special_fp_store, %l4 ! see if we came from the special one
2055: cmp %l1, %l4 ! pc == special_fp_store?
2056: bne slowtrap ! no, go handle per usual
2057: EMPTY
2058: sethi %hi(savefpcont), %l4 ! yes, "return" to the special code
2059: or %lo(savefpcont), %l4, %l4
2060: jmp %l4
2061: rett %l4 + 4
2062:
2063: /*
2064: * slowtrap() builds a trap frame and calls trap().
2065: * This is called `slowtrap' because it *is*....
2066: * We have to build a full frame for ptrace(), for instance.
2067: *
2068: * Registers:
2069: * %l0 = %psr
2070: * %l1 = return pc
2071: * %l2 = return npc
2072: * %l3 = trap code
2073: */
2074: slowtrap:
2075: TRAP_SETUP(-CCFSZ-80)
2076: /*
2077: * Phew, ready to enable traps and call C code.
2078: */
2079: mov %l3, %o0 ! put type in %o0 for later
2080: Lslowtrap_reenter:
2081: wr %l0, PSR_ET, %psr ! traps on again
2082: std %l0, [%sp + CCFSZ] ! tf.tf_psr = psr; tf.tf_pc = ret_pc;
2083: rd %y, %l3
2084: std %l2, [%sp + CCFSZ + 8] ! tf.tf_npc = return_npc; tf.tf_y = %y;
2085: st %g1, [%sp + CCFSZ + 20]
2086: std %g2, [%sp + CCFSZ + 24]
2087: std %g4, [%sp + CCFSZ + 32]
2088: std %g6, [%sp + CCFSZ + 40]
2089: std %i0, [%sp + CCFSZ + 48]
2090: mov %l0, %o1 ! (psr)
2091: std %i2, [%sp + CCFSZ + 56]
2092: mov %l1, %o2 ! (pc)
2093: std %i4, [%sp + CCFSZ + 64]
2094: add %sp, CCFSZ, %o3 ! (&tf)
2095: call _C_LABEL(trap) ! trap(type, psr, pc, &tf)
2096: std %i6, [%sp + CCFSZ + 72]
2097:
2098: ldd [%sp + CCFSZ], %l0 ! load new values
2099: ldd [%sp + CCFSZ + 8], %l2
2100: wr %l3, 0, %y
2101: ld [%sp + CCFSZ + 20], %g1
2102: ldd [%sp + CCFSZ + 24], %g2
2103: ldd [%sp + CCFSZ + 32], %g4
2104: ldd [%sp + CCFSZ + 40], %g6
2105: ldd [%sp + CCFSZ + 48], %i0
2106: ldd [%sp + CCFSZ + 56], %i2
2107: ldd [%sp + CCFSZ + 64], %i4
2108: ldd [%sp + CCFSZ + 72], %i6
2109: b return_from_trap
2110: wr %l0, 0, %psr
2111:
2112: /*
2113: * Do a `software' trap by re-entering the trap code, possibly first
2114: * switching from interrupt stack to kernel stack. This is used for
2115: * scheduling and signal ASTs (which generally occur from softclock or
2116: * tty or net interrupts) and register window saves (which might occur
2117: * from anywhere).
2118: *
2119: * The current window is the trap window, and it is by definition clean.
2120: * We enter with the trap type in %o0. All we have to do is jump to
2121: * Lslowtrap_reenter above, but maybe after switching stacks....
2122: */
2123: softtrap:
2124: #if defined(MULTIPROCESSOR)
2125: /*
2126: * The interrupt stack is not at a fixed location
2127: * and %sp must be checked against both ends.
2128: */
2129: sethi %hi(_EINTSTACKP), %l7
2130: ld [%l7 + %lo(_EINTSTACKP)], %l7
2131: cmp %sp, %l7
2132: bge Lslowtrap_reenter
2133: EMPTY
2134: set INT_STACK_SIZE, %l6
2135: sub %l7, %l6, %l7
2136: cmp %sp, %l7
2137: blu Lslowtrap_reenter
2138: EMPTY
2139: #else
2140: sethi %hi(_C_LABEL(eintstack)), %l7
2141: cmp %sp, %l7
2142: bge Lslowtrap_reenter
2143: EMPTY
2144: #endif
2145: sethi %hi(cpcb), %l6
2146: ld [%l6 + %lo(cpcb)], %l6
2147: set USPACE-CCFSZ-80, %l5
2148: add %l6, %l5, %l7
2149: SET_SP_REDZONE(%l6, %l5)
2150: b Lslowtrap_reenter
2151: mov %l7, %sp
2152:
2153: #ifdef KGDB
2154: /*
2155: * bpt is entered on all breakpoint traps.
2156: * If this is a kernel breakpoint, we do not want to call trap().
2157: * Among other reasons, this way we can set breakpoints in trap().
2158: */
2159: bpt:
2160: btst PSR_PS, %l0 ! breakpoint from kernel?
2161: bz slowtrap ! no, go do regular trap
2162: nop
2163:
2164: /* XXXSMP */
2165: /*
2166: * Build a trap frame for kgdb_trap_glue to copy.
2167: * Enable traps but set ipl high so that we will not
2168: * see interrupts from within breakpoints.
2169: */
2170: TRAP_SETUP(-CCFSZ-80)
2171: or %l0, PSR_PIL, %l4 ! splhigh()
2172: wr %l4, 0, %psr ! the manual claims that this
2173: wr %l4, PSR_ET, %psr ! song and dance is necessary
2174: std %l0, [%sp + CCFSZ + 0] ! tf.tf_psr, tf.tf_pc
2175: mov %l3, %o0 ! trap type arg for kgdb_trap_glue
2176: rd %y, %l3
2177: std %l2, [%sp + CCFSZ + 8] ! tf.tf_npc, tf.tf_y
2178: rd %wim, %l3
2179: st %l3, [%sp + CCFSZ + 16] ! tf.tf_wim (a kgdb-only r/o field)
2180: st %g1, [%sp + CCFSZ + 20] ! tf.tf_global[1]
2181: std %g2, [%sp + CCFSZ + 24] ! etc
2182: std %g4, [%sp + CCFSZ + 32]
2183: std %g6, [%sp + CCFSZ + 40]
2184: std %i0, [%sp + CCFSZ + 48] ! tf.tf_in[0..1]
2185: std %i2, [%sp + CCFSZ + 56] ! etc
2186: std %i4, [%sp + CCFSZ + 64]
2187: std %i6, [%sp + CCFSZ + 72]
2188:
2189: /*
2190: * Now call kgdb_trap_glue(); if it returns, call trap().
2191: */
2192: mov %o0, %l3 ! gotta save trap type
2193: call _C_LABEL(kgdb_trap_glue)! kgdb_trap_glue(type, &trapframe)
2194: add %sp, CCFSZ, %o1 ! (&trapframe)
2195:
2196: /*
2197: * Use slowtrap to call trap---but first erase our tracks
2198: * (put the registers back the way they were).
2199: */
2200: mov %l3, %o0 ! slowtrap will need trap type
2201: ld [%sp + CCFSZ + 12], %l3
2202: wr %l3, 0, %y
2203: ld [%sp + CCFSZ + 20], %g1
2204: ldd [%sp + CCFSZ + 24], %g2
2205: ldd [%sp + CCFSZ + 32], %g4
2206: b Lslowtrap_reenter
2207: ldd [%sp + CCFSZ + 40], %g6
2208:
2209: /*
2210: * Enter kernel breakpoint. Write all the windows (not including the
2211: * current window) into the stack, so that backtrace works. Copy the
2212: * supplied trap frame to the kgdb stack and switch stacks.
2213: *
2214: * kgdb_trap_glue(type, tf0)
2215: * int type;
2216: * struct trapframe *tf0;
2217: */
2218: _ENTRY(_C_LABEL(kgdb_trap_glue))
2219: save %sp, -CCFSZ, %sp
2220:
2221: call _C_LABEL(write_all_windows)
2222: mov %sp, %l4 ! %l4 = current %sp
2223:
2224: /* copy trapframe to top of kgdb stack */
2225: set _C_LABEL(kgdb_stack) + KGDB_STACK_SIZE - 80, %l0
2226: ! %l0 = tfcopy -> end_of_kgdb_stack
2227: mov 80, %l1
2228: 1: ldd [%i1], %l2
2229: inc 8, %i1
2230: deccc 8, %l1
2231: std %l2, [%l0]
2232: bg 1b
2233: inc 8, %l0
2234:
2235: #ifdef DEBUG
2236: /* save old red zone and then turn it off */
2237: sethi %hi(_redzone), %l7
2238: ld [%l7 + %lo(_redzone)], %l6
2239: st %g0, [%l7 + %lo(_redzone)]
2240: #endif
2241: /* switch to kgdb stack */
2242: add %l0, -CCFSZ-80, %sp
2243:
2244: /* if (kgdb_trap(type, tfcopy)) kgdb_rett(tfcopy); */
2245: mov %i0, %o0
2246: call _C_LABEL(kgdb_trap)
2247: add %l0, -80, %o1
2248: tst %o0
2249: bnz,a kgdb_rett
2250: add %l0, -80, %g1
2251:
2252: /*
2253: * kgdb_trap() did not handle the trap at all so the stack is
2254: * still intact. A simple `restore' will put everything back,
2255: * after we reset the stack pointer.
2256: */
2257: mov %l4, %sp
2258: #ifdef DEBUG
2259: st %l6, [%l7 + %lo(_redzone)] ! restore red zone
2260: #endif
2261: ret
2262: restore
2263:
2264: /*
2265: * Return from kgdb trap. This is sort of special.
2266: *
2267: * We know that kgdb_trap_glue wrote the window above it, so that we will
2268: * be able to (and are sure to have to) load it up. We also know that we
2269: * came from kernel land and can assume that the %fp (%i6) we load here
2270: * is proper. We must also be sure not to lower ipl (it is at splhigh())
2271: * until we have traps disabled, due to the SPARC taking traps at the
2272: * new ipl before noticing that PSR_ET has been turned off. We are on
2273: * the kgdb stack, so this could be disastrous.
2274: *
2275: * Note that the trapframe argument in %g1 points into the current stack
2276: * frame (current window). We abandon this window when we move %g1->tf_psr
2277: * into %psr, but we will not have loaded the new %sp yet, so again traps
2278: * must be disabled.
2279: */
2280: kgdb_rett:
2281: rd %psr, %g4 ! turn off traps
2282: wr %g4, PSR_ET, %psr
2283: /* use the three-instruction delay to do something useful */
2284: ld [%g1], %g2 ! pick up new %psr
2285: ld [%g1 + 12], %g3 ! set %y
2286: wr %g3, 0, %y
2287: #ifdef DEBUG
2288: st %l6, [%l7 + %lo(_redzone)] ! and restore red zone
2289: #endif
2290: wr %g0, 0, %wim ! enable window changes
2291: nop; nop; nop
2292: /* now safe to set the new psr (changes CWP, leaves traps disabled) */
2293: wr %g2, 0, %psr ! set rett psr (including cond codes)
2294: /* 3 instruction delay before we can use the new window */
2295: /*1*/ ldd [%g1 + 24], %g2 ! set new %g2, %g3
2296: /*2*/ ldd [%g1 + 32], %g4 ! set new %g4, %g5
2297: /*3*/ ldd [%g1 + 40], %g6 ! set new %g6, %g7
2298:
2299: /* now we can use the new window */
2300: mov %g1, %l4
2301: ld [%l4 + 4], %l1 ! get new pc
2302: ld [%l4 + 8], %l2 ! get new npc
2303: ld [%l4 + 20], %g1 ! set new %g1
2304:
2305: /* set up returnee's out registers, including its %sp */
2306: ldd [%l4 + 48], %i0
2307: ldd [%l4 + 56], %i2
2308: ldd [%l4 + 64], %i4
2309: ldd [%l4 + 72], %i6
2310:
2311: /* load returnee's window, making the window above it be invalid */
2312: restore
2313: restore %g0, 1, %l1 ! move to inval window and set %l1 = 1
2314: rd %psr, %l0
2315: sll %l1, %l0, %l1
2316: wr %l1, 0, %wim ! %wim = 1 << (%psr & 31)
2317: sethi %hi(cpcb), %l1
2318: ld [%l1 + %lo(cpcb)], %l1
2319: and %l0, 31, %l0 ! CWP = %psr & 31;
2320: st %l0, [%l1 + PCB_WIM] ! cpcb->pcb_wim = CWP;
2321: save %g0, %g0, %g0 ! back to window to reload
2322: LOADWIN(%sp)
2323: save %g0, %g0, %g0 ! back to trap window
2324: /* note, we have not altered condition codes; safe to just rett */
2325: RETT
2326: #endif
2327:
2328: /*
2329: * syscall() builds a trap frame and calls syscall().
2330: * sun_syscall is same but delivers sun system call number
2331: * XXX should not have to save&reload ALL the registers just for
2332: * ptrace...
2333: */
2334: _C_LABEL(_syscall):
2335: TRAP_SETUP(-CCFSZ-80)
2336: wr %l0, PSR_ET, %psr
2337: std %l0, [%sp + CCFSZ + 0] ! tf_psr, tf_pc
2338: rd %y, %l3
2339: std %l2, [%sp + CCFSZ + 8] ! tf_npc, tf_y
2340: st %g1, [%sp + CCFSZ + 20] ! tf_g[1]
2341: std %g2, [%sp + CCFSZ + 24] ! tf_g[2], tf_g[3]
2342: std %g4, [%sp + CCFSZ + 32] ! etc
2343: std %g6, [%sp + CCFSZ + 40]
2344: mov %g1, %o0 ! (code)
2345: std %i0, [%sp + CCFSZ + 48]
2346: add %sp, CCFSZ, %o1 ! (&tf)
2347: std %i2, [%sp + CCFSZ + 56]
2348: mov %l1, %o2 ! (pc)
2349: std %i4, [%sp + CCFSZ + 64]
2350: call _C_LABEL(syscall) ! syscall(code, &tf, pc, suncompat)
2351: std %i6, [%sp + CCFSZ + 72]
2352: ! now load em all up again, sigh
2353: ldd [%sp + CCFSZ + 0], %l0 ! new %psr, new pc
2354: ldd [%sp + CCFSZ + 8], %l2 ! new npc, new %y
2355: wr %l3, 0, %y
2356: /* see `proc_trampoline' for the reason for this label */
2357: return_from_syscall:
2358: ld [%sp + CCFSZ + 20], %g1
2359: ldd [%sp + CCFSZ + 24], %g2
2360: ldd [%sp + CCFSZ + 32], %g4
2361: ldd [%sp + CCFSZ + 40], %g6
2362: ldd [%sp + CCFSZ + 48], %i0
2363: ldd [%sp + CCFSZ + 56], %i2
2364: ldd [%sp + CCFSZ + 64], %i4
2365: ldd [%sp + CCFSZ + 72], %i6
2366: b return_from_trap
2367: wr %l0, 0, %psr
2368:
2369: /*
2370: * Interrupts. Software interrupts must be cleared from the software
2371: * interrupt enable register. Rather than calling ienab_bic for each,
2372: * we do them in-line before enabling traps.
2373: *
2374: * After preliminary setup work, the interrupt is passed to each
2375: * registered handler in turn. These are expected to return nonzero if
2376: * they took care of the interrupt. If a handler claims the interrupt,
2377: * we exit (hardware interrupts are latched in the requestor so we'll
2378: * just take another interrupt in the unlikely event of simultaneous
2379: * interrupts from two different devices at the same level). If we go
2380: * through all the registered handlers and no one claims it, we report a
2381: * stray interrupt. This is more or less done as:
2382: *
2383: * for (ih = intrhand[intlev]; ih; ih = ih->ih_next)
2384: * if ((*ih->ih_fun)(ih->ih_arg ? ih->ih_arg : &frame))
2385: * return;
2386: * strayintr(&frame);
2387: *
2388: * Software interrupts are almost the same with three exceptions:
2389: * (1) we clear the interrupt from the software interrupt enable
2390: * register before calling any handler (we have to clear it first
2391: * to avoid an interrupt-losing race),
2392: * (2) we always call all the registered handlers (there is no way
2393: * to tell if the single bit in the software interrupt register
2394: * represents one or many requests)
2395: * (3) we never announce a stray interrupt (because of (1), another
2396: * interrupt request can come in while we're in the handler. If
2397: * the handler deals with everything for both the original & the
2398: * new request, we'll erroneously report a stray interrupt when
2399: * we take the software interrupt for the new request.
2400: *
2401: * Inputs:
2402: * %l0 = %psr
2403: * %l1 = return pc
2404: * %l2 = return npc
2405: * %l3 = interrupt level
2406: * (software interrupt only) %l4 = bits to clear in interrupt register
2407: *
2408: * Internal:
2409: * %l4, %l5: local variables
2410: * %l6 = %y
2411: * %l7 = %g1
2412: * %g2..%g7 go to stack
2413: *
2414: * An interrupt frame is built in the space for a full trapframe;
2415: * this contains the psr, pc, npc, and interrupt level.
2416: */
2417: softintr_sun44c:
2418: sethi %hi(INTRREG_VA), %l6
2419: ldub [%l6 + %lo(INTRREG_VA)], %l5
2420: andn %l5, %l4, %l5
2421: stb %l5, [%l6 + %lo(INTRREG_VA)]
2422:
2423: softintr_common:
2424: INTR_SETUP(-CCFSZ-80)
2425: std %g2, [%sp + CCFSZ + 24] ! save registers
2426: INCR(_C_LABEL(uvmexp)+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
2427: mov %g1, %l7
2428: rd %y, %l6
2429: std %g4, [%sp + CCFSZ + 32]
2430: andn %l0, PSR_PIL, %l4 ! %l4 = psr & ~PSR_PIL |
2431: sll %l3, 8, %l5 ! intlev << IPLSHIFT
2432: std %g6, [%sp + CCFSZ + 40]
2433: or %l5, %l4, %l4 ! ;
2434: wr %l4, 0, %psr ! the manual claims this
2435: wr %l4, PSR_ET, %psr ! song and dance is necessary
2436: std %l0, [%sp + CCFSZ + 0] ! set up intrframe/clockframe
2437: sll %l3, 2, %l5
2438: set _C_LABEL(intrcnt), %l4 ! intrcnt[intlev]++;
2439: ld [%l4 + %l5], %o0
2440: std %l2, [%sp + CCFSZ + 8]
2441: inc %o0
2442: st %o0, [%l4 + %l5]
2443: set _C_LABEL(intrhand), %l4 ! %l4 = intrhand[intlev];
2444: ld [%l4 + %l5], %l4
2445: b 3f
2446: st %fp, [%sp + CCFSZ + 16]
2447:
2448: 1: ld [%l4], %o1
2449: ld [%l4 + 4], %o0
2450: tst %o0
2451: bz,a 2f
2452: add %sp, CCFSZ, %o0
2453: 2: jmpl %o1, %o7 ! (void)(*ih->ih_fun)(...)
2454: ld [%l4 + 8], %l4 ! and ih = ih->ih_next
2455: 3: tst %l4 ! while ih != NULL
2456: bnz 1b
2457: nop
2458: mov %l7, %g1
2459: wr %l6, 0, %y
2460: ldd [%sp + CCFSZ + 24], %g2
2461: ldd [%sp + CCFSZ + 32], %g4
2462: ldd [%sp + CCFSZ + 40], %g6
2463: b return_from_trap
2464: wr %l0, 0, %psr
2465:
2466: /*
2467: * _sparc_interrupt{44c,4m} is exported for paranoia checking
2468: * (see intr.c).
2469: */
2470: #if defined(SUN4M)
2471: _ENTRY(_C_LABEL(sparc_interrupt4m))
1.148.4.6 nathanw 2472: #if !defined(MSIIEP) /* "normal" sun4m */
1.148.4.2 pk 2473: mov 1, %l4
2474: sethi %hi(CPUINFO_VA+CPUINFO_INTREG), %l6
2475: ld [%l6 + %lo(CPUINFO_VA+CPUINFO_INTREG)], %l6
2476: ld [%l6 + ICR_PI_PEND_OFFSET], %l5 ! get pending interrupts
2477: sll %l4, %l3, %l4 ! test SOFTINT bit
2478: andcc %l5, %l4, %g0
2479: bne sparc_interrupt_common
2480: nop
2481:
2482: ! a soft interrupt; clear bit in interrupt-pending register
2483: sll %l4, 16, %l5
2484: st %l5, [%l6 + ICR_PI_CLR_OFFSET]
2485: b,a softintr_common
1.148.4.6 nathanw 2486: #else /* MSIIEP */
2487: sethi %hi(MSIIEP_PCIC_VA), %l6
2488: mov 1, %l4
2489: ld [%l6 + PCIC_PROC_IPR_REG], %l5 ! get pending interrupts
2490: sll %l4, %l3, %l4
2491: btst %l4, %l5 ! has pending hw intr at this level?
2492: bnz sparc_interrupt_common
2493: nop
2494:
2495: ! a soft interrupt; clear its bit in softintr clear register
2496: b softintr_common
2497: sth %l4, [%l6 + PCIC_SOFT_INTR_CLEAR_REG]
2498: #endif /* MSIIEP */
2499: #endif /* SUN4M */
1.148.4.2 pk 2500:
2501: _ENTRY(_C_LABEL(sparc_interrupt44c))
2502: sparc_interrupt_common:
2503: INTR_SETUP(-CCFSZ-80)
2504: std %g2, [%sp + CCFSZ + 24] ! save registers
2505: INCR(_C_LABEL(uvmexp)+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
2506: mov %g1, %l7
2507: rd %y, %l6
2508: std %g4, [%sp + CCFSZ + 32]
2509: andn %l0, PSR_PIL, %l4 ! %l4 = psr & ~PSR_PIL |
2510: sll %l3, 8, %l5 ! intlev << IPLSHIFT
2511: std %g6, [%sp + CCFSZ + 40]
2512: or %l5, %l4, %l4 ! ;
2513: wr %l4, 0, %psr ! the manual claims this
2514: wr %l4, PSR_ET, %psr ! song and dance is necessary
2515: std %l0, [%sp + CCFSZ + 0] ! set up intrframe/clockframe
2516: sll %l3, 2, %l5
2517: set _C_LABEL(intrcnt), %l4 ! intrcnt[intlev]++;
2518: ld [%l4 + %l5], %o0
2519: std %l2, [%sp + CCFSZ + 8] ! set up intrframe/clockframe
2520: inc %o0
2521: st %o0, [%l4 + %l5]
2522: set _C_LABEL(intrhand), %l4 ! %l4 = intrhand[intlev];
2523: ld [%l4 + %l5], %l4
2524:
2525: #if defined(MULTIPROCESSOR) && defined(SUN4M) /* XXX */
2526: call _C_LABEL(intr_lock_kernel)
2527: nop
2528: #endif
2529:
2530: b 3f
2531: st %fp, [%sp + CCFSZ + 16]
2532:
2533: 1: ld [%l4], %o1
2534: ld [%l4 + 4], %o0
2535: tst %o0
2536: bz,a 2f
2537: add %sp, CCFSZ, %o0
2538: 2: jmpl %o1, %o7 ! handled = (*ih->ih_fun)(...)
2539: ld [%l4 + 8], %l4 ! and ih = ih->ih_next
2540: tst %o0
2541: bnz 4f ! if (handled) break
2542: nop
2543: 3: tst %l4
2544: bnz 1b ! while (ih)
2545: nop
2546:
2547: /* Unhandled interrupts while cold cause IPL to be raised to `high' */
2548: sethi %hi(_C_LABEL(cold)), %o0
2549: ld [%o0 + %lo(_C_LABEL(cold))], %o0
2550: tst %o0 ! if (cold) {
2551: bnz,a 4f ! splhigh();
2552: or %l0, 0xf00, %l0 ! } else
2553:
2554: call _C_LABEL(strayintr) ! strayintr(&intrframe)
2555: add %sp, CCFSZ, %o0
2556: /* all done: restore registers and go return */
2557: 4:
2558: #if defined(MULTIPROCESSOR) && defined(SUN4M) /* XXX */
2559: call _C_LABEL(intr_unlock_kernel)
2560: nop
2561: #endif
2562: mov %l7, %g1
2563: wr %l6, 0, %y
2564: ldd [%sp + CCFSZ + 24], %g2
2565: ldd [%sp + CCFSZ + 32], %g4
2566: ldd [%sp + CCFSZ + 40], %g6
2567: b return_from_trap
2568: wr %l0, 0, %psr
2569:
2570: #ifdef notyet
2571: /*
2572: * Level 12 (ZS serial) interrupt. Handle it quickly, schedule a
2573: * software interrupt, and get out. Do the software interrupt directly
2574: * if we would just take it on the way out.
2575: *
2576: * Input:
2577: * %l0 = %psr
2578: * %l1 = return pc
2579: * %l2 = return npc
2580: * Internal:
2581: * %l3 = zs device
2582: * %l4, %l5 = temporary
2583: * %l6 = rr3 (or temporary data) + 0x100 => need soft int
2584: * %l7 = zs soft status
2585: */
2586: zshard:
2587: #endif /* notyet */
2588:
2589: /*
2590: * Level 15 interrupt. An async memory error has occurred;
2591: * take care of it (typically by panicking, but hey...).
2592: * %l0 = %psr
2593: * %l1 = return pc
2594: * %l2 = return npc
2595: * %l3 = 15 * 4 (why? just because!)
2596: *
2597: * Internal:
2598: * %l4 = %y
2599: * %l5 = %g1
2600: * %l6 = %g6
2601: * %l7 = %g7
2602: * g2, g3, g4, g5 go to stack
2603: *
2604: * This code is almost the same as that in mem_access_fault,
2605: * except that we already know the problem is not a `normal' fault,
2606: * and that we must be extra-careful with interrupt enables.
2607: */
2608:
2609: #if defined(SUN4)
2610: nmi_sun4:
2611: INTR_SETUP(-CCFSZ-80)
2612: INCR(_C_LABEL(uvmexp)+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
2613: /*
2614: * Level 15 interrupts are nonmaskable, so with traps off,
2615: * disable all interrupts to prevent recursion.
2616: */
2617: sethi %hi(INTRREG_VA), %o0
2618: ldub [%o0 + %lo(INTRREG_VA)], %o1
1.148.4.9 nathanw 2619: andn %o1, IE_ALLIE, %o1
1.148.4.2 pk 2620: stb %o1, [%o0 + %lo(INTRREG_VA)]
2621: wr %l0, PSR_ET, %psr ! okay, turn traps on again
2622:
2623: std %g2, [%sp + CCFSZ + 0] ! save g2, g3
2624: rd %y, %l4 ! save y
2625:
2626: std %g4, [%sp + CCFSZ + 8] ! save g4, g5
2627: mov %g1, %l5 ! save g1, g6, g7
2628: mov %g6, %l6
2629: mov %g7, %l7
2630: #if defined(SUN4C) || defined(SUN4M)
2631: b,a nmi_common
2632: #endif /* SUN4C || SUN4M */
2633: #endif
2634:
2635: #if defined(SUN4C)
2636: nmi_sun4c:
2637: INTR_SETUP(-CCFSZ-80)
2638: INCR(_C_LABEL(uvmexp)+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
2639: /*
2640: * Level 15 interrupts are nonmaskable, so with traps off,
2641: * disable all interrupts to prevent recursion.
2642: */
2643: sethi %hi(INTRREG_VA), %o0
2644: ldub [%o0 + %lo(INTRREG_VA)], %o1
1.148.4.9 nathanw 2645: andn %o1, IE_ALLIE, %o1
1.148.4.2 pk 2646: stb %o1, [%o0 + %lo(INTRREG_VA)]
2647: wr %l0, PSR_ET, %psr ! okay, turn traps on again
2648:
2649: std %g2, [%sp + CCFSZ + 0] ! save g2, g3
2650: rd %y, %l4 ! save y
2651:
2652: ! must read the sync error register too.
2653: set AC_SYNC_ERR, %o0
2654: lda [%o0] ASI_CONTROL, %o1 ! sync err reg
2655: inc 4, %o0
2656: lda [%o0] ASI_CONTROL, %o2 ! sync virt addr
2657: std %g4, [%sp + CCFSZ + 8] ! save g4,g5
2658: mov %g1, %l5 ! save g1,g6,g7
2659: mov %g6, %l6
2660: mov %g7, %l7
2661: inc 4, %o0
2662: lda [%o0] ASI_CONTROL, %o3 ! async err reg
2663: inc 4, %o0
2664: lda [%o0] ASI_CONTROL, %o4 ! async virt addr
2665: #if defined(SUN4M)
2666: !!b,a nmi_common
2667: #endif /* SUN4M */
2668: #endif /* SUN4C */
2669:
2670: nmi_common:
2671: ! and call C code
2672: call _C_LABEL(memerr4_4c) ! memerr(0, ser, sva, aer, ava)
2673: clr %o0
2674:
2675: mov %l5, %g1 ! restore g1 through g7
2676: ldd [%sp + CCFSZ + 0], %g2
2677: ldd [%sp + CCFSZ + 8], %g4
2678: wr %l0, 0, %psr ! re-disable traps
2679: mov %l6, %g6
2680: mov %l7, %g7
2681:
2682: ! set IE_ALLIE again (safe, we disabled traps again above)
2683: sethi %hi(INTRREG_VA), %o0
2684: ldub [%o0 + %lo(INTRREG_VA)], %o1
2685: or %o1, IE_ALLIE, %o1
2686: stb %o1, [%o0 + %lo(INTRREG_VA)]
2687: b return_from_trap
2688: wr %l4, 0, %y ! restore y
2689:
2690: #if defined(SUN4M)
2691: nmi_sun4m:
2692: INTR_SETUP(-CCFSZ-80)
2693: INCR(_C_LABEL(uvmexp)+V_INTR) ! cnt.v_intr++; (clobbers %o0,%o1)
2694:
2695: /* Read the Pending Interrupts register */
2696: sethi %hi(CPUINFO_VA+CPUINFO_INTREG), %l6
2697: ld [%l6 + %lo(CPUINFO_VA+CPUINFO_INTREG)], %l6
2698: ld [%l6 + ICR_PI_PEND_OFFSET], %l5 ! get pending interrupts
2699:
2700: set _C_LABEL(nmi_soft), %o3 ! assume a softint
2701: set PINTR_IC, %o1 ! hard lvl 15 bit
2702: sethi %hi(PINTR_SINTRLEV(15)), %o0 ! soft lvl 15 bit
2703: btst %o0, %l5 ! soft level 15?
2704: bnz,a 1f !
2705: mov %o0, %o1 ! shift int clear bit to SOFTINT 15
2706:
1.148.4.9 nathanw 2707: set _C_LABEL(nmi_hard), %o3 /* it's a hardint; switch handler */
1.148.4.2 pk 2708:
2709: /*
2710: * Level 15 interrupts are nonmaskable, so with traps off,
2711: * disable all interrupts to prevent recursion.
2712: */
2713: sethi %hi(ICR_SI_SET), %o0
2714: set SINTR_MA, %o2
2715: st %o2, [%o0 + %lo(ICR_SI_SET)]
2716: #if defined(MULTIPROCESSOR) && defined(DDB)
2717: b 2f
2718: clr %o0
2719: #endif
2720:
2721: 1:
2722: #if defined(MULTIPROCESSOR) && defined(DDB)
2723: /*
2724: * Setup a trapframe for nmi_soft; this might be an IPI telling
2725: * us to pause, so lets save some state for DDB to get at.
2726: */
2727: std %l0, [%sp + CCFSZ] ! tf.tf_psr = psr; tf.tf_pc = ret_pc;
2728: rd %y, %l3
2729: std %l2, [%sp + CCFSZ + 8] ! tf.tf_npc = return_npc; tf.tf_y = %y;
2730: st %g1, [%sp + CCFSZ + 20]
2731: std %g2, [%sp + CCFSZ + 24]
2732: std %g4, [%sp + CCFSZ + 32]
2733: std %g6, [%sp + CCFSZ + 40]
2734: std %i0, [%sp + CCFSZ + 48]
2735: std %i2, [%sp + CCFSZ + 56]
2736: std %i4, [%sp + CCFSZ + 64]
2737: std %i6, [%sp + CCFSZ + 72]
2738: add %sp, CCFSZ, %o0
2739: 2:
2740: #else
2741: clr %o0
2742: #endif
2743: /*
2744: * Now clear the NMI. Apparently, we must allow some time
2745: * to let the bits sink in..
2746: */
2747: st %o1, [%l6 + ICR_PI_CLR_OFFSET]
2748: nop; nop; nop;
2749: ld [%l6 + ICR_PI_PEND_OFFSET], %g0 ! drain register!?
2750: nop; nop; nop;
2751:
2752: wr %l0, PSR_ET, %psr ! okay, turn traps on again
2753:
2754: std %g2, [%sp + CCFSZ + 80] ! save g2, g3
2755: rd %y, %l4 ! save y
2756: std %g4, [%sp + CCFSZ + 88] ! save g4,g5
2757:
2758: /* Finish stackframe, call C trap handler */
2759: mov %g1, %l5 ! save g1,g6,g7
2760: mov %g6, %l6
2761:
2762: jmpl %o3, %o7 ! nmi_hard(0) or nmi_soft(&tf)
2763: mov %g7, %l7
2764:
2765: mov %l5, %g1 ! restore g1 through g7
2766: ldd [%sp + CCFSZ + 80], %g2
2767: ldd [%sp + CCFSZ + 88], %g4
2768: wr %l0, 0, %psr ! re-disable traps
2769: mov %l6, %g6
2770: mov %l7, %g7
2771:
2772: !cmp %o0, 0 ! was this a soft nmi
2773: !be 4f
1.148.4.9 nathanw 2774: /* XXX - we need to unblock `mask all ints' only on a hard nmi */
1.148.4.2 pk 2775:
2776: ! enable interrupts again (safe, we disabled traps again above)
2777: sethi %hi(ICR_SI_CLR), %o0
2778: set SINTR_MA, %o1
2779: st %o1, [%o0 + %lo(ICR_SI_CLR)]
2780:
2781: 4:
2782: b return_from_trap
2783: wr %l4, 0, %y ! restore y
2784: #endif /* SUN4M */
2785:
2786: #ifdef GPROF
2787: .globl window_of, winof_user
2788: .globl window_uf, winuf_user, winuf_ok, winuf_invalid
2789: .globl return_from_trap, rft_kernel, rft_user, rft_invalid
2790: .globl softtrap, slowtrap
2791: .globl clean_trap_window, _C_LABEL(_syscall)
2792: #endif
2793:
2794: /*
2795: * Window overflow trap handler.
2796: * %l0 = %psr
2797: * %l1 = return pc
2798: * %l2 = return npc
2799: */
2800: window_of:
2801: #ifdef TRIVIAL_WINDOW_OVERFLOW_HANDLER
2802: /* a trivial version that assumes %sp is ok */
2803: /* (for testing only!) */
2804: save %g0, %g0, %g0
2805: std %l0, [%sp + (0*8)]
2806: rd %psr, %l0
2807: mov 1, %l1
2808: sll %l1, %l0, %l0
2809: wr %l0, 0, %wim
2810: std %l2, [%sp + (1*8)]
2811: std %l4, [%sp + (2*8)]
2812: std %l6, [%sp + (3*8)]
2813: std %i0, [%sp + (4*8)]
2814: std %i2, [%sp + (5*8)]
2815: std %i4, [%sp + (6*8)]
2816: std %i6, [%sp + (7*8)]
2817: restore
2818: RETT
2819: #else
2820: /*
2821: * This is similar to TRAP_SETUP, but we do not want to spend
2822: * a lot of time, so we have separate paths for kernel and user.
2823: * We also know for sure that the window has overflowed.
2824: */
2825: btst PSR_PS, %l0
2826: bz winof_user
2827: sethi %hi(clean_trap_window), %l7
2828:
2829: /*
2830: * Overflow from kernel mode. Call clean_trap_window to
2831: * do the dirty work, then just return, since we know prev
2832: * window is valid. clean_trap_windows might dump all *user*
2833: * windows into the pcb, but we do not care: there is at
2834: * least one kernel window (a trap or interrupt frame!)
2835: * above us.
2836: */
2837: jmpl %l7 + %lo(clean_trap_window), %l4
2838: mov %g7, %l7 ! for clean_trap_window
2839:
2840: wr %l0, 0, %psr ! put back the @%*! cond. codes
2841: nop ! (let them settle in)
2842: RETT
2843:
2844: winof_user:
2845: /*
2846: * Overflow from user mode.
2847: * If clean_trap_window dumps the registers into the pcb,
2848: * rft_user will need to call trap(), so we need space for
2849: * a trap frame. We also have to compute pcb_nw.
2850: *
2851: * SHOULD EXPAND IN LINE TO AVOID BUILDING TRAP FRAME ON
2852: * `EASY' SAVES
2853: */
2854: sethi %hi(cpcb), %l6
2855: ld [%l6 + %lo(cpcb)], %l6
2856: ld [%l6 + PCB_WIM], %l5
2857: and %l0, 31, %l3
2858: sub %l3, %l5, %l5 /* l5 = CWP - pcb_wim */
2859: set uwtab, %l4
2860: ldub [%l4 + %l5], %l5 /* l5 = uwtab[l5] */
2861: st %l5, [%l6 + PCB_UW]
2862: jmpl %l7 + %lo(clean_trap_window), %l4
2863: mov %g7, %l7 ! for clean_trap_window
2864: sethi %hi(cpcb), %l6
2865: ld [%l6 + %lo(cpcb)], %l6
2866: set USPACE-CCFSZ-80, %l5
2867: add %l6, %l5, %sp /* over to kernel stack */
2868: CHECK_SP_REDZONE(%l6, %l5)
2869:
2870: /*
2871: * Copy return_from_trap far enough to allow us
2872: * to jump directly to rft_user_or_recover_pcb_windows
2873: * (since we know that is where we are headed).
2874: */
2875: ! and %l0, 31, %l3 ! still set (clean_trap_window
2876: ! leaves this register alone)
2877: set wmask, %l6
2878: ldub [%l6 + %l3], %l5 ! %l5 = 1 << ((CWP + 1) % nwindows)
2879: b rft_user_or_recover_pcb_windows
2880: rd %wim, %l4 ! (read %wim first)
2881: #endif /* end `real' version of window overflow trap handler */
2882:
2883: /*
2884: * Window underflow trap handler.
2885: * %l0 = %psr
2886: * %l1 = return pc
2887: * %l2 = return npc
2888: *
2889: * A picture:
2890: *
2891: * T R I X
2892: * 0 0 0 1 0 0 0 (%wim)
2893: * [bit numbers increase towards the right;
2894: * `restore' moves right & `save' moves left]
2895: *
2896: * T is the current (Trap) window, R is the window that attempted
2897: * a `Restore' instruction, I is the Invalid window, and X is the
2898: * window we want to make invalid before we return.
2899: *
2900: * Since window R is valid, we cannot use rft_user to restore stuff
2901: * for us. We have to duplicate its logic. YUCK.
2902: *
2903: * Incidentally, TRIX are for kids. Silly rabbit!
2904: */
2905: window_uf:
2906: #ifdef TRIVIAL_WINDOW_UNDERFLOW_HANDLER
2907: wr %g0, 0, %wim ! allow us to enter I
2908: restore ! to R
2909: nop
2910: nop
2911: restore ! to I
2912: restore %g0, 1, %l1 ! to X
2913: rd %psr, %l0
2914: sll %l1, %l0, %l0
2915: wr %l0, 0, %wim
2916: save %g0, %g0, %g0 ! back to I
2917: LOADWIN(%sp)
2918: save %g0, %g0, %g0 ! back to R
2919: save %g0, %g0, %g0 ! back to T
2920: RETT
2921: #else
2922: wr %g0, 0, %wim ! allow us to enter I
2923: btst PSR_PS, %l0
2924: restore ! enter window R
2925: bz winuf_user
2926: restore ! enter window I
2927:
2928: /*
2929: * Underflow from kernel mode. Just recover the
2930: * registers and go (except that we have to update
2931: * the blasted user pcb fields).
2932: */
2933: restore %g0, 1, %l1 ! enter window X, then set %l1 to 1
2934: rd %psr, %l0 ! cwp = %psr & 31;
2935: and %l0, 31, %l0
2936: sll %l1, %l0, %l1 ! wim = 1 << cwp;
2937: wr %l1, 0, %wim ! setwim(wim);
2938: sethi %hi(cpcb), %l1
2939: ld [%l1 + %lo(cpcb)], %l1
2940: st %l0, [%l1 + PCB_WIM] ! cpcb->pcb_wim = cwp;
2941: save %g0, %g0, %g0 ! back to window I
2942: LOADWIN(%sp)
2943: save %g0, %g0, %g0 ! back to R
2944: save %g0, %g0, %g0 ! and then to T
2945: wr %l0, 0, %psr ! fix those cond codes....
2946: nop ! (let them settle in)
2947: RETT
2948:
2949: winuf_user:
2950: /*
2951: * Underflow from user mode.
2952: *
2953: * We cannot use rft_user (as noted above) because
2954: * we must re-execute the `restore' instruction.
2955: * Since it could be, e.g., `restore %l0,0,%l0',
2956: * it is not okay to touch R's registers either.
2957: *
2958: * We are now in window I.
2959: */
2960: btst 7, %sp ! if unaligned, it is invalid
2961: bne winuf_invalid
2962: EMPTY
2963:
2964: sethi %hi(_C_LABEL(pgofset)), %l4
2965: ld [%l4 + %lo(_C_LABEL(pgofset))], %l4
2966: PTE_OF_ADDR(%sp, %l7, winuf_invalid, %l4, NOP_ON_4M_5)
2967: CMP_PTE_USER_READ(%l7, %l5, NOP_ON_4M_6) ! if first page not readable,
2968: bne winuf_invalid ! it is invalid
2969: EMPTY
2970: SLT_IF_1PAGE_RW(%sp, %l7, %l4) ! first page is readable
2971: bl,a winuf_ok ! if only one page, enter window X
2972: restore %g0, 1, %l1 ! and goto ok, & set %l1 to 1
2973: add %sp, 7*8, %l5
2974: add %l4, 62, %l4
2975: PTE_OF_ADDR(%l5, %l7, winuf_invalid, %l4, NOP_ON_4M_7)
2976: CMP_PTE_USER_READ(%l7, %l5, NOP_ON_4M_8) ! check second page too
2977: be,a winuf_ok ! enter window X and goto ok
2978: restore %g0, 1, %l1 ! (and then set %l1 to 1)
2979:
2980: winuf_invalid:
2981: /*
2982: * We were unable to restore the window because %sp
2983: * is invalid or paged out. Return to the trap window
2984: * and call trap(T_WINUF). This will save R to the user
2985: * stack, then load both R and I into the pcb rw[] area,
2986: * and return with pcb_nsaved set to -1 for success, 0 for
2987: * failure. `Failure' indicates that someone goofed with the
2988: * trap registers (e.g., signals), so that we need to return
2989: * from the trap as from a syscall (probably to a signal handler)
2990: * and let it retry the restore instruction later. Note that
2991: * window R will have been pushed out to user space, and thus
2992: * be the invalid window, by the time we get back here. (We
2993: * continue to label it R anyway.) We must also set %wim again,
2994: * and set pcb_uw to 1, before enabling traps. (Window R is the
2995: * only window, and it is a user window).
2996: */
2997: save %g0, %g0, %g0 ! back to R
2998: save %g0, 1, %l4 ! back to T, then %l4 = 1
2999: sethi %hi(cpcb), %l6
3000: ld [%l6 + %lo(cpcb)], %l6
3001: st %l4, [%l6 + PCB_UW] ! pcb_uw = 1
3002: ld [%l6 + PCB_WIM], %l5 ! get log2(%wim)
3003: sll %l4, %l5, %l4 ! %l4 = old %wim
3004: wr %l4, 0, %wim ! window I is now invalid again
3005: set USPACE-CCFSZ-80, %l5
3006: add %l6, %l5, %sp ! get onto kernel stack
3007: CHECK_SP_REDZONE(%l6, %l5)
3008:
3009: /*
3010: * Okay, call trap(T_WINUF, psr, pc, &tf).
3011: * See `slowtrap' above for operation.
3012: */
3013: wr %l0, PSR_ET, %psr
3014: std %l0, [%sp + CCFSZ + 0] ! tf.tf_psr, tf.tf_pc
3015: rd %y, %l3
3016: std %l2, [%sp + CCFSZ + 8] ! tf.tf_npc, tf.tf_y
3017: mov T_WINUF, %o0
3018: st %g1, [%sp + CCFSZ + 20] ! tf.tf_global[1]
3019: mov %l0, %o1
3020: std %g2, [%sp + CCFSZ + 24] ! etc
3021: mov %l1, %o2
3022: std %g4, [%sp + CCFSZ + 32]
3023: add %sp, CCFSZ, %o3
3024: std %g6, [%sp + CCFSZ + 40]
3025: std %i0, [%sp + CCFSZ + 48] ! tf.tf_out[0], etc
3026: std %i2, [%sp + CCFSZ + 56]
3027: std %i4, [%sp + CCFSZ + 64]
3028: call _C_LABEL(trap) ! trap(T_WINUF, pc, psr, &tf)
3029: std %i6, [%sp + CCFSZ + 72] ! tf.tf_out[6]
3030:
3031: ldd [%sp + CCFSZ + 0], %l0 ! new psr, pc
3032: ldd [%sp + CCFSZ + 8], %l2 ! new npc, %y
3033: wr %l3, 0, %y
3034: ld [%sp + CCFSZ + 20], %g1
3035: ldd [%sp + CCFSZ + 24], %g2
3036: ldd [%sp + CCFSZ + 32], %g4
3037: ldd [%sp + CCFSZ + 40], %g6
3038: ldd [%sp + CCFSZ + 48], %i0 ! %o0 for window R, etc
3039: ldd [%sp + CCFSZ + 56], %i2
3040: ldd [%sp + CCFSZ + 64], %i4
3041: wr %l0, 0, %psr ! disable traps: test must be atomic
3042: ldd [%sp + CCFSZ + 72], %i6
3043: sethi %hi(cpcb), %l6
3044: ld [%l6 + %lo(cpcb)], %l6
3045: ld [%l6 + PCB_NSAVED], %l7 ! if nsaved is -1, we have our regs
3046: tst %l7
3047: bl,a 1f ! got them
3048: wr %g0, 0, %wim ! allow us to enter windows R, I
3049: b,a return_from_trap
3050:
3051: /*
3052: * Got 'em. Load 'em up.
3053: */
3054: 1:
3055: mov %g6, %l3 ! save %g6; set %g6 = cpcb
3056: mov %l6, %g6
3057: st %g0, [%g6 + PCB_NSAVED] ! and clear magic flag
3058: restore ! from T to R
3059: restore ! from R to I
3060: restore %g0, 1, %l1 ! from I to X, then %l1 = 1
3061: rd %psr, %l0 ! cwp = %psr;
3062: sll %l1, %l0, %l1
3063: wr %l1, 0, %wim ! make window X invalid
3064: and %l0, 31, %l0
3065: st %l0, [%g6 + PCB_WIM] ! cpcb->pcb_wim = cwp;
3066: nop ! unnecessary? old wim was 0...
3067: save %g0, %g0, %g0 ! back to I
3068: LOADWIN(%g6 + PCB_RW + 64) ! load from rw[1]
3069: save %g0, %g0, %g0 ! back to R
3070: LOADWIN(%g6 + PCB_RW) ! load from rw[0]
3071: save %g0, %g0, %g0 ! back to T
3072: wr %l0, 0, %psr ! restore condition codes
3073: mov %l3, %g6 ! fix %g6
3074: RETT
3075:
3076: /*
3077: * Restoring from user stack, but everything has checked out
3078: * as good. We are now in window X, and %l1 = 1. Window R
3079: * is still valid and holds user values.
3080: */
3081: winuf_ok:
3082: rd %psr, %l0
3083: sll %l1, %l0, %l1
3084: wr %l1, 0, %wim ! make this one invalid
3085: sethi %hi(cpcb), %l2
3086: ld [%l2 + %lo(cpcb)], %l2
3087: and %l0, 31, %l0
3088: st %l0, [%l2 + PCB_WIM] ! cpcb->pcb_wim = cwp;
3089: save %g0, %g0, %g0 ! back to I
3090: LOADWIN(%sp)
3091: save %g0, %g0, %g0 ! back to R
3092: save %g0, %g0, %g0 ! back to T
3093: wr %l0, 0, %psr ! restore condition codes
3094: nop ! it takes three to tangle
3095: RETT
3096: #endif /* end `real' version of window underflow trap handler */
3097:
3098: /*
3099: * Various return-from-trap routines (see return_from_trap).
3100: */
3101:
3102: /*
3103: * Return from trap, to kernel.
3104: * %l0 = %psr
3105: * %l1 = return pc
3106: * %l2 = return npc
3107: * %l4 = %wim
3108: * %l5 = bit for previous window
3109: */
3110: rft_kernel:
3111: btst %l5, %l4 ! if (wim & l5)
3112: bnz 1f ! goto reload;
3113: wr %l0, 0, %psr ! but first put !@#*% cond codes back
3114:
3115: /* previous window is valid; just rett */
3116: nop ! wait for cond codes to settle in
3117: RETT
3118:
3119: /*
3120: * Previous window is invalid.
3121: * Update %wim and then reload l0..i7 from frame.
3122: *
3123: * T I X
3124: * 0 0 1 0 0 (%wim)
3125: * [see picture in window_uf handler]
3126: *
3127: * T is the current (Trap) window, I is the Invalid window,
3128: * and X is the window we want to make invalid. Window X
3129: * currently has no useful values.
3130: */
3131: 1:
3132: wr %g0, 0, %wim ! allow us to enter window I
3133: nop; nop; nop ! (it takes a while)
3134: restore ! enter window I
3135: restore %g0, 1, %l1 ! enter window X, then %l1 = 1
3136: rd %psr, %l0 ! CWP = %psr & 31;
3137: and %l0, 31, %l0
3138: sll %l1, %l0, %l1 ! wim = 1 << CWP;
3139: wr %l1, 0, %wim ! setwim(wim);
3140: sethi %hi(cpcb), %l1
3141: ld [%l1 + %lo(cpcb)], %l1
3142: st %l0, [%l1 + PCB_WIM] ! cpcb->pcb_wim = l0 & 31;
3143: save %g0, %g0, %g0 ! back to window I
3144: LOADWIN(%sp)
3145: save %g0, %g0, %g0 ! back to window T
3146: /*
3147: * Note that the condition codes are still set from
3148: * the code at rft_kernel; we can simply return.
3149: */
3150: RETT
3151:
3152: /*
3153: * Return from trap, to user. Checks for scheduling trap (`ast') first;
3154: * will re-enter trap() if set. Note that we may have to switch from
3155: * the interrupt stack to the kernel stack in this case.
3156: * %l0 = %psr
3157: * %l1 = return pc
3158: * %l2 = return npc
3159: * %l4 = %wim
3160: * %l5 = bit for previous window
3161: * %l6 = cpcb
3162: * If returning to a valid window, just set psr and return.
3163: */
3164: rft_user:
3165: ! sethi %hi(_C_LABEL(want_ast)), %l7 ! (done below)
3166: ld [%l7 + %lo(_C_LABEL(want_ast))], %l7
3167: tst %l7 ! want AST trap?
3168: bne,a softtrap ! yes, re-enter trap with type T_AST
3169: mov T_AST, %o0
3170:
3171: btst %l5, %l4 ! if (wim & l5)
3172: bnz 1f ! goto reload;
3173: wr %l0, 0, %psr ! restore cond codes
3174: nop ! (three instruction delay)
3175: RETT
3176:
3177: /*
3178: * Previous window is invalid.
3179: * Before we try to load it, we must verify its stack pointer.
3180: * This is much like the underflow handler, but a bit easier
3181: * since we can use our own local registers.
3182: */
3183: 1:
3184: btst 7, %fp ! if unaligned, address is invalid
3185: bne rft_invalid
3186: EMPTY
3187:
3188: sethi %hi(_C_LABEL(pgofset)), %l3
3189: ld [%l3 + %lo(_C_LABEL(pgofset))], %l3
3190: PTE_OF_ADDR(%fp, %l7, rft_invalid, %l3, NOP_ON_4M_9)
3191: CMP_PTE_USER_READ(%l7, %l5, NOP_ON_4M_10) ! try first page
3192: bne rft_invalid ! no good
3193: EMPTY
3194: SLT_IF_1PAGE_RW(%fp, %l7, %l3)
3195: bl,a rft_user_ok ! only 1 page: ok
3196: wr %g0, 0, %wim
3197: add %fp, 7*8, %l5
3198: add %l3, 62, %l3
3199: PTE_OF_ADDR(%l5, %l7, rft_invalid, %l3, NOP_ON_4M_11)
3200: CMP_PTE_USER_READ(%l7, %l5, NOP_ON_4M_12) ! check 2nd page too
3201: be,a rft_user_ok
3202: wr %g0, 0, %wim
3203:
3204: /*
3205: * The window we wanted to pull could not be pulled. Instead,
3206: * re-enter trap with type T_RWRET. This will pull the window
3207: * into cpcb->pcb_rw[0] and set cpcb->pcb_nsaved to -1, which we
3208: * will detect when we try to return again.
3209: */
3210: rft_invalid:
3211: b softtrap
3212: mov T_RWRET, %o0
3213:
3214: /*
3215: * The window we want to pull can be pulled directly.
3216: */
3217: rft_user_ok:
3218: ! wr %g0, 0, %wim ! allow us to get into it
3219: wr %l0, 0, %psr ! fix up the cond codes now
3220: nop; nop; nop
3221: restore ! enter window I
3222: restore %g0, 1, %l1 ! enter window X, then %l1 = 1
3223: rd %psr, %l0 ! l0 = (junk << 5) + CWP;
3224: sll %l1, %l0, %l1 ! %wim = 1 << CWP;
3225: wr %l1, 0, %wim
3226: sethi %hi(cpcb), %l1
3227: ld [%l1 + %lo(cpcb)], %l1
3228: and %l0, 31, %l0
3229: st %l0, [%l1 + PCB_WIM] ! cpcb->pcb_wim = l0 & 31;
3230: save %g0, %g0, %g0 ! back to window I
3231: LOADWIN(%sp) ! suck hard
3232: save %g0, %g0, %g0 ! back to window T
3233: RETT
3234:
3235: /*
3236: * Return from trap. Entered after a
3237: * wr %l0, 0, %psr
3238: * which disables traps so that we can rett; registers are:
3239: *
3240: * %l0 = %psr
3241: * %l1 = return pc
3242: * %l2 = return npc
3243: *
3244: * (%l3..%l7 anything).
3245: *
3246: * If we are returning to user code, we must:
3247: * 1. Check for register windows in the pcb that belong on the stack.
3248: * If there are any, reenter trap with type T_WINOF.
3249: * 2. Make sure the register windows will not underflow. This is
3250: * much easier in kernel mode....
3251: */
3252: return_from_trap:
3253: ! wr %l0, 0, %psr ! disable traps so we can rett
3254: ! (someone else did this already)
3255: and %l0, 31, %l5
3256: set wmask, %l6
3257: ldub [%l6 + %l5], %l5 ! %l5 = 1 << ((CWP + 1) % nwindows)
3258: btst PSR_PS, %l0 ! returning to userland?
3259: bnz rft_kernel ! no, go return to kernel
3260: rd %wim, %l4 ! (read %wim in any case)
3261:
3262: rft_user_or_recover_pcb_windows:
3263: /*
3264: * (entered with %l4=%wim, %l5=wmask[cwp]; %l0..%l2 as usual)
3265: *
3266: * check cpcb->pcb_nsaved:
3267: * if 0, do a `normal' return to user (see rft_user);
3268: * if > 0, cpcb->pcb_rw[] holds registers to be copied to stack;
3269: * if -1, cpcb->pcb_rw[0] holds user registers for rett window
3270: * from an earlier T_RWRET pseudo-trap.
3271: */
3272: sethi %hi(cpcb), %l6
3273: ld [%l6 + %lo(cpcb)], %l6
3274: ld [%l6 + PCB_NSAVED], %l7
3275: tst %l7
3276: bz,a rft_user
3277: sethi %hi(_C_LABEL(want_ast)), %l7 ! first instr of rft_user
3278:
3279: bg,a softtrap ! if (pcb_nsaved > 0)
3280: mov T_WINOF, %o0 ! trap(T_WINOF);
3281:
3282: /*
3283: * To get here, we must have tried to return from a previous
3284: * trap and discovered that it would cause a window underflow.
3285: * We then must have tried to pull the registers out of the
3286: * user stack (from the address in %fp==%i6) and discovered
3287: * that it was either unaligned or not loaded in memory, and
3288: * therefore we ran a trap(T_RWRET), which loaded one set of
3289: * registers into cpcb->pcb_pcb_rw[0] (if it had killed the
3290: * process due to a bad stack, we would not be here).
3291: *
3292: * We want to load pcb_rw[0] into the previous window, which
3293: * we know is currently invalid. In other words, we want
3294: * %wim to be 1 << ((cwp + 2) % nwindows).
3295: */
3296: wr %g0, 0, %wim ! enable restores
3297: mov %g6, %l3 ! save g6 in l3
3298: mov %l6, %g6 ! set g6 = &u
3299: st %g0, [%g6 + PCB_NSAVED] ! clear cpcb->pcb_nsaved
3300: restore ! enter window I
3301: restore %g0, 1, %l1 ! enter window X, then %l1 = 1
3302: rd %psr, %l0
3303: sll %l1, %l0, %l1 ! %wim = 1 << CWP;
3304: wr %l1, 0, %wim
3305: and %l0, 31, %l0
3306: st %l0, [%g6 + PCB_WIM] ! cpcb->pcb_wim = CWP;
3307: nop ! unnecessary? old wim was 0...
3308: save %g0, %g0, %g0 ! back to window I
3309: LOADWIN(%g6 + PCB_RW)
3310: save %g0, %g0, %g0 ! back to window T (trap window)
3311: wr %l0, 0, %psr ! cond codes, cond codes everywhere
3312: mov %l3, %g6 ! restore g6
3313: RETT
3314:
3315: ! exported end marker for kernel gdb
3316: .globl _C_LABEL(endtrapcode)
3317: _C_LABEL(endtrapcode):
3318:
3319: /*
3320: * init_tables(nwin) int nwin;
3321: *
3322: * Set up the uwtab and wmask tables.
3323: * We know nwin > 1.
3324: */
3325: init_tables:
3326: /*
3327: * for (i = -nwin, j = nwin - 2; ++i < 0; j--)
3328: * uwtab[i] = j;
3329: * (loop runs at least once)
3330: */
3331: set uwtab, %o3
3332: sub %g0, %o0, %o1 ! i = -nwin + 1
3333: inc %o1
3334: add %o0, -2, %o2 ! j = nwin - 2;
3335: 0:
3336: stb %o2, [%o3 + %o1] ! uwtab[i] = j;
3337: 1:
3338: inccc %o1 ! ++i < 0?
3339: bl 0b ! yes, continue loop
3340: dec %o2 ! in any case, j--
3341:
3342: /*
3343: * (i now equals 0)
3344: * for (j = nwin - 1; i < nwin; i++, j--)
3345: * uwtab[i] = j;
3346: * (loop runs at least twice)
3347: */
3348: sub %o0, 1, %o2 ! j = nwin - 1
3349: 0:
3350: stb %o2, [%o3 + %o1] ! uwtab[i] = j
3351: inc %o1 ! i++
3352: 1:
3353: cmp %o1, %o0 ! i < nwin?
3354: bl 0b ! yes, continue
3355: dec %o2 ! in any case, j--
3356:
3357: /*
3358: * We observe that, for i in 0..nwin-2, (i+1)%nwin == i+1;
3359: * for i==nwin-1, (i+1)%nwin == 0.
3360: * To avoid adding 1, we run i from 1 to nwin and set
3361: * wmask[i-1].
3362: *
3363: * for (i = j = 1; i < nwin; i++) {
3364: * j <<= 1; (j now == 1 << i)
3365: * wmask[i - 1] = j;
3366: * }
3367: * (loop runs at least once)
3368: */
3369: set wmask - 1, %o3
3370: mov 1, %o1 ! i = 1;
3371: mov 2, %o2 ! j = 2;
3372: 0:
3373: stb %o2, [%o3 + %o1] ! (wmask - 1)[i] = j;
3374: inc %o1 ! i++
3375: cmp %o1, %o0 ! i < nwin?
3376: bl,a 0b ! yes, continue
3377: sll %o2, 1, %o2 ! (and j <<= 1)
3378:
3379: /*
3380: * Now i==nwin, so we want wmask[i-1] = 1.
3381: */
3382: mov 1, %o2 ! j = 1;
3383: retl
3384: stb %o2, [%o3 + %o1] ! (wmask - 1)[i] = j;
3385:
3386: #ifdef SUN4
3387: /*
3388: * getidprom(struct idprom *, sizeof(struct idprom))
3389: */
3390: _ENTRY(_C_LABEL(getidprom))
3391: set AC_IDPROM, %o2
3392: 1: lduba [%o2] ASI_CONTROL, %o3
3393: stb %o3, [%o0]
3394: inc %o0
3395: inc %o2
3396: dec %o1
3397: cmp %o1, 0
3398: bne 1b
3399: nop
3400: retl
3401: nop
3402: #endif
3403:
3404: dostart:
3405: /*
3406: * Startup.
3407: *
3408: * We have been loaded in low RAM, at some address which
3409: * is page aligned (PROM_LOADADDR actually) rather than where we
3410: * want to run (KERNBASE+PROM_LOADADDR). Until we get everything set,
3411: * we have to be sure to use only pc-relative addressing.
3412: */
3413:
3414: /*
3415: * We now use the bootinfo method to pass arguments, and the new
1.148.4.8 nathanw 3416: * magic number indicates that. A pointer to the kernel top, i.e.
3417: * the first address after the load kernel image (including DDB
3418: * symbols, if any) is passed in %o4[0] and the bootinfo structure
3419: * is passed in %o4[1].
3420: *
3421: * A magic number is passed in %o5 to allow for bootloaders
3422: * that know nothing about the bootinfo structure or previous
3423: * DDB symbol loading conventions.
1.148.4.2 pk 3424: *
3425: * For compatibility with older versions, we check for DDB arguments
1.148.4.8 nathanw 3426: * if the older magic number is there. The loader passes `kernel_top'
3427: * (previously known as `esym') in %o4.
3428: *
1.148.4.2 pk 3429: * Note: we don't touch %o1-%o3; SunOS bootloaders seem to use them
3430: * for their own mirky business.
3431: *
1.148.4.8 nathanw 3432: * Pre-NetBSD 1.3 bootblocks had KERNBASE compiled in, and used it
3433: * to compute the value of `kernel_top' (previously known as `esym').
3434: * In order to successfully boot a kernel built with a different value
3435: * for KERNBASE using old bootblocks, we fixup `kernel_top' here by
3436: * the difference between KERNBASE and the old value (known to be
3437: * 0xf8000000) compiled into pre-1.3 bootblocks.
1.148.4.2 pk 3438: */
3439: set KERNBASE, %l4
3440:
3441: set 0x44444232, %l3 ! bootinfo magic
3442: cmp %o5, %l3
3443: bne 1f
3444: nop
3445:
3446: /* The loader has passed to us a `bootinfo' structure */
1.148.4.8 nathanw 3447: ld [%o4], %l3 ! 1st word is kernel_top
3448: add %l3, %l4, %o5 ! relocate: + KERNBASE
3449: sethi %hi(_C_LABEL(kernel_top) - KERNBASE), %l3 ! and store it
3450: st %o5, [%l3 + %lo(_C_LABEL(kernel_top) - KERNBASE)]
1.148.4.2 pk 3451:
3452: ld [%o4 + 4], %l3 ! 2nd word is bootinfo
3453: add %l3, %l4, %o5 ! relocate
3454: sethi %hi(_C_LABEL(bootinfo) - KERNBASE), %l3 ! store bootinfo
3455: st %o5, [%l3 + %lo(_C_LABEL(bootinfo) - KERNBASE)]
1.148.4.8 nathanw 3456: b,a 4f
1.148.4.2 pk 3457:
3458: 1:
1.148.4.8 nathanw 3459: #ifdef DDB
1.148.4.2 pk 3460: /* Check for old-style DDB loader magic */
1.148.4.8 nathanw 3461: set 0x44444231, %l3 ! Is it DDB_MAGIC1?
1.148.4.2 pk 3462: cmp %o5, %l3
3463: be,a 2f
3464: clr %l4 ! if DDB_MAGIC1, clear %l4
3465:
1.148.4.8 nathanw 3466: set 0x44444230, %l3 ! Is it DDB_MAGIC0?
3467: cmp %o5, %l3 ! if so, need to relocate %o4
1.148.4.9 nathanw 3468: bne 3f /* if not, there's no bootloader info */
1.148.4.2 pk 3469:
3470: ! note: %l4 set to KERNBASE above.
3471: set 0xf8000000, %l5 ! compute correction term:
3472: sub %l5, %l4, %l4 ! old KERNBASE (0xf8000000 ) - KERNBASE
3473:
3474: 2:
3475: tst %o4 ! do we have the symbols?
3476: bz 3f
3477: sub %o4, %l4, %o4 ! apply compat correction
1.148.4.8 nathanw 3478: sethi %hi(_C_LABEL(kernel_top) - KERNBASE), %l3 ! and store it
3479: st %o4, [%l3 + %lo(_C_LABEL(kernel_top) - KERNBASE)]
3480: b,a 4f
1.148.4.2 pk 3481: 3:
3482: #endif
3483: /*
1.148.4.8 nathanw 3484: * The boot loader did not pass in a value for `kernel_top';
3485: * let it default to `end'.
3486: */
3487: set end, %o4
3488: sethi %hi(_C_LABEL(kernel_top) - KERNBASE), %l3 ! store kernel_top
3489: st %o4, [%l3 + %lo(_C_LABEL(kernel_top) - KERNBASE)]
3490:
3491: 4:
3492:
3493: /*
1.148.4.2 pk 3494: * Sun4 passes in the `load address'. Although possible, its highly
3495: * unlikely that OpenBoot would place the prom vector there.
3496: */
3497: set PROM_LOADADDR, %g7
3498: cmp %o0, %g7
3499: be is_sun4
3500: nop
3501:
1.148.4.11! nathanw 3502: #if defined(SUN4C) || defined(SUN4M) || defined(SUN4D)
1.148.4.2 pk 3503: /*
3504: * Be prepared to get OF client entry in either %o0 or %o3.
1.148.4.11! nathanw 3505: * XXX Will this ever trip on sun4d? Let's hope not!
1.148.4.2 pk 3506: */
3507: cmp %o0, 0
3508: be is_openfirm
3509: nop
3510:
3511: mov %o0, %g7 ! save romp passed by boot code
3512:
3513: /* First, check `romp->pv_magic' */
3514: ld [%g7 + PV_MAGIC], %o0 ! v = pv->pv_magic
3515: set OBP_MAGIC, %o1
3516: cmp %o0, %o1 ! if ( v != OBP_MAGIC) {
3517: bne is_sun4m ! assume this is an OPENFIRM machine
3518: nop ! }
3519:
3520: /*
1.148.4.11! nathanw 3521: * are we on a sun4c or a sun4m or a sun4d?
1.148.4.2 pk 3522: */
3523: ld [%g7 + PV_NODEOPS], %o4 ! node = pv->pv_nodeops->no_nextnode(0)
3524: ld [%o4 + NO_NEXTNODE], %o4
3525: call %o4
3526: mov 0, %o0 ! node
3527:
3528: mov %o0, %l0
3529: set cputypvar-KERNBASE, %o1 ! name = "compatible"
3530: set cputypval-KERNBASE, %o2 ! buffer ptr (assume buffer long enough)
3531: ld [%g7 + PV_NODEOPS], %o4 ! (void)pv->pv_nodeops->no_getprop(...)
3532: ld [%o4 + NO_GETPROP], %o4
3533: call %o4
3534: nop
3535: set cputypval-KERNBASE, %o2 ! buffer ptr
3536: ldub [%o2 + 4], %o0 ! which is it... "sun4c", "sun4m", "sun4d"?
3537: cmp %o0, 'c'
3538: be is_sun4c
3539: nop
3540: cmp %o0, 'm'
3541: be is_sun4m
3542: nop
1.148.4.11! nathanw 3543: cmp %o0, 'd'
! 3544: be is_sun4d
! 3545: nop
! 3546: #endif /* SUN4C || SUN4M || SUN4D */
1.148.4.2 pk 3547:
1.148.4.11! nathanw 3548: /*
! 3549: * Don't know what type of machine this is; just halt back
! 3550: * out to the PROM.
! 3551: */
1.148.4.2 pk 3552: ld [%g7 + PV_HALT], %o1 ! by this kernel, then halt
3553: call %o1
3554: nop
3555:
3556: is_openfirm:
3557: ! OF client entry in %o3 (kernel booted directly by PROM?)
3558: mov %o3, %g7
3559: /* FALLTHROUGH to sun4m case */
3560:
3561: is_sun4m:
3562: #if defined(SUN4M)
3563: set trapbase_sun4m, %g6
3564: mov SUN4CM_PGSHIFT, %g5
3565: b start_havetype
3566: mov CPU_SUN4M, %g4
3567: #else
3568: set sun4m_notsup-KERNBASE, %o0
3569: ld [%g7 + PV_EVAL], %o1
3570: call %o1 ! print a message saying that the
3571: nop ! sun4m architecture is not supported
3572: ld [%g7 + PV_HALT], %o1 ! by this kernel, then halt
3573: call %o1
3574: nop
3575: /*NOTREACHED*/
3576: #endif
1.148.4.11! nathanw 3577: is_sun4d:
! 3578: #if defined(SUN4D)
! 3579: set trapbase_sun4m, %g6 /* XXXJRT trapbase_sun4d */
! 3580: mov SUN4CM_PGSHIFT, %g5
! 3581: b start_havetype
! 3582: mov CPU_SUN4D, %g4
! 3583: #else
! 3584: set sun4d_notsup-KERNBASE, %o0
! 3585: ld [%g7 + PV_EVAL], %o1
! 3586: call %o1 ! print a message saying that the
! 3587: nop ! sun4d architecture is not supported
! 3588: ld [%g7 + PV_HALT], %o1 ! by this kernel, then halt
! 3589: call %o1
! 3590: nop
! 3591: /*NOTREACHED*/
! 3592: #endif
1.148.4.2 pk 3593: is_sun4c:
3594: #if defined(SUN4C)
3595: set trapbase_sun4c, %g6
3596: mov SUN4CM_PGSHIFT, %g5
3597:
3598: set AC_CONTEXT, %g1 ! paranoia: set context to kernel
3599: stba %g0, [%g1] ASI_CONTROL
3600:
3601: b start_havetype
3602: mov CPU_SUN4C, %g4 ! XXX CPU_SUN4
3603: #else
3604: set sun4c_notsup-KERNBASE, %o0
3605:
3606: ld [%g7 + PV_ROMVEC_VERS], %o1
3607: cmp %o1, 0
3608: bne 1f
3609: nop
3610:
3611: ! stupid version 0 rom interface is pv_eval(int length, char *string)
3612: mov %o0, %o1
3613: 2: ldub [%o0], %o4
3614: bne 2b
3615: inc %o0
3616: dec %o0
3617: sub %o0, %o1, %o0
3618:
3619: 1: ld [%g7 + PV_EVAL], %o2
3620: call %o2 ! print a message saying that the
3621: nop ! sun4c architecture is not supported
3622: ld [%g7 + PV_HALT], %o1 ! by this kernel, then halt
3623: call %o1
3624: nop
3625: /*NOTREACHED*/
3626: #endif
3627: is_sun4:
3628: #if defined(SUN4)
3629: set trapbase_sun4, %g6
3630: mov SUN4_PGSHIFT, %g5
3631:
3632: set AC_CONTEXT, %g1 ! paranoia: set context to kernel
3633: stba %g0, [%g1] ASI_CONTROL
3634:
3635: b start_havetype
3636: mov CPU_SUN4, %g4
3637: #else
3638: set PROM_BASE, %g7
3639:
3640: set sun4_notsup-KERNBASE, %o0
3641: ld [%g7 + OLDMON_PRINTF], %o1
3642: call %o1 ! print a message saying that the
3643: nop ! sun4 architecture is not supported
3644: ld [%g7 + OLDMON_HALT], %o1 ! by this kernel, then halt
3645: call %o1
3646: nop
3647: /*NOTREACHED*/
3648: #endif
3649:
3650: start_havetype:
3651: /*
3652: * Step 1: double map low RAM (addresses [0.._end-start-1])
3653: * to KERNBASE (addresses [KERNBASE.._end-1]). None of these
3654: * are `bad' aliases (since they are all on segment boundaries)
3655: * so we do not have to worry about cache aliasing.
3656: *
3657: * We map in another couple of segments just to have some
3658: * more memory (512K, actually) guaranteed available for
3659: * bootstrap code (pmap_bootstrap needs memory to hold MMU
3660: * and context data structures). Note: this is only relevant
3661: * for 2-level MMU sun4/sun4c machines.
3662: */
3663: clr %l0 ! lowva
3664: set KERNBASE, %l1 ! highva
1.148.4.8 nathanw 3665:
3666: sethi %hi(_C_LABEL(kernel_top) - KERNBASE), %o0
3667: ld [%o0 + %lo(_C_LABEL(kernel_top) - KERNBASE)], %o1
3668: set (2 << 18), %o2 ! add slack for sun4c MMU
3669: add %o1, %o2, %l2 ! last va that must be remapped
3670:
1.148.4.2 pk 3671: /*
3672: * Need different initial mapping functions for different
3673: * types of machines.
3674: */
3675: #if defined(SUN4C)
3676: cmp %g4, CPU_SUN4C
3677: bne 1f
3678: set 1 << 18, %l3 ! segment size in bytes
3679: 0:
3680: lduba [%l0] ASI_SEGMAP, %l4 ! segmap[highva] = segmap[lowva];
3681: stba %l4, [%l1] ASI_SEGMAP
3682: add %l3, %l1, %l1 ! highva += segsiz;
3683: cmp %l1, %l2 ! done?
3684: blu 0b ! no, loop
3685: add %l3, %l0, %l0 ! (and lowva += segsz)
3686: b,a startmap_done
3687: 1:
3688: #endif /* SUN4C */
3689:
3690: #if defined(SUN4)
3691: cmp %g4, CPU_SUN4
3692: bne 2f
3693: #if defined(SUN4_MMU3L)
3694: set AC_IDPROM+1, %l3
3695: lduba [%l3] ASI_CONTROL, %l3
3696: cmp %l3, 0x24 ! XXX - SUN4_400
3697: bne no_3mmu
3698: nop
3699:
3700: /*
3701: * Three-level sun4 MMU.
3702: * Double-map by duplicating a single region entry (which covers
3703: * 16MB) corresponding to the kernel's virtual load address.
3704: */
3705: add %l0, 2, %l0 ! get to proper half-word in RG space
3706: add %l1, 2, %l1
3707: lduha [%l0] ASI_REGMAP, %l4 ! regmap[highva] = regmap[lowva];
3708: stha %l4, [%l1] ASI_REGMAP
3709: b,a startmap_done
3710: no_3mmu:
3711: #endif
3712:
3713: /*
3714: * Three-level sun4 MMU.
3715: * Double-map by duplicating the required number of segment
3716: * entries corresponding to the kernel's virtual load address.
3717: */
3718: set 1 << 18, %l3 ! segment size in bytes
3719: 0:
3720: lduha [%l0] ASI_SEGMAP, %l4 ! segmap[highva] = segmap[lowva];
3721: stha %l4, [%l1] ASI_SEGMAP
3722: add %l3, %l1, %l1 ! highva += segsiz;
3723: cmp %l1, %l2 ! done?
3724: blu 0b ! no, loop
3725: add %l3, %l0, %l0 ! (and lowva += segsz)
3726: b,a startmap_done
3727: 2:
3728: #endif /* SUN4 */
3729:
1.148.4.11! nathanw 3730: #if defined(SUN4M) || defined(SUN4D)
! 3731: cmp %g4, CPU_SUN4M
! 3732: beq 3f
! 3733: nop
! 3734: cmp %g4, CPU_SUN4D
! 3735: bne 4f
1.148.4.2 pk 3736:
1.148.4.11! nathanw 3737: 3:
1.148.4.2 pk 3738: /*
3739: * The OBP guarantees us a 16MB mapping using a level 1 PTE at
3740: * the start of the memory bank in which we were loaded. All we
3741: * have to do is copy the entry.
3742: * Also, we must check to see if we have a TI Viking in non-mbus mode,
3743: * and if so do appropriate flipping and turning off traps before
3744: * we dork with MMU passthrough. -grrr
3745: */
3746:
3747: sethi %hi(0x40000000), %o1 ! TI version bit
3748: rd %psr, %o0
3749: andcc %o0, %o1, %g0
3750: be remap_notvik ! is non-TI normal MBUS module
3751: lda [%g0] ASI_SRMMU, %o0 ! load MMU
3752: andcc %o0, 0x800, %g0
3753: bne remap_notvik ! It is a viking MBUS module
3754: nop
3755:
3756: /*
3757: * Ok, we have a non-Mbus TI Viking, a MicroSparc.
3758: * In this scenerio, in order to play with the MMU
3759: * passthrough safely, we need turn off traps, flip
3760: * the AC bit on in the mmu status register, do our
3761: * passthroughs, then restore the mmu reg and %psr
3762: */
3763: rd %psr, %o4 ! saved here till done
3764: andn %o4, 0x20, %o5
3765: wr %o5, 0x0, %psr
3766: nop; nop; nop;
3767: set SRMMU_CXTPTR, %o0
3768: lda [%o0] ASI_SRMMU, %o0 ! get context table ptr
3769: sll %o0, 4, %o0 ! make physical
3770: lda [%g0] ASI_SRMMU, %o3 ! hold mmu-sreg here
3771: /* 0x8000 is AC bit in Viking mmu-ctl reg */
3772: set 0x8000, %o2
3773: or %o3, %o2, %o2
3774: sta %o2, [%g0] ASI_SRMMU ! AC bit on
3775:
3776: lda [%o0] ASI_BYPASS, %o1
3777: srl %o1, 4, %o1
3778: sll %o1, 8, %o1 ! get phys addr of l1 entry
3779: lda [%o1] ASI_BYPASS, %l4
3780: srl %l1, 22, %o2 ! note: 22 == RGSHIFT - 2
3781: add %o1, %o2, %o1
3782: sta %l4, [%o1] ASI_BYPASS
3783:
3784: sta %o3, [%g0] ASI_SRMMU ! restore mmu-sreg
3785: wr %o4, 0x0, %psr ! restore psr
3786: b,a startmap_done
3787:
3788: /*
3789: * The following is generic and should work on all
3790: * Mbus based SRMMU's.
3791: */
3792: remap_notvik:
3793: set SRMMU_CXTPTR, %o0
3794: lda [%o0] ASI_SRMMU, %o0 ! get context table ptr
3795: sll %o0, 4, %o0 ! make physical
3796: lda [%o0] ASI_BYPASS, %o1
3797: srl %o1, 4, %o1
3798: sll %o1, 8, %o1 ! get phys addr of l1 entry
3799: lda [%o1] ASI_BYPASS, %l4
3800: srl %l1, 22, %o2 ! note: 22 == RGSHIFT - 2
3801: add %o1, %o2, %o1
3802: sta %l4, [%o1] ASI_BYPASS
3803: !b,a startmap_done
3804:
1.148.4.11! nathanw 3805: 4:
! 3806: #endif /* SUN4M || SUN4D */
1.148.4.2 pk 3807: ! botch! We should blow up.
3808:
3809: startmap_done:
3810: /*
3811: * All set, fix pc and npc. Once we are where we should be,
3812: * we can give ourselves a stack and enable traps.
3813: */
3814: set 1f, %g1
3815: jmp %g1
3816: nop
3817: 1:
3818: sethi %hi(_C_LABEL(cputyp)), %o0 ! what type of cpu we are on
3819: st %g4, [%o0 + %lo(_C_LABEL(cputyp))]
3820:
3821: sethi %hi(_C_LABEL(pgshift)), %o0 ! pgshift = log2(nbpg)
3822: st %g5, [%o0 + %lo(_C_LABEL(pgshift))]
3823:
3824: mov 1, %o0 ! nbpg = 1 << pgshift
3825: sll %o0, %g5, %g5
3826: sethi %hi(_C_LABEL(nbpg)), %o0 ! nbpg = bytes in a page
3827: st %g5, [%o0 + %lo(_C_LABEL(nbpg))]
3828:
3829: sub %g5, 1, %g5
3830: sethi %hi(_C_LABEL(pgofset)), %o0 ! page offset = bytes in a page - 1
3831: st %g5, [%o0 + %lo(_C_LABEL(pgofset))]
3832:
3833: rd %psr, %g3 ! paranoia: make sure ...
3834: andn %g3, PSR_ET, %g3 ! we have traps off
3835: wr %g3, 0, %psr ! so that we can fiddle safely
3836: nop; nop; nop
3837:
3838: wr %g0, 0, %wim ! make sure we can set psr
3839: nop; nop; nop
3840: wr %g0, PSR_S|PSR_PS|PSR_PIL, %psr ! set initial psr
3841: nop; nop; nop
3842:
3843: wr %g0, 2, %wim ! set initial %wim (w1 invalid)
3844: mov 1, %g1 ! set pcb_wim (log2(%wim) = 1)
3845: sethi %hi(_C_LABEL(u0) + PCB_WIM), %g2
3846: st %g1, [%g2 + %lo(_C_LABEL(u0) + PCB_WIM)]
3847:
3848: set USRSTACK - CCFSZ, %fp ! as if called from user code
3849: set estack0 - CCFSZ - 80, %sp ! via syscall(boot_me_up) or somesuch
3850: rd %psr, %l0
3851: wr %l0, PSR_ET, %psr
3852: nop; nop; nop
3853:
3854: /* Export actual trapbase */
3855: sethi %hi(_C_LABEL(trapbase)), %o0
3856: st %g6, [%o0+%lo(_C_LABEL(trapbase))]
3857:
3858: #ifdef notdef
3859: /*
3860: * Step 2: clear BSS. This may just be paranoia; the boot
3861: * loader might already do it for us; but what the hell.
3862: */
3863: set _edata, %o0 ! bzero(edata, end - edata)
3864: set _end, %o1
3865: call _C_LABEL(bzero)
3866: sub %o1, %o0, %o1
3867: #endif
3868:
3869: /*
3870: * Stash prom vectors now, after bzero, as it lives in bss
3871: * (which we just zeroed).
3872: * This depends on the fact that bzero does not use %g7.
3873: */
3874: sethi %hi(_C_LABEL(romp)), %l0
3875: st %g7, [%l0 + %lo(_C_LABEL(romp))]
3876:
3877: /*
3878: * Step 3: compute number of windows and set up tables.
3879: * We could do some of this later.
3880: */
3881: save %sp, -64, %sp
3882: rd %psr, %g1
3883: restore
3884: and %g1, 31, %g1 ! want just the CWP bits
3885: add %g1, 1, %o0 ! compute nwindows
3886: sethi %hi(_C_LABEL(nwindows)), %o1 ! may as well tell everyone
3887: call init_tables
3888: st %o0, [%o1 + %lo(_C_LABEL(nwindows))]
3889:
3890: #if defined(SUN4) || defined(SUN4C)
3891: /*
3892: * Some sun4/sun4c models have fewer than 8 windows. For extra
3893: * speed, we do not need to save/restore those windows
3894: * The save/restore code has 7 "save"'s followed by 7
3895: * "restore"'s -- we "nop" out the last "save" and first
3896: * "restore"
3897: */
3898: cmp %o0, 8
3899: be 1f
3900: noplab: nop
3901: sethi %hi(noplab), %l0
3902: ld [%l0 + %lo(noplab)], %l1
3903: set wb1, %l0
3904: st %l1, [%l0 + 6*4]
3905: st %l1, [%l0 + 7*4]
3906: 1:
3907: #endif
3908:
1.148.4.11! nathanw 3909: #if (defined(SUN4) || defined(SUN4C)) && (defined(SUN4M) || defined(SUN4D))
1.148.4.2 pk 3910:
3911: /*
3912: * Patch instructions at specified labels that start
3913: * per-architecture code-paths.
3914: */
3915: Lgandul: nop
3916:
3917: #define MUNGE(label) \
3918: sethi %hi(label), %o0; \
3919: st %l0, [%o0 + %lo(label)]
3920:
3921: sethi %hi(Lgandul), %o0
3922: ld [%o0 + %lo(Lgandul)], %l0 ! %l0 = NOP
3923:
3924: cmp %g4, CPU_SUN4M
1.148.4.11! nathanw 3925: beq,a 2f
! 3926: nop
! 3927:
! 3928: cmp %g4, CPU_SUN4D
1.148.4.2 pk 3929: bne,a 1f
3930: nop
3931:
1.148.4.11! nathanw 3932: 2: ! this should be automated!
1.148.4.2 pk 3933: MUNGE(NOP_ON_4M_1)
3934: MUNGE(NOP_ON_4M_2)
3935: MUNGE(NOP_ON_4M_3)
3936: MUNGE(NOP_ON_4M_4)
3937: MUNGE(NOP_ON_4M_5)
3938: MUNGE(NOP_ON_4M_6)
3939: MUNGE(NOP_ON_4M_7)
3940: MUNGE(NOP_ON_4M_8)
3941: MUNGE(NOP_ON_4M_9)
3942: MUNGE(NOP_ON_4M_10)
3943: MUNGE(NOP_ON_4M_11)
3944: MUNGE(NOP_ON_4M_12)
3945: MUNGE(NOP_ON_4M_13)
3946: MUNGE(NOP_ON_4M_14)
1.148.4.5 pk 3947: MUNGE(NOP_ON_4M_15)
1.148.4.2 pk 3948: b,a 2f
3949:
3950: 1:
3951: MUNGE(NOP_ON_4_4C_1)
3952:
3953: 2:
3954:
3955: #undef MUNGE
3956: #endif
3957:
3958: /*
3959: * Step 4: change the trap base register, now that our trap handlers
3960: * will function (they need the tables we just set up).
3961: * This depends on the fact that bzero does not use %g6.
3962: */
3963: wr %g6, 0, %tbr
3964: nop; nop; nop ! paranoia
3965:
3966:
3967: /* Clear `cpuinfo' */
3968: sethi %hi(CPUINFO_VA), %o0 ! bzero(&cpuinfo, NBPG)
3969: sethi %hi(CPUINFO_STRUCTSIZE), %o1
3970: call _C_LABEL(bzero)
3971: add %o1, %lo(CPUINFO_STRUCTSIZE), %o1
3972:
3973: /*
3974: * Initialize `cpuinfo' fields which are needed early. Note
3975: * we make the cpuinfo self-reference at the local VA for now.
3976: * It may be changed to reference a global VA later.
3977: */
3978: set _C_LABEL(u0), %o0 ! cpuinfo.curpcb = u0;
3979: sethi %hi(cpcb), %l0
3980: st %o0, [%l0 + %lo(cpcb)]
3981:
3982: sethi %hi(CPUINFO_VA), %o0 ! cpuinfo.ci_self = &cpuinfo;
3983: sethi %hi(_CISELFP), %l0
3984: st %o0, [%l0 + %lo(_CISELFP)]
3985:
3986: set _C_LABEL(eintstack), %o0 ! cpuinfo.eintstack= _eintstack;
3987: sethi %hi(_EINTSTACKP), %l0
3988: st %o0, [%l0 + %lo(_EINTSTACKP)]
3989:
3990: /*
3991: * Ready to run C code; finish bootstrap.
3992: */
3993: call _C_LABEL(bootstrap)
3994: nop
3995:
3996: /*
3997: * Call main. This returns to us after loading /sbin/init into
3998: * user space. (If the exec fails, main() does not return.)
3999: */
4000: call _C_LABEL(main)
4001: clr %o0 ! our frame arg is ignored
4002: /*NOTREACHED*/
4003:
4004: #if defined(MULTIPROCESSOR)
4005: /*
4006: * Entry point for non-boot CPUs in MP systems.
4007: */
4008: .globl _C_LABEL(cpu_hatch)
4009: _C_LABEL(cpu_hatch):
4010: rd %psr, %g3 ! paranoia: make sure ...
4011: andn %g3, PSR_ET, %g3 ! we have traps off
4012: wr %g3, 0, %psr ! so that we can fiddle safely
4013: nop; nop; nop
4014:
4015: wr %g0, 0, %wim ! make sure we can set psr
4016: nop; nop; nop
4017: wr %g0, PSR_S|PSR_PS|PSR_PIL, %psr ! set initial psr
4018: nop; nop; nop
4019:
4020: wr %g0, 2, %wim ! set initial %wim (w1 invalid)
4021:
4022: /* Initialize Trap Base register */
4023: sethi %hi(_C_LABEL(trapbase)), %o0
4024: ld [%o0+%lo(_C_LABEL(trapbase))], %g6
4025: wr %g6, 0, %tbr
4026: nop; nop; nop ! paranoia
4027:
4028: /* Set up a stack */
4029: set USRSTACK - CCFSZ, %fp ! as if called from user code
4030: sethi %hi(_C_LABEL(cpu_hatchstack)), %o0
4031: ld [%o0+%lo(_C_LABEL(cpu_hatchstack))], %o0
4032: set USPACE - CCFSZ - 80, %sp
4033: add %sp, %o0, %sp
4034:
4035: /* Enable traps */
4036: rd %psr, %l0
4037: wr %l0, PSR_ET, %psr
4038: nop; nop; nop
4039:
4040: /* Call C code */
4041: sethi %hi(_C_LABEL(cpu_hatch_sc)), %o0
4042: call _C_LABEL(cpu_setup)
4043: ld [%o0+%lo(_C_LABEL(cpu_hatch_sc))], %o0
4044:
4045: /* Wait for go_smp_cpus to go */
4046: set _C_LABEL(go_smp_cpus), %l1
4047: ld [%l1], %l0
4048: 1:
4049: cmp %l0, %g0
4050: be 1b
4051: ld [%l1], %l0
4052:
4053: #if 0 /* doesn't quite work yet */
4054:
4055: set _C_LABEL(proc0), %g3 ! p = proc0
4056: sethi %hi(_C_LABEL(sched_whichqs)), %g2
4057: sethi %hi(cpcb), %g6
1.148.4.10 nathanw 4058: sethi %hi(curlwp), %g7
4059: st %g0, [%g7 + %lo(curlwp)] ! curlwp = NULL;
1.148.4.2 pk 4060:
4061: mov PSR_S|PSR_ET, %g1 ! oldpsr = PSR_S | PSR_ET;
4062: sethi %hi(IDLE_UP), %g5
4063: ld [%g5 + %lo(IDLE_UP)], %g5
4064: st %g5, [%g6 + %lo(cpcb)] ! cpcb = &idle_u
4065: set USPACE-CCFSZ, %o1
4066: add %g5, %o1, %sp ! set new %sp
4067:
4068: #ifdef DEBUG
4069: mov %g5, %o2 ! %o2 = _idle_u
4070: SET_SP_REDZONE(%o2, %o1)
4071: #endif /* DEBUG */
4072:
4073: b idle_enter_no_schedlock
4074: clr %g4 ! lastproc = NULL;
4075: #else
4076: /* Idle here .. */
4077: rd %psr, %l0
4078: andn %l0, PSR_PIL, %l0 ! psr &= ~PSR_PIL;
4079: wr %l0, 0, %psr ! (void) spl0();
4080: nop; nop; nop
4081: 9: ba 9b
4082: nop
4083: /*NOTREACHED*/
4084: #endif
4085:
4086: #endif /* MULTIPROCESSOR */
4087:
4088: #include "sigcode_state.s"
4089:
4090: .globl _C_LABEL(sigcode)
4091: .globl _C_LABEL(upcallcode)
4092: .globl _C_LABEL(esigcode)
4093: _C_LABEL(sigcode):
4094:
4095: SAVE_STATE
4096:
4097: ldd [%fp + 64], %o0 ! sig, code
4098: ld [%fp + 76], %o3 ! arg3
4099: call %g1 ! (*sa->sa_handler)(sig,code,scp,arg3)
4100: add %fp, 64 + 16, %o2 ! scp
4101:
4102: RESTORE_STATE
4103:
4104: ! get registers back & set syscall #
4105: restore %g0, SYS___sigreturn14, %g1
4106: add %sp, 64 + 16, %o0 ! compute scp
4107: t ST_SYSCALL ! sigreturn(scp)
4108: ! sigreturn does not return unless it fails
4109: mov SYS_exit, %g1 ! exit(errno)
4110: t ST_SYSCALL
4111: _C_LABEL(upcallcode):
4112: ! not yet implemented
4113: mov 101, %o0
4114: mov SYS_exit, %g1 ! exit(101)
4115: t ST_SYSCALL
4116: _C_LABEL(esigcode):
4117:
4118: /*
4119: * Primitives
4120: */
4121:
4122: /*
4123: * General-purpose NULL routine.
4124: */
4125: ENTRY(sparc_noop)
4126: retl
4127: nop
4128:
4129: /*
4130: * getfp() - get stack frame pointer
4131: */
4132: ENTRY(getfp)
4133: retl
4134: mov %fp, %o0
4135:
4136: /*
4137: * copyinstr(fromaddr, toaddr, maxlength, &lencopied)
4138: *
4139: * Copy a null terminated string from the user address space into
4140: * the kernel address space.
4141: */
4142: ENTRY(copyinstr)
4143: ! %o0 = fromaddr, %o1 = toaddr, %o2 = maxlen, %o3 = &lencopied
4144: mov %o1, %o5 ! save = toaddr;
4145: tst %o2 ! maxlen == 0?
4146: beq,a Lcstoolong ! yes, return ENAMETOOLONG
4147: sethi %hi(cpcb), %o4
4148:
4149: set KERNBASE, %o4
4150: cmp %o0, %o4 ! fromaddr < KERNBASE?
4151: blu Lcsdocopy ! yes, go do it
4152: sethi %hi(cpcb), %o4 ! (first instr of copy)
4153:
4154: b Lcsdone ! no, return EFAULT
4155: mov EFAULT, %o0
4156:
4157: /*
4158: * copyoutstr(fromaddr, toaddr, maxlength, &lencopied)
4159: *
4160: * Copy a null terminated string from the kernel
4161: * address space to the user address space.
4162: */
4163: ENTRY(copyoutstr)
4164: ! %o0 = fromaddr, %o1 = toaddr, %o2 = maxlen, %o3 = &lencopied
4165: mov %o1, %o5 ! save = toaddr;
4166: tst %o2 ! maxlen == 0?
4167: beq,a Lcstoolong ! yes, return ENAMETOOLONG
4168: sethi %hi(cpcb), %o4
4169:
4170: set KERNBASE, %o4
4171: cmp %o1, %o4 ! toaddr < KERNBASE?
4172: blu Lcsdocopy ! yes, go do it
4173: sethi %hi(cpcb), %o4 ! (first instr of copy)
4174:
4175: b Lcsdone ! no, return EFAULT
4176: mov EFAULT, %o0
4177:
4178: Lcsdocopy:
4179: ! sethi %hi(cpcb), %o4 ! (done earlier)
4180: ld [%o4 + %lo(cpcb)], %o4 ! catch faults
4181: set Lcsdone, %g1
4182: st %g1, [%o4 + PCB_ONFAULT]
4183:
4184: ! XXX should do this in bigger chunks when possible
4185: 0: ! loop:
4186: ldsb [%o0], %g1 ! c = *fromaddr;
4187: tst %g1
4188: stb %g1, [%o1] ! *toaddr++ = c;
4189: be 1f ! if (c == NULL)
4190: inc %o1 ! goto ok;
4191: deccc %o2 ! if (--len > 0) {
4192: bgu 0b ! fromaddr++;
4193: inc %o0 ! goto loop;
4194: ! }
4195: Lcstoolong: !
4196: b Lcsdone ! error = ENAMETOOLONG;
4197: mov ENAMETOOLONG, %o0 ! goto done;
4198: 1: ! ok:
4199: clr %o0 ! error = 0;
4200: Lcsdone: ! done:
4201: sub %o1, %o5, %o1 ! len = to - save;
4202: tst %o3 ! if (lencopied)
4203: bnz,a 3f
4204: st %o1, [%o3] ! *lencopied = len;
4205: 3:
4206: retl ! cpcb->pcb_onfault = 0;
4207: st %g0, [%o4 + PCB_ONFAULT]! return (error);
4208:
4209: /*
4210: * copystr(fromaddr, toaddr, maxlength, &lencopied)
4211: *
4212: * Copy a null terminated string from one point to another in
4213: * the kernel address space. (This is a leaf procedure, but
4214: * it does not seem that way to the C compiler.)
4215: */
4216: ENTRY(copystr)
4217: mov %o1, %o5 ! to0 = to;
4218: tst %o2 ! if (maxlength == 0)
4219: beq,a 2f !
4220: mov ENAMETOOLONG, %o0 ! ret = ENAMETOOLONG; goto done;
4221:
4222: 0: ! loop:
4223: ldsb [%o0], %o4 ! c = *from;
4224: tst %o4
4225: stb %o4, [%o1] ! *to++ = c;
4226: be 1f ! if (c == 0)
4227: inc %o1 ! goto ok;
4228: deccc %o2 ! if (--len > 0) {
4229: bgu,a 0b ! from++;
4230: inc %o0 ! goto loop;
4231: b 2f ! }
4232: mov ENAMETOOLONG, %o0 ! ret = ENAMETOOLONG; goto done;
4233: 1: ! ok:
4234: clr %o0 ! ret = 0;
4235: 2:
4236: sub %o1, %o5, %o1 ! len = to - to0;
4237: tst %o3 ! if (lencopied)
4238: bnz,a 3f
4239: st %o1, [%o3] ! *lencopied = len;
4240: 3:
4241: retl
4242: nop
4243:
4244: /*
4245: * Copyin(src, dst, len)
4246: *
4247: * Copy specified amount of data from user space into the kernel.
4248: */
4249: ENTRY(copyin)
4250: set KERNBASE, %o3
4251: cmp %o0, %o3 ! src < KERNBASE?
4252: blu,a Ldocopy ! yes, can try it
4253: sethi %hi(cpcb), %o3
4254:
4255: /* source address points into kernel space: return EFAULT */
4256: retl
4257: mov EFAULT, %o0
4258:
4259: /*
4260: * Copyout(src, dst, len)
4261: *
4262: * Copy specified amount of data from kernel to user space.
4263: * Just like copyin, except that the `dst' addresses are user space
4264: * rather than the `src' addresses.
4265: */
4266: ENTRY(copyout)
4267: set KERNBASE, %o3
4268: cmp %o1, %o3 ! dst < KERBASE?
4269: blu,a Ldocopy
4270: sethi %hi(cpcb), %o3
4271:
4272: /* destination address points into kernel space: return EFAULT */
4273: retl
4274: mov EFAULT, %o0
4275:
4276: /*
4277: * ******NOTE****** this depends on bcopy() not using %g7
4278: */
4279: Ldocopy:
4280: ! sethi %hi(cpcb), %o3
4281: ld [%o3 + %lo(cpcb)], %o3
4282: set Lcopyfault, %o4
4283: mov %o7, %g7 ! save return address
4284: call _C_LABEL(bcopy) ! bcopy(src, dst, len)
4285: st %o4, [%o3 + PCB_ONFAULT]
4286:
4287: sethi %hi(cpcb), %o3
4288: ld [%o3 + %lo(cpcb)], %o3
4289: st %g0, [%o3 + PCB_ONFAULT]
4290: jmp %g7 + 8
4291: clr %o0 ! return 0
4292:
4293: ! Copyin or copyout fault. Clear cpcb->pcb_onfault and return EFAULT.
4294: ! Note that although we were in bcopy, there is no state to clean up;
4295: ! the only special thing is that we have to return to [g7 + 8] rather than
4296: ! [o7 + 8].
4297: Lcopyfault:
4298: sethi %hi(cpcb), %o3
4299: ld [%o3 + %lo(cpcb)], %o3
4300: jmp %g7 + 8
4301: st %g0, [%o3 + PCB_ONFAULT]
4302:
4303:
4304: /*
4305: * Write all user windows presently in the CPU back to the user's stack.
4306: * We just do `save' instructions until pcb_uw == 0.
4307: *
4308: * p = cpcb;
4309: * nsaves = 0;
4310: * while (p->pcb_uw > 0)
4311: * save(), nsaves++;
4312: * while (--nsaves >= 0)
4313: * restore();
4314: */
4315: ENTRY(write_user_windows)
4316: sethi %hi(cpcb), %g6
4317: ld [%g6 + %lo(cpcb)], %g6
4318: b 2f
4319: clr %g5
4320: 1:
4321: save %sp, -64, %sp
4322: 2:
4323: ld [%g6 + PCB_UW], %g7
4324: tst %g7
4325: bg,a 1b
4326: inc %g5
4327: 3:
4328: deccc %g5
4329: bge,a 3b
4330: restore
4331: retl
4332: nop
4333:
4334:
4335: .comm _C_LABEL(want_resched),4
4336: .comm _C_LABEL(want_ast),4
4337: /*
4338: * Masterpaddr is the p->p_addr of the last process on the processor.
4339: * XXX masterpaddr is almost the same as cpcb
4340: * XXX should delete this entirely
4341: */
4342: .comm _C_LABEL(masterpaddr), 4
4343:
4344: /*
4345: * Switch statistics (for later tweaking):
4346: * nswitchdiff = p1 => p2 (i.e., chose different process)
4347: * nswitchexit = number of calls to switchexit()
4348: * cnt.v_swtch = total calls to swtch+swtchexit
4349: */
4350: .comm _C_LABEL(nswitchdiff), 4
4351: .comm _C_LABEL(nswitchexit), 4
4352:
4353: /*
4354: * REGISTER USAGE IN cpu_switch AND switchexit:
4355: * This is split into two phases, more or less
4356: * `before we locate a new proc' and `after'.
4357: * Some values are the same in both phases.
4358: * Note that the %o0-registers are not preserved across
4359: * the psr change when entering a new process, since this
4360: * usually changes the CWP field (hence heavy usage of %g's).
4361: *
4362: * %g1 = oldpsr (excluding ipl bits)
4363: * %g2 = %hi(whichqs); newpsr
4364: * %g3 = p
4365: * %g4 = lastproc
4366: * %g5 = <free>; newpcb
4367: * %g6 = %hi(cpcb)
1.148.4.10 nathanw 4368: * %g7 = %hi(curlwp)
1.148.4.2 pk 4369: * %o0 = tmp 1
4370: * %o1 = tmp 2
4371: * %o2 = tmp 3
4372: * %o3 = tmp 4; whichqs; vm
4373: * %o4 = tmp 4; which; sswap
4374: * %o5 = tmp 5; q; <free>
4375: */
4376:
4377: /*
4378: * When calling external functions from cpu_switch() and idle(), we must
4379: * preserve the global registers mentioned above across the call. We also
4380: * set up a stack frame since we will be running in our caller's frame
4381: * in cpu_switch().
4382: */
4383: #define SAVE_GLOBALS_AND_CALL(name) \
4384: save %sp, -CCFSZ, %sp; \
4385: mov %g1, %i0; \
4386: mov %g2, %i1; \
4387: mov %g3, %i2; \
4388: mov %g4, %i3; \
4389: mov %g6, %i4; \
4390: call _C_LABEL(name); \
4391: mov %g7, %i5; \
4392: mov %i5, %g7; \
4393: mov %i4, %g6; \
4394: mov %i3, %g4; \
4395: mov %i2, %g3; \
4396: mov %i1, %g2; \
4397: mov %i0, %g1; \
4398: restore
4399:
4400:
4401: /*
4402: * switchexit is called only from cpu_exit() before the current process
4403: * has freed its vmspace and kernel stack; we must schedule them to be
1.148.4.10 nathanw 4404: * freed. (curlwp is already NULL.)
1.148.4.2 pk 4405: *
4406: * We lay the process to rest by changing to the `idle' kernel stack,
4407: * and note that the `last loaded process' is nonexistent.
4408: */
4409: ENTRY(switchlwpexit)
1.148.4.3 pk 4410: !!Hmm, switchexit() might as well have passed us the `exit2' function to call.
4411: set _C_LABEL(lwp_exit2), %g1
4412: b,a switchexit0
1.148.4.2 pk 4413: ENTRY(switchexit)
1.148.4.3 pk 4414: set _C_LABEL(exit2), %g1
4415: switchexit0:
1.148.4.2 pk 4416: mov %o0, %g2 ! save proc for exit2() call
4417:
4418: /*
4419: * Change pcb to idle u. area, i.e., set %sp to top of stack
4420: * and %psr to PSR_S|PSR_ET, and set cpcb to point to idle_u.
4421: * Once we have left the old stack, we can call exit2() to
4422: * destroy it. Call it any sooner and the register windows
4423: * go bye-bye.
4424: */
4425: #if defined(MULTIPROCESSOR)
4426: sethi %hi(IDLE_UP), %g5
4427: ld [%g5 + %lo(IDLE_UP)], %g5
4428: #else
4429: set _C_LABEL(idle_u), %g5
4430: #endif
4431: sethi %hi(cpcb), %g6
4432: mov 1, %g7
4433: wr %g0, PSR_S, %psr ! change to window 0, traps off
4434: wr %g0, 2, %wim ! and make window 1 the trap window
4435: st %g5, [%g6 + %lo(cpcb)] ! cpcb = &idle_u
4436: st %g7, [%g5 + PCB_WIM] ! idle_u.pcb_wim = log2(2) = 1
4437: #if defined(MULTIPROCESSOR)
4438: set USPACE-CCFSZ, %o1 !
4439: add %g5, %o1, %sp ! set new %sp
4440: #else
4441: set _C_LABEL(idle_u) + USPACE-CCFSZ, %sp ! set new %sp
4442: #endif
4443:
4444: #ifdef DEBUG
4445: mov %g5, %l6 ! %l6 = _idle_u
4446: SET_SP_REDZONE(%l6, %l5)
4447: #endif
4448:
4449: wr %g0, PSR_S|PSR_ET, %psr ! and then enable traps
1.148.4.3 pk 4450: call %g1 ! {lwp}exit2(p)
1.148.4.2 pk 4451: mov %g2, %o0
4452:
4453: /*
4454: * Now fall through to `the last switch'. %g6 was set to
4455: * %hi(cpcb), but may have been clobbered in exit2(),
4456: * so all the registers described below will be set here.
4457: *
4458: * REGISTER USAGE AT THIS POINT:
4459: * %g1 = oldpsr (excluding ipl bits)
4460: * %g2 = %hi(whichqs)
4461: * %g4 = lastproc
4462: * %g6 = %hi(cpcb)
1.148.4.10 nathanw 4463: * %g7 = %hi(curlwp)
1.148.4.2 pk 4464: * %o0 = tmp 1
4465: * %o1 = tmp 2
4466: * %o3 = whichqs
4467: */
4468:
4469: INCR(_C_LABEL(nswitchexit)) ! nswitchexit++;
4470: INCR(_C_LABEL(uvmexp)+V_SWTCH) ! cnt.v_switch++;
4471:
4472: mov PSR_S|PSR_ET, %g1 ! oldpsr = PSR_S | PSR_ET;
4473: sethi %hi(_C_LABEL(sched_whichqs)), %g2
4474: clr %g4 ! lastproc = NULL;
4475: sethi %hi(cpcb), %g6
1.148.4.10 nathanw 4476: sethi %hi(curlwp), %g7
4477: st %g0, [%g7 + %lo(curlwp)] ! curlwp = NULL;
1.148.4.2 pk 4478: b,a idle_enter_no_schedlock
4479: /* FALLTHROUGH */
4480:
4481:
4482: /* Macro used for register window flushing in the context switch code */
4483: #define SAVE save %sp, -64, %sp
4484:
4485: /*
4486: * When no processes are on the runq, switch
4487: * idles here waiting for something to come ready.
4488: * The registers are set up as noted above.
4489: */
4490: idle:
4491: #if defined(MULTIPROCESSOR)
4492: /*
4493: * Change pcb to idle u. area, i.e., set %sp to top of stack
4494: * and %psr to PSR_S, and set cpcb to point to idle_u.
4495: */
4496: /* XXX: FIXME
4497: * 7 of each:
4498: */
4499: SAVE; SAVE; SAVE; SAVE; SAVE; SAVE; SAVE
4500: restore; restore; restore; restore; restore; restore; restore
4501:
4502: sethi %hi(IDLE_UP), %g5
4503: ld [%g5 + %lo(IDLE_UP)], %g5
4504: rd %psr, %g1 ! oldpsr = %psr;
4505: andn %g1, PSR_PIL|PSR_PS, %g1! oldpsr &= ~(PSR_PIL|PSR_PS);
4506: and %g1, PSR_S|PSR_ET, %g1 ! oldpsr |= PSR_S|PSR_ET;
4507: st %g5, [%g6 + %lo(cpcb)] ! cpcb = &idle_u
4508: set USPACE-CCFSZ, %o1
4509: add %g5, %o1, %sp ! set new %sp
4510: clr %g4 ! lastproc = NULL;
4511:
4512: #ifdef DEBUG
4513: mov %g5, %o2 ! %o2 = _idle_u
4514: SET_SP_REDZONE(%o2, %o1)
4515: #endif /* DEBUG */
4516: #endif /* MULTIPROCESSOR */
4517:
4518: #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG)
4519: /* Release the scheduler lock */
4520: SAVE_GLOBALS_AND_CALL(sched_unlock_idle)
4521: #endif
4522:
4523: idle_enter_no_schedlock:
1.148.4.7 nathanw 4524: wr %g1, 0, %psr ! spl0();
1.148.4.2 pk 4525: 1: ! spin reading whichqs until nonzero
4526: ld [%g2 + %lo(_C_LABEL(sched_whichqs))], %o3
4527: tst %o3
4528: #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG)
4529: bnz,a idle_leave
4530: #else
4531: bnz,a Lsw_scan
4532: #endif
1.148.4.7 nathanw 4533: ! NB: annulled delay slot (executed when we leave the idle loop)
1.148.4.2 pk 4534: wr %g1, PSR_PIL, %psr ! (void) splhigh();
4535:
4536: ! Check uvm.page_idle_zero
4537: sethi %hi(_C_LABEL(uvm) + UVM_PAGE_IDLE_ZERO), %o3
4538: ld [%o3 + %lo(_C_LABEL(uvm) + UVM_PAGE_IDLE_ZERO)], %o3
4539: tst %o3
4540: bz 1b
4541: nop
4542:
4543: SAVE_GLOBALS_AND_CALL(uvm_pageidlezero)
4544: b,a 1b
4545:
4546: #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG)
4547: idle_leave:
4548: /* Before we leave the idle loop, detain the scheduler lock */
1.148.4.9 nathanw 4549: nop;nop;nop; /* just wrote to %psr; delay before doing a `save' */
1.148.4.2 pk 4550: SAVE_GLOBALS_AND_CALL(sched_lock_idle)
4551: b,a Lsw_scan
4552: #endif
4553:
4554: Lsw_panic_rq:
4555: sethi %hi(1f), %o0
4556: call _C_LABEL(panic)
4557: or %lo(1f), %o0, %o0
4558: Lsw_panic_wchan:
4559: sethi %hi(2f), %o0
4560: call _C_LABEL(panic)
4561: or %lo(2f), %o0, %o0
4562: Lsw_panic_srun:
4563: sethi %hi(3f), %o0
4564: call _C_LABEL(panic)
4565: or %lo(3f), %o0, %o0
4566: 1: .asciz "switch rq"
4567: 2: .asciz "switch wchan"
4568: 3: .asciz "switch SRUN"
4569: _ALIGN
4570:
4571: /*
4572: * cpu_switch() picks a process to run and runs it, saving the current
4573: * one away. On the assumption that (since most workstations are
4574: * single user machines) the chances are quite good that the new
4575: * process will turn out to be the current process, we defer saving
4576: * it here until we have found someone to load. If that someone
4577: * is the current process we avoid both store and load.
4578: *
4579: * cpu_switch() is always entered at splstatclock or splhigh.
4580: *
4581: * IT MIGHT BE WORTH SAVING BEFORE ENTERING idle TO AVOID HAVING TO
4582: * SAVE LATER WHEN SOMEONE ELSE IS READY ... MUST MEASURE!
4583: */
4584: .globl _C_LABEL(__ffstab)
4585: ENTRY(cpu_switch)
4586: /*
4587: * REGISTER USAGE AT THIS POINT:
4588: * %g1 = oldpsr (excluding ipl bits)
4589: * %g2 = %hi(whichqs)
4590: * %g3 = p
4591: * %g4 = lastproc
4592: * %g5 = tmp 0
4593: * %g6 = %hi(cpcb)
1.148.4.10 nathanw 4594: * %g7 = %hi(curlwp)
1.148.4.2 pk 4595: * %o0 = tmp 1
4596: * %o1 = tmp 2
4597: * %o2 = tmp 3
4598: * %o3 = tmp 4, then at Lsw_scan, whichqs
4599: * %o4 = tmp 5, then at Lsw_scan, which
4600: * %o5 = tmp 6, then at Lsw_scan, q
4601: */
4602: mov %o0, %g4 ! lastproc = p;
4603: sethi %hi(_C_LABEL(sched_whichqs)), %g2 ! set up addr regs
4604: sethi %hi(cpcb), %g6
4605: ld [%g6 + %lo(cpcb)], %o0
4606: std %o6, [%o0 + PCB_SP] ! cpcb->pcb_<sp,pc> = <sp,pc>;
4607: rd %psr, %g1 ! oldpsr = %psr;
4608: st %g1, [%o0 + PCB_PSR] ! cpcb->pcb_psr = oldpsr;
4609: andn %g1, PSR_PIL, %g1 ! oldpsr &= ~PSR_PIL;
1.148.4.10 nathanw 4610: sethi %hi(curlwp), %g7
4611: st %g0, [%g7 + %lo(curlwp)] ! curlwp = NULL;
1.148.4.2 pk 4612:
4613: Lsw_scan:
4614: nop; nop; nop ! paranoia
4615: ld [%g2 + %lo(_C_LABEL(sched_whichqs))], %o3
4616:
4617: /*
4618: * Optimized inline expansion of `which = ffs(whichqs) - 1';
4619: * branches to idle if ffs(whichqs) was 0.
4620: */
4621: set _C_LABEL(__ffstab), %o2
4622: andcc %o3, 0xff, %o1 ! byte 0 zero?
4623: bz,a 1f ! yes, try byte 1
4624: srl %o3, 8, %o0
4625: b 2f ! ffs = ffstab[byte0]; which = ffs - 1;
4626: ldsb [%o2 + %o1], %o0
4627: 1: andcc %o0, 0xff, %o1 ! byte 1 zero?
4628: bz,a 1f ! yes, try byte 2
4629: srl %o0, 8, %o0
4630: ldsb [%o2 + %o1], %o0 ! which = ffstab[byte1] + 7;
4631: b 3f
4632: add %o0, 7, %o4
4633: 1: andcc %o0, 0xff, %o1 ! byte 2 zero?
4634: bz,a 1f ! yes, try byte 3
4635: srl %o0, 8, %o0
4636: ldsb [%o2 + %o1], %o0 ! which = ffstab[byte2] + 15;
4637: b 3f
4638: add %o0, 15, %o4
4639: 1: ldsb [%o2 + %o0], %o0 ! ffs = ffstab[byte3] + 24
4640: addcc %o0, 24, %o0 ! (note that ffstab[0] == -24)
4641: bz idle ! if answer was 0, go idle
4642: EMPTY
4643: 2: sub %o0, 1, %o4 ! which = ffs(whichqs) - 1
4644: 3: /* end optimized inline expansion */
4645:
4646: /*
4647: * We found a nonempty run queue. Take its first process.
4648: */
4649: set _C_LABEL(sched_qs), %o5 ! q = &qs[which];
4650: sll %o4, 3, %o0
4651: add %o0, %o5, %o5
4652: ld [%o5], %g3 ! p = q->ph_link;
1.148.4.3 pk 4653:
4654: cpu_switch0:
4655: /*
4656: * Here code in common with cpu_preempt() starts.
4657: * cpu_preempt() sets %g3 to p, and %o5 to p->p_back,
4658: * so the following will unlink p from the switch_qs list.
4659: */
1.148.4.2 pk 4660: cmp %g3, %o5 ! if (p == q)
4661: be Lsw_panic_rq ! panic("switch rq");
4662: EMPTY
4663: ld [%g3], %o0 ! tmp0 = p->p_forw;
4664: st %o0, [%o5] ! q->ph_link = tmp0;
4665: st %o5, [%o0 + 4] ! tmp0->p_back = q;
4666: cmp %o0, %o5 ! if (tmp0 == q)
4667: bne 1f
4668: EMPTY
4669: mov 1, %o1 ! whichqs &= ~(1 << which);
4670: sll %o1, %o4, %o1
4671: andn %o3, %o1, %o3
4672: st %o3, [%g2 + %lo(_C_LABEL(sched_whichqs))]
4673: 1:
4674: /*
4675: * PHASE TWO: NEW REGISTER USAGE:
4676: * %g1 = oldpsr (excluding ipl bits)
4677: * %g2 = newpsr
4678: * %g3 = p
4679: * %g4 = lastproc
4680: * %g5 = newpcb
4681: * %g6 = %hi(cpcb)
1.148.4.10 nathanw 4682: * %g7 = %hi(curlwp)
1.148.4.2 pk 4683: * %o0 = tmp 1
4684: * %o1 = tmp 2
4685: * %o2 = tmp 3
4686: * %o3 = vm
4687: */
4688:
4689: /* firewalls */
1.148.4.3 pk 4690: ld [%g3 + L_WCHAN], %o0 ! if (p->p_wchan)
1.148.4.2 pk 4691: tst %o0
4692: bne Lsw_panic_wchan ! panic("switch wchan");
4693: EMPTY
1.148.4.4 pk 4694: ld [%g3 + L_STAT], %o0 ! if (p->p_stat != SRUN)
1.148.4.2 pk 4695: cmp %o0, LSRUN
4696: bne Lsw_panic_srun ! panic("switch SRUN");
4697: EMPTY
4698:
4699: /*
4700: * Committed to running process p.
4701: * It may be the same as the one we were running before.
4702: */
4703: mov LSONPROC, %o0 ! p->p_stat = LSONPROC;
1.148.4.4 pk 4704: st %o0, [%g3 + L_STAT]
1.148.4.2 pk 4705:
4706: /* p->p_cpu initialized in fork1() for single-processor */
4707: #if defined(MULTIPROCESSOR)
4708: sethi %hi(_CISELFP), %o0 ! p->p_cpu = cpuinfo.ci_self;
4709: ld [%o0 + %lo(_CISELFP)], %o0
1.148.4.3 pk 4710: st %o0, [%g3 + L_CPU]
1.148.4.2 pk 4711: #endif
4712:
4713: sethi %hi(_C_LABEL(want_resched)), %o0 ! want_resched = 0;
4714: st %g0, [%o0 + %lo(_C_LABEL(want_resched))]
4715: #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG)
4716: /* Done with the run queues; release the scheduler lock */
4717: SAVE_GLOBALS_AND_CALL(sched_unlock_idle)
4718: #endif
1.148.4.3 pk 4719: ld [%g3 + L_ADDR], %g5 ! newpcb = p->p_addr;
1.148.4.2 pk 4720: st %g0, [%g3 + 4] ! p->p_back = NULL;
4721: ld [%g5 + PCB_PSR], %g2 ! newpsr = newpcb->pcb_psr;
1.148.4.10 nathanw 4722: st %g3, [%g7 + %lo(curlwp)] ! curlwp = p;
1.148.4.2 pk 4723:
4724: cmp %g3, %g4 ! p == lastproc?
4725: be,a Lsw_sameproc ! yes, go return 0
4726: wr %g2, 0, %psr ! (after restoring ipl)
4727:
4728: /*
4729: * Not the old process. Save the old process, if any;
4730: * then load p.
4731: */
4732: tst %g4
4733: be,a Lsw_load ! if no old process, go load
4734: wr %g1, (PIL_CLOCK << 8) | PSR_ET, %psr
4735:
4736: INCR(_C_LABEL(nswitchdiff)) ! clobbers %o0,%o1
4737: /*
4738: * save: write back all windows (including the current one).
4739: * XXX crude; knows nwindows <= 8
4740: */
4741: wb1: /* 7 of each: */
4742: SAVE; SAVE; SAVE; SAVE; SAVE; SAVE; SAVE
4743: restore; restore; restore; restore; restore; restore; restore
4744:
4745: /*
4746: * Load the new process. To load, we must change stacks and
4747: * alter cpcb and %wim, hence we must disable traps. %psr is
4748: * currently equal to oldpsr (%g1) ^ (PIL_CLOCK << 8);
4749: * this means that PSR_ET is on. Likewise, PSR_ET is on
4750: * in newpsr (%g2), although we do not know newpsr's ipl.
4751: *
4752: * We also must load up the `in' and `local' registers.
4753: */
4754: wr %g1, (PIL_CLOCK << 8) | PSR_ET, %psr
4755: Lsw_load:
4756: ! wr %g1, (PIL_CLOCK << 8) | PSR_ET, %psr ! done above
4757: /* compute new wim */
4758: ld [%g5 + PCB_WIM], %o0
4759: mov 1, %o1
4760: sll %o1, %o0, %o0
4761: wr %o0, 0, %wim ! %wim = 1 << newpcb->pcb_wim;
4762: /* Clear FP & CP enable bits, as well as the PIL field */
4763: /* now must not change %psr for 3 more instrs */
4764: /*1*/ set PSR_EF|PSR_EC|PSR_PIL, %o0
4765: /*2*/ andn %g2, %o0, %g2 ! newpsr &= ~(PSR_EF|PSR_EC|PSR_PIL);
4766: /*3*/ nop
4767: /* set new psr, but with traps disabled */
4768: wr %g2, PSR_ET, %psr ! %psr = newpsr ^ PSR_ET;
4769: /* set new cpcb */
4770: st %g5, [%g6 + %lo(cpcb)] ! cpcb = newpcb;
4771: ldd [%g5 + PCB_SP], %o6 ! <sp,pc> = newpcb->pcb_<sp,pc>
4772: /* load window */
4773: ldd [%sp + (0*8)], %l0
4774: ldd [%sp + (1*8)], %l2
4775: ldd [%sp + (2*8)], %l4
4776: ldd [%sp + (3*8)], %l6
4777: ldd [%sp + (4*8)], %i0
4778: ldd [%sp + (5*8)], %i2
4779: ldd [%sp + (6*8)], %i4
4780: ldd [%sp + (7*8)], %i6
4781: #ifdef DEBUG
4782: mov %g5, %o0
4783: SET_SP_REDZONE(%o0, %o1)
4784: CHECK_SP_REDZONE(%o0, %o1)
4785: #endif
4786: /* finally, enable traps and continue at splclock() */
4787: wr %g2, PIL_CLOCK << 8 , %psr ! psr = newpsr;
4788:
4789: /*
4790: * Now running p. Make sure it has a context so that it
4791: * can talk about user space stuff. (Its pcb_uw is currently
4792: * zero so it is safe to have interrupts going here.)
4793: */
1.148.4.3 pk 4794: mov 1, %o0 ! return value
4795: ld [%g3 + L_PROC], %o3 ! p = l->l_proc;
4796: ld [%o3 + P_VMSPACE], %o3 ! vm = p->p_vmspace;
1.148.4.2 pk 4797: ld [%o3 + VM_PMAP], %o3 ! pm = vm->vm_map.vm_pmap;
1.148.4.3 pk 4798: ld [%o3 + PMAP_CTX], %o1 ! if (pm->pm_ctx != NULL)
4799: tst %o1
1.148.4.2 pk 4800: bnz,a Lsw_havectx ! goto havecontext;
1.148.4.3 pk 4801: ld [%o3 + PMAP_CTXNUM], %o1 ! load context number
1.148.4.2 pk 4802:
4803: /* p does not have a context: call ctx_alloc to get one */
4804: save %sp, -CCFSZ, %sp
4805: call _C_LABEL(ctx_alloc) ! ctx_alloc(pm);
4806: mov %i3, %o0
4807:
4808: ret
1.148.4.3 pk 4809: restore %g0, 1, %o0 ! set return value to 1
1.148.4.2 pk 4810:
4811: /* p does have a context: just switch to it */
4812: Lsw_havectx:
1.148.4.3 pk 4813: ! context is in %o1
1.148.4.2 pk 4814: #if (defined(SUN4) || defined(SUN4C)) && defined(SUN4M)
1.148.4.5 pk 4815: NOP_ON_4M_15:
4816: b,a 1f
4817: b,a 2f
1.148.4.2 pk 4818: #endif
1.148.4.5 pk 4819: 1:
1.148.4.2 pk 4820: #if defined(SUN4) || defined(SUN4C)
1.148.4.3 pk 4821: set AC_CONTEXT, %o2
1.148.4.2 pk 4822: retl
1.148.4.3 pk 4823: stba %o1, [%o2] ASI_CONTROL ! setcontext(vm->vm_pmap.pm_ctxnum);
1.148.4.2 pk 4824: #endif
1.148.4.5 pk 4825: 2:
1.148.4.2 pk 4826: #if defined(SUN4M)
4827: /*
4828: * Flush caches that need to be flushed on context switch.
4829: * We know this is currently only necessary on the sun4m hypersparc.
4830: */
4831: set CPUINFO_VA+CPUINFO_PURE_VCACHE_FLS, %o2
4832: ld [%o2], %o2
4833: mov %o7, %g7 ! save return address
1.148.4.3 pk 4834: jmpl %o2, %o7 ! this function must not clobber %o0,%o1 and %g7
1.148.4.2 pk 4835: nop
4836:
1.148.4.3 pk 4837: set SRMMU_CXR, %o2
1.148.4.2 pk 4838: jmp %g7 + 8
1.148.4.3 pk 4839: sta %o1, [%o2] ASI_SRMMU ! setcontext(vm->vm_pmap.pm_ctxnum);
1.148.4.2 pk 4840: #endif
4841:
4842: Lsw_sameproc:
4843: /*
4844: * We are resuming the process that was running at the
4845: * call to switch(). Just set psr ipl and return.
4846: */
4847: ! wr %g2, 0 %psr ! %psr = newpsr; (done earlier)
4848: nop
4849: retl
1.148.4.3 pk 4850: mov %g0, %o0 ! return value = 0
1.148.4.2 pk 4851:
4852: ENTRY(cpu_preempt)
1.148.4.3 pk 4853: /*
4854: * Like cpu_switch, but we're passed the process to switch to.
4855: *
4856: * Use the same register usage convention as in cpu_switch().
4857: */
4858: mov %o0, %g4 ! lastproc = arg1;
4859: mov %o1, %g3 ! newproc = arg2;
4860: sethi %hi(_C_LABEL(sched_whichqs)), %g2 ! set up addr regs
4861: sethi %hi(cpcb), %g6
4862: ld [%g6 + %lo(cpcb)], %o0
4863: std %o6, [%o0 + PCB_SP] ! cpcb->pcb_<sp,pc> = <sp,pc>;
4864: rd %psr, %g1 ! oldpsr = %psr;
4865: st %g1, [%o0 + PCB_PSR] ! cpcb->pcb_psr = oldpsr;
4866: andn %g1, PSR_PIL, %g1 ! oldpsr &= ~PSR_PIL;
1.148.4.10 nathanw 4867: sethi %hi(curlwp), %g7
4868: st %g0, [%g7 + %lo(curlwp)] ! curlwp = NULL;
1.148.4.3 pk 4869:
4870: /*
4871: * now set up %o4 (which) and %o5 (p->p_back), and continue with
4872: * common code in cpu_switch().
4873: */
4874: ld [%g3 + L_PRIORITY], %o4
4875: srl %o4, 2, %o4
4876: ld [%g3 + 4], %o5 ! %o5 = p->p_back
4877: b,a cpu_switch0
1.148.4.2 pk 4878:
4879: /*
4880: * Snapshot the current process so that stack frames are up to date.
4881: * Only used just before a crash dump.
4882: */
4883: ENTRY(snapshot)
4884: std %o6, [%o0 + PCB_SP] ! save sp
4885: rd %psr, %o1 ! save psr
4886: st %o1, [%o0 + PCB_PSR]
4887:
4888: /*
4889: * Just like switch(); same XXX comments apply.
4890: * 7 of each. Minor tweak: the 7th restore is
4891: * done after a ret.
4892: */
4893: SAVE; SAVE; SAVE; SAVE; SAVE; SAVE; SAVE
4894: restore; restore; restore; restore; restore; restore; ret; restore
4895:
4896:
4897: /*
4898: * cpu_fork() arrange for proc_trampoline() to run after a process gets
4899: * chosen in switch(). The stack frame will contain a function pointer
4900: * in %l0, and an argument to pass to it in %l2.
4901: *
4902: * If the function *(%l0) returns, we arrange for an immediate return
4903: * to user mode. This happens in two known cases: after execve(2) of init,
4904: * and when returning a child to user mode after a fork(2).
4905: *
4906: * If were setting up a kernel thread, the function *(%l0) will not return.
4907: */
4908: ENTRY(proc_trampoline)
4909: /*
4910: * Note: cpu_fork() has set up a stack frame for us to run in,
4911: * so we can call other functions from here without using
4912: * `save ... restore'.
4913: */
4914: #if defined(MULTIPROCESSOR)
4915: /* Finish setup in SMP environment: acquire locks etc. */
4916: call _C_LABEL(proc_trampoline_mp)
4917: nop
4918: #endif
4919:
4920: /* Reset interrupt level */
4921: rd %psr, %o0
4922: andn %o0, PSR_PIL, %o0 ! psr &= ~PSR_PIL;
4923: wr %o0, 0, %psr ! (void) spl0();
4924: nop ! psr delay; the next 2 instructions
4925: ! can safely be made part of the
4926: ! required 3 instructions psr delay
4927: call %l0
4928: mov %l1, %o0
4929:
4930: /*
1.148.4.6 nathanw 4931: * Here we finish up as in syscall, but simplified.
4932: * cpu_fork() or sendsig() (if we took a pending signal
4933: * in child_return()) will have set the user-space return
4934: * address in tf_pc. In both cases, %npc should be %pc + 4.
1.148.4.2 pk 4935: */
4936: mov PSR_S, %l0 ! user psr (no need to load it)
4937: !?wr %g0, 2, %wim ! %wim = 2
1.148.4.6 nathanw 4938: ld [%sp + CCFSZ + 4], %l1 ! pc = tf->tf_pc from cpu_fork()
1.148.4.2 pk 4939: b return_from_syscall
4940: add %l1, 4, %l2 ! npc = pc+4
4941:
4942: /*
4943: * {fu,su}{,i}{byte,word}
4944: */
4945: _ENTRY(fuiword)
4946: ENTRY(fuword)
4947: set KERNBASE, %o2
4948: cmp %o0, %o2 ! if addr >= KERNBASE...
4949: bgeu Lfsbadaddr
4950: EMPTY
4951: btst 3, %o0 ! or has low bits set...
4952: bnz Lfsbadaddr ! go return -1
4953: EMPTY
4954: sethi %hi(cpcb), %o2 ! cpcb->pcb_onfault = Lfserr;
4955: ld [%o2 + %lo(cpcb)], %o2
4956: set Lfserr, %o3
4957: st %o3, [%o2 + PCB_ONFAULT]
4958: ld [%o0], %o0 ! fetch the word
4959: retl ! phew, made it, return the word
4960: st %g0, [%o2 + PCB_ONFAULT]! but first clear onfault
4961:
4962: Lfserr:
4963: st %g0, [%o2 + PCB_ONFAULT]! error in r/w, clear pcb_onfault
4964: Lfsbadaddr:
4965: retl ! and return error indicator
4966: mov -1, %o0
4967:
4968: /*
4969: * This is just like Lfserr, but it's a global label that allows
4970: * mem_access_fault() to check to see that we don't want to try to
4971: * page in the fault. It's used by fuswintr() etc.
4972: */
4973: .globl _C_LABEL(Lfsbail)
4974: _C_LABEL(Lfsbail):
4975: st %g0, [%o2 + PCB_ONFAULT]! error in r/w, clear pcb_onfault
4976: retl ! and return error indicator
4977: mov -1, %o0
4978:
4979: /*
4980: * Like fusword but callable from interrupt context.
4981: * Fails if data isn't resident.
4982: */
4983: ENTRY(fuswintr)
4984: set KERNBASE, %o2
4985: cmp %o0, %o2 ! if addr >= KERNBASE
4986: bgeu Lfsbadaddr ! return error
4987: EMPTY
4988: sethi %hi(cpcb), %o2 ! cpcb->pcb_onfault = Lfsbail;
4989: ld [%o2 + %lo(cpcb)], %o2
4990: set _C_LABEL(Lfsbail), %o3
4991: st %o3, [%o2 + PCB_ONFAULT]
4992: lduh [%o0], %o0 ! fetch the halfword
4993: retl ! made it
4994: st %g0, [%o2 + PCB_ONFAULT]! but first clear onfault
4995:
4996: ENTRY(fusword)
4997: set KERNBASE, %o2
4998: cmp %o0, %o2 ! if addr >= KERNBASE
4999: bgeu Lfsbadaddr ! return error
5000: EMPTY
5001: sethi %hi(cpcb), %o2 ! cpcb->pcb_onfault = Lfserr;
5002: ld [%o2 + %lo(cpcb)], %o2
5003: set Lfserr, %o3
5004: st %o3, [%o2 + PCB_ONFAULT]
5005: lduh [%o0], %o0 ! fetch the halfword
5006: retl ! made it
5007: st %g0, [%o2 + PCB_ONFAULT]! but first clear onfault
5008:
5009: _ENTRY(fuibyte)
5010: ENTRY(fubyte)
5011: set KERNBASE, %o2
5012: cmp %o0, %o2 ! if addr >= KERNBASE
5013: bgeu Lfsbadaddr ! return error
5014: EMPTY
5015: sethi %hi(cpcb), %o2 ! cpcb->pcb_onfault = Lfserr;
5016: ld [%o2 + %lo(cpcb)], %o2
5017: set Lfserr, %o3
5018: st %o3, [%o2 + PCB_ONFAULT]
5019: ldub [%o0], %o0 ! fetch the byte
5020: retl ! made it
5021: st %g0, [%o2 + PCB_ONFAULT]! but first clear onfault
5022:
5023: _ENTRY(suiword)
5024: ENTRY(suword)
5025: set KERNBASE, %o2
5026: cmp %o0, %o2 ! if addr >= KERNBASE ...
5027: bgeu Lfsbadaddr
5028: EMPTY
5029: btst 3, %o0 ! or has low bits set ...
5030: bnz Lfsbadaddr ! go return error
5031: EMPTY
5032: sethi %hi(cpcb), %o2 ! cpcb->pcb_onfault = Lfserr;
5033: ld [%o2 + %lo(cpcb)], %o2
5034: set Lfserr, %o3
5035: st %o3, [%o2 + PCB_ONFAULT]
5036: st %o1, [%o0] ! store the word
5037: st %g0, [%o2 + PCB_ONFAULT]! made it, clear onfault
5038: retl ! and return 0
5039: clr %o0
5040:
5041: ENTRY(suswintr)
5042: set KERNBASE, %o2
5043: cmp %o0, %o2 ! if addr >= KERNBASE
5044: bgeu Lfsbadaddr ! go return error
5045: EMPTY
5046: sethi %hi(cpcb), %o2 ! cpcb->pcb_onfault = Lfsbail;
5047: ld [%o2 + %lo(cpcb)], %o2
5048: set _C_LABEL(Lfsbail), %o3
5049: st %o3, [%o2 + PCB_ONFAULT]
5050: sth %o1, [%o0] ! store the halfword
5051: st %g0, [%o2 + PCB_ONFAULT]! made it, clear onfault
5052: retl ! and return 0
5053: clr %o0
5054:
5055: ENTRY(susword)
5056: set KERNBASE, %o2
5057: cmp %o0, %o2 ! if addr >= KERNBASE
5058: bgeu Lfsbadaddr ! go return error
5059: EMPTY
5060: sethi %hi(cpcb), %o2 ! cpcb->pcb_onfault = Lfserr;
5061: ld [%o2 + %lo(cpcb)], %o2
5062: set Lfserr, %o3
5063: st %o3, [%o2 + PCB_ONFAULT]
5064: sth %o1, [%o0] ! store the halfword
5065: st %g0, [%o2 + PCB_ONFAULT]! made it, clear onfault
5066: retl ! and return 0
5067: clr %o0
5068:
5069: _ENTRY(suibyte)
5070: ENTRY(subyte)
5071: set KERNBASE, %o2
5072: cmp %o0, %o2 ! if addr >= KERNBASE
5073: bgeu Lfsbadaddr ! go return error
5074: EMPTY
5075: sethi %hi(cpcb), %o2 ! cpcb->pcb_onfault = Lfserr;
5076: ld [%o2 + %lo(cpcb)], %o2
5077: set Lfserr, %o3
5078: st %o3, [%o2 + PCB_ONFAULT]
5079: stb %o1, [%o0] ! store the byte
5080: st %g0, [%o2 + PCB_ONFAULT]! made it, clear onfault
5081: retl ! and return 0
5082: clr %o0
5083:
5084: /* probeget and probeset are meant to be used during autoconfiguration */
5085:
5086: /*
5087: * probeget(addr, size) caddr_t addr; int size;
5088: *
5089: * Read or write a (byte,word,longword) from the given address.
5090: * Like {fu,su}{byte,halfword,word} but our caller is supposed
5091: * to know what he is doing... the address can be anywhere.
5092: *
5093: * We optimize for space, rather than time, here.
5094: */
5095: ENTRY(probeget)
5096: ! %o0 = addr, %o1 = (1,2,4)
5097: sethi %hi(cpcb), %o2
5098: ld [%o2 + %lo(cpcb)], %o2 ! cpcb->pcb_onfault = Lfserr;
5099: set Lfserr, %o5
5100: st %o5, [%o2 + PCB_ONFAULT]
5101: btst 1, %o1
5102: bnz,a 0f ! if (len & 1)
5103: ldub [%o0], %o0 ! value = *(char *)addr;
5104: 0: btst 2, %o1
5105: bnz,a 0f ! if (len & 2)
5106: lduh [%o0], %o0 ! value = *(short *)addr;
5107: 0: btst 4, %o1
5108: bnz,a 0f ! if (len & 4)
5109: ld [%o0], %o0 ! value = *(int *)addr;
5110: 0: retl ! made it, clear onfault and return
5111: st %g0, [%o2 + PCB_ONFAULT]
5112:
5113: /*
5114: * probeset(addr, size, val) caddr_t addr; int size, val;
5115: *
5116: * As above, but we return 0 on success.
5117: */
5118: ENTRY(probeset)
5119: ! %o0 = addr, %o1 = (1,2,4), %o2 = val
5120: sethi %hi(cpcb), %o3
5121: ld [%o3 + %lo(cpcb)], %o3 ! cpcb->pcb_onfault = Lfserr;
5122: set Lfserr, %o5
5123: st %o5, [%o3 + PCB_ONFAULT]
5124: btst 1, %o1
5125: bnz,a 0f ! if (len & 1)
5126: stb %o2, [%o0] ! *(char *)addr = value;
5127: 0: btst 2, %o1
5128: bnz,a 0f ! if (len & 2)
5129: sth %o2, [%o0] ! *(short *)addr = value;
5130: 0: btst 4, %o1
5131: bnz,a 0f ! if (len & 4)
5132: st %o2, [%o0] ! *(int *)addr = value;
5133: 0: clr %o0 ! made it, clear onfault and return 0
5134: retl
5135: st %g0, [%o3 + PCB_ONFAULT]
5136:
5137: /*
5138: * int xldcontrolb(caddr_t, pcb)
5139: * %o0 %o1
5140: *
5141: * read a byte from the specified address in ASI_CONTROL space.
5142: */
5143: ENTRY(xldcontrolb)
5144: !sethi %hi(cpcb), %o2
5145: !ld [%o2 + %lo(cpcb)], %o2 ! cpcb->pcb_onfault = Lfsbail;
5146: or %o1, %g0, %o2 ! %o2 = %o1
5147: set _C_LABEL(Lfsbail), %o5
5148: st %o5, [%o2 + PCB_ONFAULT]
5149: lduba [%o0] ASI_CONTROL, %o0 ! read
5150: 0: retl
5151: st %g0, [%o2 + PCB_ONFAULT]
5152:
5153: /*
5154: * int fkbyte(caddr_t, pcb)
5155: * %o0 %o1
5156: *
5157: * Just like fubyte(), but for kernel space.
5158: * (currently used to work around unexplained transient bus errors
5159: * when reading the VME interrupt vector)
5160: */
5161: ENTRY(fkbyte)
5162: or %o1, %g0, %o2 ! %o2 = %o1
5163: set _C_LABEL(Lfsbail), %o5
5164: st %o5, [%o2 + PCB_ONFAULT]
5165: ldub [%o0], %o0 ! fetch the byte
5166: retl ! made it
5167: st %g0, [%o2 + PCB_ONFAULT]! but first clear onfault
5168:
5169:
5170: /*
5171: * copywords(src, dst, nbytes)
5172: *
5173: * Copy `nbytes' bytes from src to dst, both of which are word-aligned;
5174: * nbytes is a multiple of four. It may, however, be zero, in which case
5175: * nothing is to be copied.
5176: */
5177: ENTRY(copywords)
5178: ! %o0 = src, %o1 = dst, %o2 = nbytes
5179: b 1f
5180: deccc 4, %o2
5181: 0:
5182: st %o3, [%o1 + %o2]
5183: deccc 4, %o2 ! while ((n -= 4) >= 0)
5184: 1:
5185: bge,a 0b ! *(int *)(dst+n) = *(int *)(src+n);
5186: ld [%o0 + %o2], %o3
5187: retl
5188: nop
5189:
5190: /*
5191: * qcopy(src, dst, nbytes)
5192: *
5193: * (q for `quad' or `quick', as opposed to b for byte/block copy)
5194: *
5195: * Just like copywords, but everything is multiples of 8.
5196: */
5197: ENTRY(qcopy)
5198: b 1f
5199: deccc 8, %o2
5200: 0:
5201: std %o4, [%o1 + %o2]
5202: deccc 8, %o2
5203: 1:
5204: bge,a 0b
5205: ldd [%o0 + %o2], %o4
5206: retl
5207: nop
5208:
5209: /*
5210: * qzero(addr, nbytes)
5211: *
5212: * Zeroes `nbytes' bytes of a quad-aligned virtual address,
5213: * where nbytes is itself a multiple of 8.
5214: */
5215: ENTRY(qzero)
5216: ! %o0 = addr, %o1 = len (in bytes)
5217: clr %g1
5218: 0:
5219: deccc 8, %o1 ! while ((n =- 8) >= 0)
5220: bge,a 0b
5221: std %g0, [%o0 + %o1] ! *(quad *)(addr + n) = 0;
5222: retl
5223: nop
5224:
5225: /*
5226: * kernel bcopy
5227: * Assumes regions do not overlap; has no useful return value.
5228: *
5229: * Must not use %g7 (see copyin/copyout above).
5230: */
5231:
5232: #define BCOPY_SMALL 32 /* if < 32, copy by bytes */
5233:
5234: ENTRY(bcopy)
5235: cmp %o2, BCOPY_SMALL
5236: Lbcopy_start:
5237: bge,a Lbcopy_fancy ! if >= this many, go be fancy.
5238: btst 7, %o0 ! (part of being fancy)
5239:
5240: /*
5241: * Not much to copy, just do it a byte at a time.
5242: */
5243: deccc %o2 ! while (--len >= 0)
5244: bl 1f
5245: EMPTY
5246: 0:
5247: inc %o0
5248: ldsb [%o0 - 1], %o4 ! (++dst)[-1] = *src++;
5249: stb %o4, [%o1]
5250: deccc %o2
5251: bge 0b
5252: inc %o1
5253: 1:
5254: retl
5255: nop
5256: /* NOTREACHED */
5257:
5258: /*
5259: * Plenty of data to copy, so try to do it optimally.
5260: */
5261: Lbcopy_fancy:
5262: ! check for common case first: everything lines up.
5263: ! btst 7, %o0 ! done already
5264: bne 1f
5265: EMPTY
5266: btst 7, %o1
5267: be,a Lbcopy_doubles
5268: dec 8, %o2 ! if all lined up, len -= 8, goto bcopy_doubes
5269:
5270: ! If the low bits match, we can make these line up.
5271: 1:
5272: xor %o0, %o1, %o3 ! t = src ^ dst;
5273: btst 1, %o3 ! if (t & 1) {
5274: be,a 1f
5275: btst 1, %o0 ! [delay slot: if (src & 1)]
5276:
5277: ! low bits do not match, must copy by bytes.
5278: 0:
5279: ldsb [%o0], %o4 ! do {
5280: inc %o0 ! (++dst)[-1] = *src++;
5281: inc %o1
5282: deccc %o2
5283: bnz 0b ! } while (--len != 0);
5284: stb %o4, [%o1 - 1]
5285: retl
5286: nop
5287: /* NOTREACHED */
5288:
5289: ! lowest bit matches, so we can copy by words, if nothing else
5290: 1:
5291: be,a 1f ! if (src & 1) {
5292: btst 2, %o3 ! [delay slot: if (t & 2)]
5293:
5294: ! although low bits match, both are 1: must copy 1 byte to align
5295: ldsb [%o0], %o4 ! *dst++ = *src++;
5296: stb %o4, [%o1]
5297: inc %o0
5298: inc %o1
5299: dec %o2 ! len--;
5300: btst 2, %o3 ! } [if (t & 2)]
5301: 1:
5302: be,a 1f ! if (t & 2) {
5303: btst 2, %o0 ! [delay slot: if (src & 2)]
5304: dec 2, %o2 ! len -= 2;
5305: 0:
5306: ldsh [%o0], %o4 ! do {
5307: sth %o4, [%o1] ! *(short *)dst = *(short *)src;
5308: inc 2, %o0 ! dst += 2, src += 2;
5309: deccc 2, %o2 ! } while ((len -= 2) >= 0);
5310: bge 0b
5311: inc 2, %o1
5312: b Lbcopy_mopb ! goto mop_up_byte;
5313: btst 1, %o2 ! } [delay slot: if (len & 1)]
5314: /* NOTREACHED */
5315:
5316: ! low two bits match, so we can copy by longwords
5317: 1:
5318: be,a 1f ! if (src & 2) {
5319: btst 4, %o3 ! [delay slot: if (t & 4)]
5320:
5321: ! although low 2 bits match, they are 10: must copy one short to align
5322: ldsh [%o0], %o4 ! (*short *)dst = *(short *)src;
5323: sth %o4, [%o1]
5324: inc 2, %o0 ! dst += 2;
5325: inc 2, %o1 ! src += 2;
5326: dec 2, %o2 ! len -= 2;
5327: btst 4, %o3 ! } [if (t & 4)]
5328: 1:
5329: be,a 1f ! if (t & 4) {
5330: btst 4, %o0 ! [delay slot: if (src & 4)]
5331: dec 4, %o2 ! len -= 4;
5332: 0:
5333: ld [%o0], %o4 ! do {
5334: st %o4, [%o1] ! *(int *)dst = *(int *)src;
5335: inc 4, %o0 ! dst += 4, src += 4;
5336: deccc 4, %o2 ! } while ((len -= 4) >= 0);
5337: bge 0b
5338: inc 4, %o1
5339: b Lbcopy_mopw ! goto mop_up_word_and_byte;
5340: btst 2, %o2 ! } [delay slot: if (len & 2)]
5341: /* NOTREACHED */
5342:
5343: ! low three bits match, so we can copy by doublewords
5344: 1:
5345: be 1f ! if (src & 4) {
5346: dec 8, %o2 ! [delay slot: len -= 8]
5347: ld [%o0], %o4 ! *(int *)dst = *(int *)src;
5348: st %o4, [%o1]
5349: inc 4, %o0 ! dst += 4, src += 4, len -= 4;
5350: inc 4, %o1
5351: dec 4, %o2 ! }
5352: 1:
5353: Lbcopy_doubles:
5354: ldd [%o0], %o4 ! do {
5355: std %o4, [%o1] ! *(double *)dst = *(double *)src;
5356: inc 8, %o0 ! dst += 8, src += 8;
5357: deccc 8, %o2 ! } while ((len -= 8) >= 0);
5358: bge Lbcopy_doubles
5359: inc 8, %o1
5360:
5361: ! check for a usual case again (save work)
5362: btst 7, %o2 ! if ((len & 7) == 0)
5363: be Lbcopy_done ! goto bcopy_done;
5364:
5365: btst 4, %o2 ! if ((len & 4)) == 0)
5366: be,a Lbcopy_mopw ! goto mop_up_word_and_byte;
5367: btst 2, %o2 ! [delay slot: if (len & 2)]
5368: ld [%o0], %o4 ! *(int *)dst = *(int *)src;
5369: st %o4, [%o1]
5370: inc 4, %o0 ! dst += 4;
5371: inc 4, %o1 ! src += 4;
5372: btst 2, %o2 ! } [if (len & 2)]
5373:
5374: 1:
5375: ! mop up trailing word (if present) and byte (if present).
5376: Lbcopy_mopw:
5377: be Lbcopy_mopb ! no word, go mop up byte
5378: btst 1, %o2 ! [delay slot: if (len & 1)]
5379: ldsh [%o0], %o4 ! *(short *)dst = *(short *)src;
5380: be Lbcopy_done ! if ((len & 1) == 0) goto done;
5381: sth %o4, [%o1]
5382: ldsb [%o0 + 2], %o4 ! dst[2] = src[2];
5383: retl
5384: stb %o4, [%o1 + 2]
5385: /* NOTREACHED */
5386:
5387: ! mop up trailing byte (if present).
5388: Lbcopy_mopb:
5389: bne,a 1f
5390: ldsb [%o0], %o4
5391:
5392: Lbcopy_done:
5393: retl
5394: nop
5395:
5396: 1:
5397: retl
5398: stb %o4,[%o1]
5399: /*
5400: * ovbcopy(src, dst, len): like bcopy, but regions may overlap.
5401: */
5402: ENTRY(ovbcopy)
5403: cmp %o0, %o1 ! src < dst?
5404: bgeu Lbcopy_start ! no, go copy forwards as via bcopy
5405: cmp %o2, BCOPY_SMALL! (check length for doublecopy first)
5406:
5407: /*
5408: * Since src comes before dst, and the regions might overlap,
5409: * we have to do the copy starting at the end and working backwards.
5410: */
5411: add %o2, %o0, %o0 ! src += len
5412: add %o2, %o1, %o1 ! dst += len
5413: bge,a Lback_fancy ! if len >= BCOPY_SMALL, go be fancy
5414: btst 3, %o0
5415:
5416: /*
5417: * Not much to copy, just do it a byte at a time.
5418: */
5419: deccc %o2 ! while (--len >= 0)
5420: bl 1f
5421: EMPTY
5422: 0:
5423: dec %o0 ! *--dst = *--src;
5424: ldsb [%o0], %o4
5425: dec %o1
5426: deccc %o2
5427: bge 0b
5428: stb %o4, [%o1]
5429: 1:
5430: retl
5431: nop
5432:
5433: /*
5434: * Plenty to copy, try to be optimal.
5435: * We only bother with word/halfword/byte copies here.
5436: */
5437: Lback_fancy:
5438: ! btst 3, %o0 ! done already
5439: bnz 1f ! if ((src & 3) == 0 &&
5440: btst 3, %o1 ! (dst & 3) == 0)
5441: bz,a Lback_words ! goto words;
5442: dec 4, %o2 ! (done early for word copy)
5443:
5444: 1:
5445: /*
5446: * See if the low bits match.
5447: */
5448: xor %o0, %o1, %o3 ! t = src ^ dst;
5449: btst 1, %o3
5450: bz,a 3f ! if (t & 1) == 0, can do better
5451: btst 1, %o0
5452:
5453: /*
5454: * Nope; gotta do byte copy.
5455: */
5456: 2:
5457: dec %o0 ! do {
5458: ldsb [%o0], %o4 ! *--dst = *--src;
5459: dec %o1
5460: deccc %o2 ! } while (--len != 0);
5461: bnz 2b
5462: stb %o4, [%o1]
5463: retl
5464: nop
5465:
5466: 3:
5467: /*
5468: * Can do halfword or word copy, but might have to copy 1 byte first.
5469: */
5470: ! btst 1, %o0 ! done earlier
5471: bz,a 4f ! if (src & 1) { /* copy 1 byte */
5472: btst 2, %o3 ! (done early)
5473: dec %o0 ! *--dst = *--src;
5474: ldsb [%o0], %o4
5475: dec %o1
5476: stb %o4, [%o1]
5477: dec %o2 ! len--;
5478: btst 2, %o3 ! }
5479:
5480: 4:
5481: /*
5482: * See if we can do a word copy ((t&2) == 0).
5483: */
5484: ! btst 2, %o3 ! done earlier
5485: bz,a 6f ! if (t & 2) == 0, can do word copy
5486: btst 2, %o0 ! (src&2, done early)
5487:
5488: /*
5489: * Gotta do halfword copy.
5490: */
5491: dec 2, %o2 ! len -= 2;
5492: 5:
5493: dec 2, %o0 ! do {
5494: ldsh [%o0], %o4 ! src -= 2;
5495: dec 2, %o1 ! dst -= 2;
5496: deccc 2, %o0 ! *(short *)dst = *(short *)src;
5497: bge 5b ! } while ((len -= 2) >= 0);
5498: sth %o4, [%o1]
5499: b Lback_mopb ! goto mop_up_byte;
5500: btst 1, %o2 ! (len&1, done early)
5501:
5502: 6:
5503: /*
5504: * We can do word copies, but we might have to copy
5505: * one halfword first.
5506: */
5507: ! btst 2, %o0 ! done already
5508: bz 7f ! if (src & 2) {
5509: dec 4, %o2 ! (len -= 4, done early)
5510: dec 2, %o0 ! src -= 2, dst -= 2;
5511: ldsh [%o0], %o4 ! *(short *)dst = *(short *)src;
5512: dec 2, %o1
5513: sth %o4, [%o1]
5514: dec 2, %o2 ! len -= 2;
5515: ! }
5516:
5517: 7:
5518: Lback_words:
5519: /*
5520: * Do word copies (backwards), then mop up trailing halfword
5521: * and byte if any.
5522: */
5523: ! dec 4, %o2 ! len -= 4, done already
5524: 0: ! do {
5525: dec 4, %o0 ! src -= 4;
5526: dec 4, %o1 ! src -= 4;
5527: ld [%o0], %o4 ! *(int *)dst = *(int *)src;
5528: deccc 4, %o2 ! } while ((len -= 4) >= 0);
5529: bge 0b
5530: st %o4, [%o1]
5531:
5532: /*
5533: * Check for trailing shortword.
5534: */
5535: btst 2, %o2 ! if (len & 2) {
5536: bz,a 1f
5537: btst 1, %o2 ! (len&1, done early)
5538: dec 2, %o0 ! src -= 2, dst -= 2;
5539: ldsh [%o0], %o4 ! *(short *)dst = *(short *)src;
5540: dec 2, %o1
5541: sth %o4, [%o1] ! }
5542: btst 1, %o2
5543:
5544: /*
5545: * Check for trailing byte.
5546: */
5547: 1:
5548: Lback_mopb:
5549: ! btst 1, %o2 ! (done already)
5550: bnz,a 1f ! if (len & 1) {
5551: ldsb [%o0 - 1], %o4 ! b = src[-1];
5552: retl
5553: nop
5554: 1:
5555: retl ! dst[-1] = b;
5556: stb %o4, [%o1 - 1] ! }
5557:
5558: /*
5559: * kcopy() is exactly like bcopy except that it set pcb_onfault such that
5560: * when a fault occurs, it is able to return -1 to indicate this to the
5561: * caller.
5562: */
5563: ENTRY(kcopy)
5564: sethi %hi(cpcb), %o5 ! cpcb->pcb_onfault = Lkcerr;
5565: ld [%o5 + %lo(cpcb)], %o5
5566: set Lkcerr, %o3
5567: ld [%o5 + PCB_ONFAULT], %g1! save current onfault handler
5568: st %o3, [%o5 + PCB_ONFAULT]
5569:
5570: cmp %o2, BCOPY_SMALL
5571: Lkcopy_start:
5572: bge,a Lkcopy_fancy ! if >= this many, go be fancy.
5573: btst 7, %o0 ! (part of being fancy)
5574:
5575: /*
5576: * Not much to copy, just do it a byte at a time.
5577: */
5578: deccc %o2 ! while (--len >= 0)
5579: bl 1f
5580: EMPTY
5581: 0:
5582: ldsb [%o0], %o4 ! *dst++ = *src++;
5583: inc %o0
5584: stb %o4, [%o1]
5585: deccc %o2
5586: bge 0b
5587: inc %o1
5588: 1:
5589: st %g1, [%o5 + PCB_ONFAULT] ! restore onfault
5590: retl
5591: mov 0, %o0 ! delay slot: return success
5592: /* NOTREACHED */
5593:
5594: /*
5595: * Plenty of data to copy, so try to do it optimally.
5596: */
5597: Lkcopy_fancy:
5598: ! check for common case first: everything lines up.
5599: ! btst 7, %o0 ! done already
5600: bne 1f
5601: EMPTY
5602: btst 7, %o1
5603: be,a Lkcopy_doubles
5604: dec 8, %o2 ! if all lined up, len -= 8, goto bcopy_doubes
5605:
5606: ! If the low bits match, we can make these line up.
5607: 1:
5608: xor %o0, %o1, %o3 ! t = src ^ dst;
5609: btst 1, %o3 ! if (t & 1) {
5610: be,a 1f
5611: btst 1, %o0 ! [delay slot: if (src & 1)]
5612:
5613: ! low bits do not match, must copy by bytes.
5614: 0:
5615: ldsb [%o0], %o4 ! do {
5616: inc %o0 ! *dst++ = *src++;
5617: stb %o4, [%o1]
5618: deccc %o2
5619: bnz 0b ! } while (--len != 0);
5620: inc %o1
5621: st %g1, [%o5 + PCB_ONFAULT] ! restore onfault
5622: retl
5623: mov 0, %o0 ! delay slot: return success
5624: /* NOTREACHED */
5625:
5626: ! lowest bit matches, so we can copy by words, if nothing else
5627: 1:
5628: be,a 1f ! if (src & 1) {
5629: btst 2, %o3 ! [delay slot: if (t & 2)]
5630:
5631: ! although low bits match, both are 1: must copy 1 byte to align
5632: ldsb [%o0], %o4 ! *dst++ = *src++;
5633: inc %o0
5634: stb %o4, [%o1]
5635: dec %o2 ! len--;
5636: inc %o1
5637: btst 2, %o3 ! } [if (t & 2)]
5638: 1:
5639: be,a 1f ! if (t & 2) {
5640: btst 2, %o0 ! [delay slot: if (src & 2)]
5641: dec 2, %o2 ! len -= 2;
5642: 0:
5643: ldsh [%o0], %o4 ! do {
5644: inc 2, %o0 ! dst += 2, src += 2;
5645: sth %o4, [%o1] ! *(short *)dst = *(short *)src;
5646: deccc 2, %o2 ! } while ((len -= 2) >= 0);
5647: bge 0b
5648: inc 2, %o1
5649: b Lkcopy_mopb ! goto mop_up_byte;
5650: btst 1, %o2 ! } [delay slot: if (len & 1)]
5651: /* NOTREACHED */
5652:
5653: ! low two bits match, so we can copy by longwords
5654: 1:
5655: be,a 1f ! if (src & 2) {
5656: btst 4, %o3 ! [delay slot: if (t & 4)]
5657:
5658: ! although low 2 bits match, they are 10: must copy one short to align
5659: ldsh [%o0], %o4 ! (*short *)dst = *(short *)src;
5660: inc 2, %o0 ! dst += 2;
5661: sth %o4, [%o1]
5662: dec 2, %o2 ! len -= 2;
5663: inc 2, %o1 ! src += 2;
5664: btst 4, %o3 ! } [if (t & 4)]
5665: 1:
5666: be,a 1f ! if (t & 4) {
5667: btst 4, %o0 ! [delay slot: if (src & 4)]
5668: dec 4, %o2 ! len -= 4;
5669: 0:
5670: ld [%o0], %o4 ! do {
5671: inc 4, %o0 ! dst += 4, src += 4;
5672: st %o4, [%o1] ! *(int *)dst = *(int *)src;
5673: deccc 4, %o2 ! } while ((len -= 4) >= 0);
5674: bge 0b
5675: inc 4, %o1
5676: b Lkcopy_mopw ! goto mop_up_word_and_byte;
5677: btst 2, %o2 ! } [delay slot: if (len & 2)]
5678: /* NOTREACHED */
5679:
5680: ! low three bits match, so we can copy by doublewords
5681: 1:
5682: be 1f ! if (src & 4) {
5683: dec 8, %o2 ! [delay slot: len -= 8]
5684: ld [%o0], %o4 ! *(int *)dst = *(int *)src;
5685: inc 4, %o0 ! dst += 4, src += 4, len -= 4;
5686: st %o4, [%o1]
5687: dec 4, %o2 ! }
5688: inc 4, %o1
5689: 1:
5690: Lkcopy_doubles:
5691: ! swap %o4 with %o2 during doubles copy, since %o5 is verboten
5692: mov %o2, %o4
5693: Lkcopy_doubles2:
5694: ldd [%o0], %o2 ! do {
5695: inc 8, %o0 ! dst += 8, src += 8;
5696: std %o2, [%o1] ! *(double *)dst = *(double *)src;
5697: deccc 8, %o4 ! } while ((len -= 8) >= 0);
5698: bge Lkcopy_doubles2
5699: inc 8, %o1
5700: mov %o4, %o2 ! restore len
5701:
5702: ! check for a usual case again (save work)
5703: btst 7, %o2 ! if ((len & 7) == 0)
5704: be Lkcopy_done ! goto bcopy_done;
5705:
5706: btst 4, %o2 ! if ((len & 4)) == 0)
5707: be,a Lkcopy_mopw ! goto mop_up_word_and_byte;
5708: btst 2, %o2 ! [delay slot: if (len & 2)]
5709: ld [%o0], %o4 ! *(int *)dst = *(int *)src;
5710: inc 4, %o0 ! dst += 4;
5711: st %o4, [%o1]
5712: inc 4, %o1 ! src += 4;
5713: btst 2, %o2 ! } [if (len & 2)]
5714:
5715: 1:
5716: ! mop up trailing word (if present) and byte (if present).
5717: Lkcopy_mopw:
5718: be Lkcopy_mopb ! no word, go mop up byte
5719: btst 1, %o2 ! [delay slot: if (len & 1)]
5720: ldsh [%o0], %o4 ! *(short *)dst = *(short *)src;
5721: be Lkcopy_done ! if ((len & 1) == 0) goto done;
5722: sth %o4, [%o1]
5723: ldsb [%o0 + 2], %o4 ! dst[2] = src[2];
5724: stb %o4, [%o1 + 2]
5725: st %g1, [%o5 + PCB_ONFAULT]! restore onfault
5726: retl
5727: mov 0, %o0 ! delay slot: return success
5728: /* NOTREACHED */
5729:
5730: ! mop up trailing byte (if present).
5731: Lkcopy_mopb:
5732: bne,a 1f
5733: ldsb [%o0], %o4
5734:
5735: Lkcopy_done:
5736: st %g1, [%o5 + PCB_ONFAULT] ! restore onfault
5737: retl
5738: mov 0, %o0 ! delay slot: return success
5739: /* NOTREACHED */
5740:
5741: 1:
5742: stb %o4, [%o1]
5743: st %g1, [%o5 + PCB_ONFAULT] ! restore onfault
5744: retl
5745: mov 0, %o0 ! delay slot: return success
5746: /* NOTREACHED */
5747:
5748: Lkcerr:
5749: retl
5750: st %g1, [%o5 + PCB_ONFAULT] ! restore onfault
5751: /* NOTREACHED */
5752:
5753: /*
5754: * savefpstate(f) struct fpstate *f;
5755: *
5756: * Store the current FPU state. The first `st %fsr' may cause a trap;
5757: * our trap handler knows how to recover (by `returning' to savefpcont).
5758: */
5759: ENTRY(savefpstate)
5760: rd %psr, %o1 ! enable FP before we begin
5761: set PSR_EF, %o2
5762: or %o1, %o2, %o1
5763: wr %o1, 0, %psr
5764: /* do some setup work while we wait for PSR_EF to turn on */
5765: set FSR_QNE, %o5 ! QNE = 0x2000, too big for immediate
5766: clr %o3 ! qsize = 0;
5767: nop ! (still waiting for PSR_EF)
5768: special_fp_store:
5769: st %fsr, [%o0 + FS_FSR] ! f->fs_fsr = getfsr();
5770: /*
5771: * Even if the preceding instruction did not trap, the queue
5772: * is not necessarily empty: this state save might be happening
5773: * because user code tried to store %fsr and took the FPU
5774: * from `exception pending' mode to `exception' mode.
5775: * So we still have to check the blasted QNE bit.
5776: * With any luck it will usually not be set.
5777: */
5778: ld [%o0 + FS_FSR], %o4 ! if (f->fs_fsr & QNE)
5779: btst %o5, %o4
5780: bnz Lfp_storeq ! goto storeq;
5781: std %f0, [%o0 + FS_REGS + (4*0)] ! f->fs_f0 = etc;
5782: Lfp_finish:
5783: st %o3, [%o0 + FS_QSIZE] ! f->fs_qsize = qsize;
5784: std %f2, [%o0 + FS_REGS + (4*2)]
5785: std %f4, [%o0 + FS_REGS + (4*4)]
5786: std %f6, [%o0 + FS_REGS + (4*6)]
5787: std %f8, [%o0 + FS_REGS + (4*8)]
5788: std %f10, [%o0 + FS_REGS + (4*10)]
5789: std %f12, [%o0 + FS_REGS + (4*12)]
5790: std %f14, [%o0 + FS_REGS + (4*14)]
5791: std %f16, [%o0 + FS_REGS + (4*16)]
5792: std %f18, [%o0 + FS_REGS + (4*18)]
5793: std %f20, [%o0 + FS_REGS + (4*20)]
5794: std %f22, [%o0 + FS_REGS + (4*22)]
5795: std %f24, [%o0 + FS_REGS + (4*24)]
5796: std %f26, [%o0 + FS_REGS + (4*26)]
5797: std %f28, [%o0 + FS_REGS + (4*28)]
5798: retl
5799: std %f30, [%o0 + FS_REGS + (4*30)]
5800:
5801: /*
5802: * Store the (now known nonempty) FP queue.
5803: * We have to reread the fsr each time in order to get the new QNE bit.
5804: */
5805: Lfp_storeq:
5806: add %o0, FS_QUEUE, %o1 ! q = &f->fs_queue[0];
5807: 1:
5808: std %fq, [%o1 + %o3] ! q[qsize++] = fsr_qfront();
5809: st %fsr, [%o0 + FS_FSR] ! reread fsr
5810: ld [%o0 + FS_FSR], %o4 ! if fsr & QNE, loop
5811: btst %o5, %o4
5812: bnz 1b
5813: inc 8, %o3
5814: b Lfp_finish ! set qsize and finish storing fregs
5815: srl %o3, 3, %o3 ! (but first fix qsize)
5816:
5817: /*
5818: * The fsr store trapped. Do it again; this time it will not trap.
5819: * We could just have the trap handler return to the `st %fsr', but
5820: * if for some reason it *does* trap, that would lock us into a tight
5821: * loop. This way we panic instead. Whoopee.
5822: */
5823: savefpcont:
5824: b special_fp_store + 4 ! continue
5825: st %fsr, [%o0 + FS_FSR] ! but first finish the %fsr store
5826:
5827: /*
5828: * Load FPU state.
5829: */
5830: ENTRY(loadfpstate)
5831: rd %psr, %o1 ! enable FP before we begin
5832: set PSR_EF, %o2
5833: or %o1, %o2, %o1
5834: wr %o1, 0, %psr
5835: nop; nop; nop ! paranoia
5836: ldd [%o0 + FS_REGS + (4*0)], %f0
5837: ldd [%o0 + FS_REGS + (4*2)], %f2
5838: ldd [%o0 + FS_REGS + (4*4)], %f4
5839: ldd [%o0 + FS_REGS + (4*6)], %f6
5840: ldd [%o0 + FS_REGS + (4*8)], %f8
5841: ldd [%o0 + FS_REGS + (4*10)], %f10
5842: ldd [%o0 + FS_REGS + (4*12)], %f12
5843: ldd [%o0 + FS_REGS + (4*14)], %f14
5844: ldd [%o0 + FS_REGS + (4*16)], %f16
5845: ldd [%o0 + FS_REGS + (4*18)], %f18
5846: ldd [%o0 + FS_REGS + (4*20)], %f20
5847: ldd [%o0 + FS_REGS + (4*22)], %f22
5848: ldd [%o0 + FS_REGS + (4*24)], %f24
5849: ldd [%o0 + FS_REGS + (4*26)], %f26
5850: ldd [%o0 + FS_REGS + (4*28)], %f28
5851: ldd [%o0 + FS_REGS + (4*30)], %f30
5852: retl
5853: ld [%o0 + FS_FSR], %fsr ! setfsr(f->fs_fsr);
5854:
5855: /*
5856: * ienab_bis(bis) int bis;
5857: * ienab_bic(bic) int bic;
5858: *
5859: * Set and clear bits in the interrupt register.
5860: */
5861:
5862: #if defined(SUN4M) && (defined(SUN4) || defined(SUN4C))
5863: ENTRY(ienab_bis)
5864: NOP_ON_4M_13:
5865: b,a _C_LABEL(ienab_bis_4_4c)
5866: b,a _C_LABEL(ienab_bis_4m)
5867:
5868: ENTRY(ienab_bic)
5869: NOP_ON_4M_14:
5870: b,a _C_LABEL(ienab_bic_4_4c)
5871: b,a _C_LABEL(ienab_bic_4m)
5872: #endif
5873:
5874: #if defined(SUN4) || defined(SUN4C)
5875: /*
5876: * Since there are no read-modify-write instructions for this,
5877: * and one of the interrupts is nonmaskable, we must disable traps.
5878: */
5879: #if defined(SUN4M)
5880: ENTRY(ienab_bis_4_4c)
5881: #else
5882: ENTRY(ienab_bis)
5883: #endif
5884: ! %o0 = bits to set
5885: rd %psr, %o2
5886: wr %o2, PSR_ET, %psr ! disable traps
5887: nop; nop ! 3-instr delay until ET turns off
5888: sethi %hi(INTRREG_VA), %o3
5889: ldub [%o3 + %lo(INTRREG_VA)], %o4
5890: or %o4, %o0, %o4 ! *INTRREG_VA |= bis;
5891: stb %o4, [%o3 + %lo(INTRREG_VA)]
5892: wr %o2, 0, %psr ! reenable traps
5893: nop
5894: retl
5895: nop
5896:
5897: #if defined(SUN4M)
5898: ENTRY(ienab_bic_4_4c)
5899: #else
5900: ENTRY(ienab_bic)
5901: #endif
5902: ! %o0 = bits to clear
5903: rd %psr, %o2
5904: wr %o2, PSR_ET, %psr ! disable traps
5905: nop; nop
5906: sethi %hi(INTRREG_VA), %o3
5907: ldub [%o3 + %lo(INTRREG_VA)], %o4
5908: andn %o4, %o0, %o4 ! *INTRREG_VA &=~ bic;
5909: stb %o4, [%o3 + %lo(INTRREG_VA)]
5910: wr %o2, 0, %psr ! reenable traps
5911: nop
5912: retl
5913: nop
5914: #endif
5915:
5916: #if defined(SUN4M)
5917: /*
5918: * sun4m has separate registers for clearing/setting the interrupt mask.
5919: */
5920: #if defined(SUN4) || defined(SUN4C)
5921: ENTRY(ienab_bis_4m)
5922: #else
5923: ENTRY(ienab_bis)
5924: #endif
5925: set ICR_SI_SET, %o1
5926: retl
5927: st %o0, [%o1]
5928:
5929: #if defined(SUN4) || defined(SUN4C)
5930: ENTRY(ienab_bic_4m)
5931: #else
5932: ENTRY(ienab_bic)
5933: #endif
5934: set ICR_SI_CLR, %o1
5935: retl
5936: st %o0, [%o1]
5937:
5938: /*
5939: * raise(cpu, level)
5940: */
5941: ENTRY(raise)
1.148.4.6 nathanw 5942: #if !defined(MSIIEP) /* normal suns */
1.148.4.2 pk 5943: ! *(ICR_PI_SET + cpu*_MAXNBPG) = PINTR_SINTRLEV(level)
5944: sethi %hi(1 << 16), %o2
5945: sll %o2, %o1, %o2
5946: set ICR_PI_SET, %o1
5947: set _MAXNBPG, %o3
5948: 1:
5949: subcc %o0, 1, %o0
5950: bpos,a 1b
5951: add %o1, %o3, %o1
5952: retl
5953: st %o2, [%o1]
1.148.4.6 nathanw 5954: #else /* MSIIEP - ignore %o0, only one cpu ever */
5955: mov 1, %o2
5956: sethi %hi(MSIIEP_PCIC_VA), %o0
5957: sll %o2, %o1, %o2
5958: retl
5959: sth %o2, [%o0 + PCIC_SOFT_INTR_SET_REG]
5960: #endif
1.148.4.2 pk 5961:
5962: /*
5963: * Read Synchronous Fault Status registers.
5964: * On entry: %l1 == PC, %l3 == fault type, %l4 == storage, %l7 == return address
5965: * Only use %l5 and %l6.
5966: * Note: not C callable.
5967: */
5968: _ENTRY(_C_LABEL(srmmu_get_syncflt))
5969: _ENTRY(_C_LABEL(hypersparc_get_syncflt))
5970: set SRMMU_SFAR, %l5
5971: lda [%l5] ASI_SRMMU, %l5 ! sync virt addr; must be read first
5972: st %l5, [%l4 + 4] ! => dump.sfva
5973: set SRMMU_SFSR, %l5
5974: lda [%l5] ASI_SRMMU, %l5 ! get sync fault status register
5975: jmp %l7 + 8 ! return to caller
5976: st %l5, [%l4] ! => dump.sfsr
5977:
5978: _ENTRY(_C_LABEL(viking_get_syncflt))
5979: _ENTRY(_C_LABEL(ms1_get_syncflt))
5980: _ENTRY(_C_LABEL(swift_get_syncflt))
5981: _ENTRY(_C_LABEL(turbosparc_get_syncflt))
5982: _ENTRY(_C_LABEL(cypress_get_syncflt))
5983: cmp %l3, T_TEXTFAULT
5984: be,a 1f
5985: mov %l1, %l5 ! use PC if type == T_TEXTFAULT
5986:
5987: set SRMMU_SFAR, %l5
5988: lda [%l5] ASI_SRMMU, %l5 ! sync virt addr; must be read first
5989: 1:
5990: st %l5, [%l4 + 4] ! => dump.sfva
5991:
5992: set SRMMU_SFSR, %l5
5993: lda [%l5] ASI_SRMMU, %l5 ! get sync fault status register
5994: jmp %l7 + 8 ! return to caller
5995: st %l5, [%l4] ! => dump.sfsr
5996:
5997: #if defined(MULTIPROCESSOR) && 0 /* notyet *
5998: /*
5999: * Read Synchronous Fault Status registers.
6000: * On entry: %o0 == &sfsr, %o1 == &sfar
6001: */
6002: _ENTRY(_C_LABEL(smp_get_syncflt))
6003: save %sp, -CCFSZ, %sp
6004:
6005: sethi %hi(CPUINFO_VA), %o4
6006: ld [%l4 + %lo(CPUINFO_VA+CPUINFO_GETSYNCFLT)], %o5
6007: clr %l1
6008: clr %l3
6009: jmpl %o5, %l7
6010: or %o4, %lo(CPUINFO_SYNCFLTDUMP), %l4
6011:
6012: ! load values out of the dump
6013: ld [%o4 + %lo(CPUINFO_VA+CPUINFO_SYNCFLTDUMP)], %o5
6014: st %o5, [%i0]
6015: ld [%o4 + %lo(CPUINFO_VA+CPUINFO_SYNCFLTDUMP+4)], %o5
6016: st %o5, [%i1]
6017: ret
6018: restore
6019: #endif /* MULTIPROCESSOR */
6020:
6021: /*
6022: * Read Asynchronous Fault Status registers.
6023: * On entry: %o0 == &afsr, %o1 == &afar
6024: * Return 0 if async register are present.
6025: */
6026: _ENTRY(_C_LABEL(srmmu_get_asyncflt))
6027: set SRMMU_AFAR, %o4
6028: lda [%o4] ASI_SRMMU, %o4 ! get async fault address
6029: set SRMMU_AFSR, %o3 !
6030: st %o4, [%o1]
6031: lda [%o3] ASI_SRMMU, %o3 ! get async fault status
6032: st %o3, [%o0]
6033: retl
6034: clr %o0 ! return value
6035:
6036: _ENTRY(_C_LABEL(cypress_get_asyncflt))
6037: _ENTRY(_C_LABEL(hypersparc_get_asyncflt))
6038: set SRMMU_AFSR, %o3 ! must read status before fault on HS
6039: lda [%o3] ASI_SRMMU, %o3 ! get async fault status
6040: st %o3, [%o0]
6041: btst AFSR_AFO, %o3 ! and only read fault address
6042: bz 1f ! if valid.
6043: set SRMMU_AFAR, %o4
6044: lda [%o4] ASI_SRMMU, %o4 ! get async fault address
6045: clr %o0 ! return value
6046: retl
6047: st %o4, [%o1]
6048: 1:
6049: retl
6050: clr %o0 ! return value
6051:
6052: _ENTRY(_C_LABEL(no_asyncflt_regs))
6053: retl
6054: mov 1, %o0 ! return value
6055:
6056: _ENTRY(_C_LABEL(hypersparc_pure_vcache_flush))
6057: /*
6058: * Flush entire on-chip instruction cache, which is
6059: * a pure vitually-indexed/virtually-tagged cache.
6060: */
6061: retl
6062: sta %g0, [%g0] ASI_HICACHECLR
6063:
6064: #endif /* SUN4M */
6065:
1.148.4.6 nathanw 6066: #if !defined(MSIIEP) /* normal suns */
1.148.4.2 pk 6067: /*
6068: * void lo_microtime(struct timeval *tv)
6069: *
6070: * LBL's sparc bsd 'microtime': We don't need to spl (so this routine
6071: * can be a leaf routine) and we don't keep a 'last' timeval (there
6072: * can't be two calls to this routine in a microsecond). This seems to
6073: * be about 20 times faster than the Sun code on an SS-2. - vj
6074: *
6075: * Read time values from slowest-changing to fastest-changing,
6076: * then re-read out to slowest. If the values read before
6077: * the innermost match those read after, the innermost value
6078: * is consistent with the outer values. If not, it may not
6079: * be and we must retry. Typically this loop runs only once;
6080: * occasionally it runs twice, and only rarely does it run longer.
6081: */
6082: #if defined(SUN4)
6083: ENTRY(lo_microtime)
6084: #else
6085: ENTRY(microtime)
6086: #endif
6087: sethi %hi(_C_LABEL(time)), %g2
6088:
6089: #if defined(SUN4M) && !(defined(SUN4C) || defined(SUN4))
6090: sethi %hi(TIMERREG_VA+4), %g3
6091: or %g3, %lo(TIMERREG_VA+4), %g3
6092: #elif (defined(SUN4C) || defined(SUN4)) && !defined(SUN4M)
6093: sethi %hi(TIMERREG_VA), %g3
6094: or %g3, %lo(TIMERREG_VA), %g3
6095: #else
6096: sethi %hi(TIMERREG_VA), %g3
6097: or %g3, %lo(TIMERREG_VA), %g3
6098: NOP_ON_4_4C_1:
6099: add %g3, 4, %g3
6100: #endif
6101:
6102: 2:
6103: ldd [%g2+%lo(_C_LABEL(time))], %o2 ! time.tv_sec & time.tv_usec
6104: ld [%g3], %o4 ! usec counter
6105: ldd [%g2+%lo(_C_LABEL(time))], %g4 ! see if time values changed
6106: cmp %g4, %o2
6107: bne 2b ! if time.tv_sec changed
6108: cmp %g5, %o3
6109: bne 2b ! if time.tv_usec changed
6110: tst %o4
6111:
6112: bpos 3f ! reached limit?
6113: srl %o4, TMR_SHIFT, %o4 ! convert counter to usec
6114: sethi %hi(_C_LABEL(tick)), %g4 ! bump usec by 1 tick
6115: ld [%g4+%lo(_C_LABEL(tick))], %o1
6116: set TMR_MASK, %g5
6117: add %o1, %o3, %o3
6118: and %o4, %g5, %o4
6119: 3:
6120: add %o4, %o3, %o3
6121: set 1000000, %g5 ! normalize usec value
6122: cmp %o3, %g5
6123: bl,a 4f
1.148.4.9 nathanw 6124: st %o2, [%o0]
1.148.4.2 pk 6125: add %o2, 1, %o2 ! overflow
6126: sub %o3, %g5, %o3
1.148.4.9 nathanw 6127: st %o2, [%o0]
1.148.4.2 pk 6128: 4:
6129: retl
6130: st %o3, [%o0+4]
6131:
1.148.4.6 nathanw 6132: #else /* MSIIEP */
6133: /* XXX: uwe: can be merged with 4c/4m version above */
6134: /*
6135: * ms-IIep version of
6136: * void microtime(struct timeval *tv)
6137: *
6138: * This is similar to 4c/4m microtime. The difference is that
6139: * counter uses 31 bits and ticks every 4 CPU cycles (cpu is @100MHz)
6140: * the magic to divide by 25 is stolen from gcc
6141: */
6142: ENTRY(microtime)
6143: sethi %hi(_C_LABEL(time)), %g2
6144:
6145: sethi %hi(MSIIEP_PCIC_VA), %g3
6146: or %g3, PCIC_SCCR_REG, %g3
6147:
6148: 2:
6149: ldd [%g2+%lo(_C_LABEL(time))], %o2 ! time.tv_sec & time.tv_usec
6150: ld [%g3], %o4 ! system (timer) counter
6151: ldd [%g2+%lo(_C_LABEL(time))], %g4 ! see if time values changed
6152: cmp %g4, %o2
6153: bne 2b ! if time.tv_sec changed
6154: cmp %g5, %o3
6155: bne 2b ! if time.tv_usec changed
6156: tst %o4
6157: !! %o2 - time.tv_sec; %o3 - time.tv_usec; %o4 - timer counter
6158:
6159: !!! BEGIN ms-IIep specific code
6160: bpos 3f ! if limit not reached yet
6161: clr %g4 ! then use timer as is
6162:
1.148.4.9 nathanw 6163: set 0x80000000, %g5
1.148.4.6 nathanw 6164: sethi %hi(_C_LABEL(tick)), %g4
1.148.4.9 nathanw 6165: bclr %g5, %o4 ! cleat limit reached flag
1.148.4.6 nathanw 6166: ld [%g4+%lo(_C_LABEL(tick))], %g4
6167:
6168: !! %g4 - either 0 or tick (if timer has hit the limit)
6169: 3:
6170: inc -1, %o4 ! timer is 1-based, adjust
1.148.4.9 nathanw 6171: !! divide by 25 magic stolen from a gcc output
6172: set 1374389535, %g5
1.148.4.6 nathanw 6173: umul %o4, %g5, %g0
6174: rd %y, %o4
6175: srl %o4, 3, %o4
6176: add %o4, %g4, %o4 ! may be bump usec by tick
6177: !!! END ms-IIep specific code
6178:
6179: add %o3, %o4, %o3 ! add timer to time.tv_usec
6180: set 1000000, %g5 ! normalize usec value
6181: cmp %o3, %g5
1.148.4.9 nathanw 6182: bl,a 4f
6183: st %o2, [%o0]
1.148.4.6 nathanw 6184: inc %o2 ! overflow into tv_sec
6185: sub %o3, %g5, %o3
1.148.4.9 nathanw 6186: st %o2, [%o0]
6187: 4: retl
6188: st %o3, [%o0 + 4]
1.148.4.6 nathanw 6189: #endif /* MSIIEP */
6190:
1.148.4.2 pk 6191: /*
6192: * delay function
6193: *
6194: * void delay(N) -- delay N microseconds
6195: *
6196: * Register usage: %o0 = "N" number of usecs to go (counts down to zero)
6197: * %o1 = "timerblurb" (stays constant)
6198: * %o2 = counter for 1 usec (counts down from %o1 to zero)
6199: *
6200: */
6201:
6202: ENTRY(delay) ! %o0 = n
6203: subcc %o0, %g0, %g0
6204: be 2f
6205:
6206: sethi %hi(_C_LABEL(timerblurb)), %o1
6207: ld [%o1 + %lo(_C_LABEL(timerblurb))], %o1 ! %o1 = timerblurb
6208:
6209: addcc %o1, %g0, %o2 ! %o2 = cntr (start @ %o1), clear CCs
6210: ! first time through only
6211:
6212: ! delay 1 usec
6213: 1: bne 1b ! come back here if not done
6214: subcc %o2, 1, %o2 ! %o2 = %o2 - 1 [delay slot]
6215:
6216: subcc %o0, 1, %o0 ! %o0 = %o0 - 1
6217: bne 1b ! done yet?
6218: addcc %o1, %g0, %o2 ! reinit %o2 and CCs [delay slot]
6219: ! harmless if not branching
6220: 2:
6221: retl ! return
6222: nop ! [delay slot]
6223:
6224: #if defined(KGDB) || defined(DDB) || defined(DIAGNOSTIC)
6225: /*
6226: * Write all windows (user or otherwise), except the current one.
6227: *
6228: * THIS COULD BE DONE IN USER CODE
6229: */
6230: ENTRY(write_all_windows)
6231: /*
6232: * g2 = g1 = nwindows - 1;
6233: * while (--g1 > 0) save();
6234: * while (--g2 > 0) restore();
6235: */
6236: sethi %hi(_C_LABEL(nwindows)), %g1
6237: ld [%g1 + %lo(_C_LABEL(nwindows))], %g1
6238: dec %g1
6239: mov %g1, %g2
6240:
6241: 1: deccc %g1
6242: bg,a 1b
6243: save %sp, -64, %sp
6244:
6245: 2: deccc %g2
6246: bg,a 2b
6247: restore
6248:
6249: retl
6250: nop
6251: #endif /* KGDB */
6252:
6253: ENTRY(setjmp)
6254: std %sp, [%o0+0] ! stack pointer & return pc
6255: st %fp, [%o0+8] ! frame pointer
6256: retl
6257: clr %o0
6258:
6259: Lpanic_ljmp:
6260: .asciz "longjmp botch"
6261: _ALIGN
6262:
6263: ENTRY(longjmp)
6264: addcc %o1, %g0, %g6 ! compute v ? v : 1 in a global register
6265: be,a 0f
6266: mov 1, %g6
6267: 0:
6268: mov %o0, %g1 ! save a in another global register
6269: ld [%g1+8], %g7 /* get caller's frame */
6270: 1:
6271: cmp %fp, %g7 ! compare against desired frame
6272: bl,a 1b ! if below,
6273: restore ! pop frame and loop
6274: be,a 2f ! if there,
6275: ldd [%g1+0], %o2 ! fetch return %sp and pc, and get out
6276:
6277: Llongjmpbotch:
6278: ! otherwise, went too far; bomb out
6279: save %sp, -CCFSZ, %sp /* preserve current window */
6280: sethi %hi(Lpanic_ljmp), %o0
6281: call _C_LABEL(panic)
6282: or %o0, %lo(Lpanic_ljmp), %o0;
6283: unimp 0
6284:
6285: 2:
6286: cmp %o2, %sp ! %sp must not decrease
6287: bge,a 3f
6288: mov %o2, %sp ! it is OK, put it in place
6289: b,a Llongjmpbotch
6290: 3:
6291: jmp %o3 + 8 ! success, return %g6
6292: mov %g6, %o0
6293:
6294: .data
1.148.4.8 nathanw 6295: .globl _C_LABEL(kernel_top)
6296: _C_LABEL(kernel_top):
1.148.4.2 pk 6297: .word 0
6298: .globl _C_LABEL(bootinfo)
6299: _C_LABEL(bootinfo):
6300: .word 0
6301:
6302: .globl _C_LABEL(proc0paddr)
6303: _C_LABEL(proc0paddr):
6304: .word _C_LABEL(u0) ! KVA of proc0 uarea
6305:
6306: /* interrupt counters XXX THESE BELONG ELSEWHERE (if anywhere) */
6307: .globl _C_LABEL(intrcnt), _C_LABEL(eintrcnt)
6308: .globl _C_LABEL(intrnames), _C_LABEL(eintrnames)
6309: _C_LABEL(intrnames):
6310: .asciz "spur"
6311: .asciz "lev1"
6312: .asciz "lev2"
6313: .asciz "lev3"
6314: .asciz "lev4"
6315: .asciz "lev5"
6316: .asciz "lev6"
6317: .asciz "lev7"
6318: .asciz "lev8"
6319: .asciz "lev9"
6320: .asciz "clock"
6321: .asciz "lev11"
6322: .asciz "lev12"
6323: .asciz "lev13"
6324: .asciz "prof"
6325: _C_LABEL(eintrnames):
6326: _ALIGN
6327: _C_LABEL(intrcnt):
6328: .skip 4*15
6329: _C_LABEL(eintrcnt):
6330:
6331: .comm _C_LABEL(nwindows), 4
6332: .comm _C_LABEL(romp), 4
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