Annotation of src/sys/arch/sh3/include/cpu.h, Revision 1.31.2.1
1.31.2.1! skrll 1: /* $NetBSD: cpu.h,v 1.34 2004/03/24 15:38:41 wiz Exp $ */
1.1 itojun 2:
3: /*-
1.24 uch 4: * Copyright (c) 2002 The NetBSD Foundation, Inc. All rights reserved.
1.1 itojun 5: * Copyright (c) 1990 The Regents of the University of California.
6: * All rights reserved.
7: *
8: * This code is derived from software contributed to Berkeley by
9: * William Jolitz.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
1.31.2.1! skrll 19: * 3. Neither the name of the University nor the names of its contributors
1.1 itojun 20: * may be used to endorse or promote products derived from this software
21: * without specific prior written permission.
22: *
23: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33: * SUCH DAMAGE.
34: *
35: * @(#)cpu.h 5.4 (Berkeley) 5/9/91
36: */
37:
38: /*
1.25 uch 39: * SH3/SH4 support.
1.1 itojun 40: *
41: * T.Horiuchi Brains Corp. 5/22/98
42: */
43:
44: #ifndef _SH3_CPU_H_
1.28 uch 45: #define _SH3_CPU_H_
1.1 itojun 46:
1.12 mrg 47: #if defined(_KERNEL_OPT)
1.8 thorpej 48: #include "opt_lockdebug.h"
49: #endif
50:
1.25 uch 51: #include <sys/sched.h>
52: #include <sh3/psl.h>
53: #include <sh3/frame.h>
1.8 thorpej 54:
1.26 uch 55: #ifdef _KERNEL
1.8 thorpej 56: struct cpu_info {
57: struct schedstate_percpu ci_schedstate; /* scheduler state */
58: #if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
59: u_long ci_spin_locks; /* # of spin locks held */
60: u_long ci_simple_locks; /* # of simple locks held */
61: #endif
62: };
63:
64: extern struct cpu_info cpu_info_store;
65: #define curcpu() (&cpu_info_store)
1.1 itojun 66:
67: /*
68: * definitions of cpu-dependent requirements
69: * referenced in generic code
70: */
1.2 tsubai 71: #define cpu_number() 0
1.28 uch 72: /*
73: * Can't swapout u-area, (__SWAP_BROKEN)
1.24 uch 74: * since we use P1 converted address for trapframe.
75: */
1.28 uch 76: #define cpu_swapin(p) /* nothing */
1.24 uch 77: #define cpu_swapout(p) panic("cpu_swapout: can't get here");
1.31 thorpej 78: #define cpu_proc_fork(p1, p2) /* nothing */
1.1 itojun 79:
80: /*
1.26 uch 81: * Arguments to hardclock and gatherstats encapsulate the previous
82: * machine state in an opaque clockframe.
1.1 itojun 83: */
1.26 uch 84: struct clockframe {
85: int spc; /* program counter at time of interrupt */
86: int ssr; /* status register at time of interrupt */
87: int ssp; /* stack pointer at time of interrupt */
88: };
1.1 itojun 89:
1.26 uch 90: #define CLKF_USERMODE(cf) (!KERNELMODE((cf)->ssr))
91: #define CLKF_BASEPRI(cf) (((cf)->ssr & 0xf0) == 0)
92: #define CLKF_PC(cf) ((cf)->spc)
1.29 thorpej 93: #define CLKF_INTR(cf) 0 /* XXX */
1.1 itojun 94:
95: /*
1.24 uch 96: * This is used during profiling to integrate system time. It can safely
97: * assume that the process is resident.
98: */
99: #define PROC_PC(p) \
100: (((struct trapframe *)(p)->p_md.md_regs)->tf_spc)
101:
102: /*
1.1 itojun 103: * Preempt the current process if in interrupt from user mode,
104: * or after the current trap/syscall if in system mode.
105: */
1.24 uch 106: #define need_resched(ci) \
107: do { \
108: want_resched = 1; \
109: if (curproc != NULL) \
1.31 thorpej 110: aston(curproc); \
1.24 uch 111: } while (/*CONSTCOND*/0)
1.1 itojun 112:
113: /*
114: * Give a profiling tick to the current process when the user profiling
1.24 uch 115: * buffer pages are invalid. On the MIPS, request an ast to send us
116: * through trap, marking the proc as needing a profiling tick.
1.1 itojun 117: */
1.24 uch 118: #define need_proftick(p) \
119: do { \
120: (p)->p_flag |= P_OWEUPC; \
121: aston(p); \
122: } while (/*CONSTCOND*/0)
1.1 itojun 123:
124: /*
125: * Notify the current process (p) that it has a signal pending,
126: * process as soon as possible.
127: */
1.24 uch 128: #define signotify(p) aston(p)
129:
1.28 uch 130: #define aston(p) ((p)->p_md.md_astpending = 1)
1.24 uch 131:
132: extern int want_resched; /* need_resched() was called */
1.1 itojun 133:
134: /*
135: * We need a machine-independent name for this.
136: */
137: #define DELAY(x) delay(x)
1.26 uch 138: #endif /* _KERNEL */
1.1 itojun 139:
140: /*
1.25 uch 141: * Logical address space of SH3/SH4 CPU.
1.1 itojun 142: */
1.28 uch 143: #define SH3_PHYS_MASK 0x1fffffff
1.25 uch 144:
1.28 uch 145: #define SH3_P0SEG_BASE 0x00000000 /* TLB mapped, also U0SEG */
146: #define SH3_P0SEG_END 0x7fffffff
147: #define SH3_P1SEG_BASE 0x80000000 /* pa == va */
148: #define SH3_P1SEG_END 0x9fffffff
149: #define SH3_P2SEG_BASE 0xa0000000 /* pa == va, non-cacheable */
150: #define SH3_P2SEG_END 0xbfffffff
151: #define SH3_P3SEG_BASE 0xc0000000 /* TLB mapped, kernel mode */
152: #define SH3_P3SEG_END 0xdfffffff
153: #define SH3_P4SEG_BASE 0xe0000000 /* peripheral space */
154: #define SH3_P4SEG_END 0xffffffff
155:
156: #define SH3_P1SEG_TO_PHYS(x) ((u_int32_t)(x) & SH3_PHYS_MASK)
157: #define SH3_P2SEG_TO_PHYS(x) ((u_int32_t)(x) & SH3_PHYS_MASK)
158: #define SH3_PHYS_TO_P1SEG(x) ((u_int32_t)(x) | SH3_P1SEG_BASE)
159: #define SH3_PHYS_TO_P2SEG(x) ((u_int32_t)(x) | SH3_P2SEG_BASE)
160: #define SH3_P1SEG_TO_P2SEG(x) ((u_int32_t)(x) | 0x20000000)
1.14 uch 161:
162: /* run on P2 */
1.28 uch 163: #define RUN_P2 \
1.14 uch 164: do { \
165: u_int32_t p; \
166: p = (u_int32_t)&&P2; \
167: goto *(u_int32_t *)(p | 0x20000000); \
1.26 uch 168: P2: (void)0; \
1.14 uch 169: } while (/*CONSTCOND*/0)
170:
171: /* run on P1 */
1.28 uch 172: #define RUN_P1 \
1.14 uch 173: do { \
174: u_int32_t p; \
175: p = (u_int32_t)&&P1; \
176: __asm__ __volatile__("nop;nop;nop;nop;nop;nop;nop;nop"); \
177: goto *(u_int32_t *)(p & ~0x20000000); \
1.26 uch 178: P1: (void)0; \
1.14 uch 179: } while (/*CONSTCOND*/0)
1.27 msaitoh 180:
181: #if defined(SH4)
182: /* SH4 Processor Version Register */
183: #define SH4_PVR_ADDR 0xff000030 /* P4 address */
184: #define SH4_PVR (*(volatile unsigned int *) SH4_PVR_ADDR)
1.30 msaitoh 185: #define SH4_PRR_ADDR 0xff000044 /* P4 address */
186: #define SH4_PRR (*(volatile unsigned int *) SH4_PRR_ADDR)
1.27 msaitoh 187:
188: #define SH4_PVR_MASK 0xffffff00
189: #define SH4_PVR_SH7750 0x04020500 /* SH7750 */
190: #define SH4_PVR_SH7750S 0x04020600 /* SH7750S */
1.30 msaitoh 191: #define SH4_PVR_SH775xR 0x04050000 /* SH775xR */
1.27 msaitoh 192: #define SH4_PVR_SH7751 0x04110000 /* SH7751 */
1.30 msaitoh 193:
194: #define SH4_PRR_MASK 0xfffffff0
195: #define SH4_PRR_7750R 0x00000100 /* SH7750R */
196: #define SH4_PRR_7751R 0x00000110 /* SH7751R */
1.27 msaitoh 197: #endif
1.1 itojun 198:
199: /*
200: * pull in #defines for kinds of processors
201: */
202: #include <machine/cputypes.h>
203:
1.22 uch 204: /*
205: * CTL_MACHDEP definitions.
206: */
207: #define CPU_CONSDEV 1 /* dev_t: console terminal device */
208: #define CPU_LOADANDRESET 2 /* load kernel image and reset */
209: #define CPU_MAXID 3 /* number of valid machdep ids */
210:
211: #define CTL_MACHDEP_NAMES { \
212: { 0, 0 }, \
213: { "console_device", CTLTYPE_STRUCT }, \
214: { "load_and_reset", CTLTYPE_INT }, \
215: }
1.1 itojun 216:
1.25 uch 217: #ifdef _KERNEL
218: void sh_cpu_init(int, int);
219: void sh_startup(void);
220: void cpu_reset(void); /* Soft reset */
221: void _cpu_spin(u_int32_t); /* for delay loop. */
222: void delay(int);
223: struct pcb;
224: void savectx(struct pcb *);
225: void dumpsys(void);
226: #endif /* _KERNEL */
1.1 itojun 227: #endif /* !_SH3_CPU_H_ */
1.25 uch 228:
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