CVS log for src/sys/arch/sh3/dev/shpcic.c

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Default branch: MAIN

Remove unnecessary <sys/malloc.h>.

Merge thorpej-cfargs2.

Adapt to CFARGS().

Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
  actually needed.
- Don't be explicit about what interface attribute is attaching if
  the device only has one.  (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
  situations, making is visibly easier to see when indirect config is
  in play, and allowing for future change in semantics.  (As of now,
  this is just a wrapper around config_match(), but that is an
  implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance.  This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

Give config_found() the same variadic arguments treatment as
config_search().  This commit only adds the CFARG_EOL sentinel
to the existing config_found() calls.  Conversion of config_found_sm_loc()
and config_found_ia() call sites will be in subsequent commits.

Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
  Provide a new resource provider API:

  ==> pciconf_resource_init() -- Initialize a PCI configuration resources
      container.
  ==> pciconf_resource_add() -- Add a PCI configuration resource to the
      container (I/O, MEM, or prefetchable MEM).  Multiple resources of
      each type may be added.
  ==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
      container once the bus has been configured.

  This is much easier to use than the previous method of providing an
  extent map for each kind of resource, and works better for e.g. ACPI
  platforms that provide potentially multiple PCI resources in tables
  provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
  rather than extent maps.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

update from HEAD

Sync with HEAD (as of 26th Dec)

PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
  if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
  Currently the following extended capabilities are decoded:
   - Advanced Error Reporting
   - Virtual Channel
   - Device Serial Number
   - Power Budgeting
   - Root Complex Link Declaration
   - Root Complex Event Collector Association
   - Access Control Services
   - Alternative Routing-ID Interpretation
   - Address Translation Services
   - Single Root IO Virtualization
   - Page Request
   - TPH Requester
   - Latency Tolerance Reporting
   - Secondary PCI Express
   - Process Address Space ID
   - LN Requester
   - L1 PM Substates
  The following extended capabilities are not decoded yet:
   - Root Complex Internal Link Control
   - Multi-Function Virtual Channel
   - RCRB Header
   - Vendor Unique
   - Configuration Access Correction
   - Multiple Root IO Virtualization
   - Multicast
   - Resizable BAR
   - Dynamic Power Allocation
   - Protocol Multiplexing
   - Downstream Port Containment
   - Precision Time Management
   - M-PCIe
   - Function Reading Status Queueing
   - Readiness Time Reporting
   - Designated Vendor-Specific

sync with head

merge to -current.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

fix my license notice.

#include <sys/bus.h> instead of <machine/bus.h>.

Sync with HEAD.

sync with head

PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name.  Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

sync to netbsd-5

Pull up following revision(s) (requested by mrg in ticket #1063):
	sys/arch/landisk/dev/obio.c: revision 1.7
	sys/arch/landisk/include/bus.h: revision 1.5
	sys/arch/landisk/landisk/shpcic_machdep.c: revision 1.2
	sys/arch/sh3/dev/shpcic.c: revision 1.13
	sys/arch/sh3/dev/shpcicvar.h: revision 1.7
fix build failure.

sync with head.

fix build failure.

Sync with HEAD.

Convert to use CFATTACH_DECL_NEW (no softc).

Sync with HEAD.

Sync with HEAD.

sync with head.

Sync with HEAD

sync with HEAD

Sync with HEAD.

Get rid of local product table, instead just match id register and
pci_devinfo().  While here, convert to device_t, aprint_*.

sync with head.

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

Added SH7751{,R} integrated PCI controller support.

catch up with -current on kqueue branch

mmeye specific devices are moved to mmeye/dev

file shpcic.c was added on branch nathanw_sa on 2002-03-24 18:08:44 +0000

mmeye specific devices are moved to mmeye/dev

Catch up with -current.

ANSIfy KNF.

Sync kqueue branch with -current.

To make dev/pcmcia work on platforms with 64-bit bus_addr_t and
32-bit bus_size_t (sparc), change the pcmcia_mem_map(9) offsetp
argument to bus_size_t as it is used as a bus_space offset.

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>

Fill paa_busname field in pcmciabus_attach_args.

Catch up with -current.

Merge in NetBSD/sh3 from cvs.kame.net repository.

Tree structure:
- sys/arch/sh3: sh3 generic code
	As commented, in-chip device drivers are put into sys/arch/sh3/dev.
- sys/arch/evbsh3: sh3 evaluation boards (pure sh3 CPU, no fancy external HW)
- sys/arch/mmeye: Brains mmEye, www.brains.co.jp
MI source code includes couple of #ifdef for sh3-coff support.
(sh3 uses coff or elf)

Needs some more improvements, especialy in sys/arch/sh3/conf/files.sh3,
to compile the tree (due to last minute tree structure change).