CVS log for src/sys/arch/sandpoint/sandpoint/mainbus.c

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Default branch: MAIN

Remove unnecessary <sys/malloc.h>.

Merge thorpej-cfargs2.

Adapt to CFARGS().

Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
  actually needed.
- Don't be explicit about what interface attribute is attaching if
  the device only has one.  (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
  situations, making is visibly easier to see when indirect config is
  in play, and allowing for future change in semantics.  (As of now,
  this is just a wrapper around config_match(), but that is an
  implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance.  This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

config_found_ia() -> config_found() w/ CFARG_IATTR.

Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
  Provide a new resource provider API:

  ==> pciconf_resource_init() -- Initialize a PCI configuration resources
      container.
  ==> pciconf_resource_add() -- Add a PCI configuration resource to the
      container (I/O, MEM, or prefetchable MEM).  Multiple resources of
      each type may be added.
  ==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
      container once the bus has been configured.

  This is much easier to use than the previous method of providing an
  extent map for each kind of resource, and works better for e.g. ACPI
  platforms that provide potentially multiple PCI resources in tables
  provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
  rather than extent maps.

replace EX_NOWAIT with EX_WAITOK in device attach methods.
remove checks for failures that can no longer occur.

update from HEAD

Pull up following revision(s) (requested by phx in ticket #976):
	sys/arch/sandpoint/sandpoint/mainbus.c: revision 1.30
	sys/arch/sandpoint/sandpoint/machdep.c: revision 1.64
	sys/arch/sandpoint/sandpoint/flash_cfi.c: revision 1.4
Fix nor-flash bus space: extent limit should not be zero and bus space is
definitely big-endian. Reading the flash via /dev/flash0 works now.
Writing is untested.

Sync with HEAD

Fix nor-flash bus space: extent limit should not be zero and bus space is
definitely big-endian. Reading the flash via /dev/flash0 works now.
Writing is untested.

sync with head

merge to -current.

Print MPC8245 cpu speed. We can calculate it using the PLL ratio.

converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

New device nhpow(4) to support the onboard GPIO pins on a NH230/231 board for
buttons, powerdown, reset, LEDs and fan control. It attaches gpio(4) for
its 8 pins on demand.

Replaced conf_args by mainbus_attach_args.

Added NOR flash driver, using nor(4) and flash(4).

#include <sys/bus.h> instead of <machine/bus.h>.

Catchup with rmind-uvmplock merge.

sync with head

Sync with HEAD.

struct device * -> device_t, struct cfdata * -> cfdata_t
CFATTACH_DECL(*, sizeof(struct device), -> CFATTACH_DECL_NEW(&, 0

sync with head

PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name.  Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.

sync with head.

Sync with HEAD.

ANSIfy another 1261 function definitions.
The only ones left in sys are beyond by sed script!
(or in sys/dist or sys/external)
Mostly they have function pointer parameters.

Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)

sync with HEAD

sync with head.

Sync with HEAD.

Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.

Sync with HEAD.

Sync with head.

sync with head.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

- revert the way to initialize extents.  The DINK32/U-Boot follows such
  the PCI convention of 0-origin PCI io space address enumeration.
- adjust the lowest PCI io address assignment for PCI_NETBSD_CONFIGURE
  case.

- pci_machdep.c tries to fixup PCI stuff by identifying the target with
  some heuristics.
- have eumb device nodes for bus.h and mainbus.c and machdep.c.

allow ENCPP1 to have no PCI_NETBSD_CONFIGURE to adapt a smart booloader
performs PCI device configuration before exec'ing kernels.

NetBSD/sandpoint steps forward to ppcoea-renovation.
- make sure locore.S to clear BSS before use.  remove defunct intrnames.
- make machdep.c and mainbus.c similiar to prep.
- adapt powerpc/pic scheme.

merge ktrace-lwp.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

Phase out the use of a string as first "attach args" member to control
which bustype should be attached with a specific call to config_found()
(from a "mainbus" or a bus bridge).
Do it for isa/eisa/mca and pci/agp for now. These buses all attach to
an mi interface attribute "isabus", "eisabus" etc., and the autoconf
framework now allows to specify an interface attribute on config_found()
and config_search(), which limits the search of matching config data
to these which attach to that specific attribute.
So we basically have to call config_found_ia(..., "foobus", ...) where
such a bus is attached.
As a consequence, where a "mainbus" or alike also attaches other
devices (eg CPUs) which do not attach to a specific attribute yet,
we need at least pass an attribute name (different from "foobus") so
that the foo bus is not found at these places. This made some minor
changes necessary which are not obviously related to the mentioned buses.

Sync with HEAD

remove some typecasts to "cfmatch_t" which are obviously relicts from
__BROKEN_INDIRECT_CONFIG times

__KERNEL_RCSID()

Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.

Perform a rototill of the powerpc code.  Mandate use of SPRG0 to store
a pointer to current cpu's cpu_info structure.  Use cpu_info for
intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on
non-MULTIPROCESSOR machines.  Add common macros GET_CPUINFO and
INIT_CPUINFO to get and initialize the cpu_info struct on startup.  Make
ibm4xx use the standard <powerpc/frame.h>.  Use IFRAME_xx in ibm4xx
trap_subr.S instead of explicit magic offsets.  Move INTSTK and SPILLSTK
to std.<platform>.  Change faultbuf to a struct instead of an array.

On MPC6XX cpus, stop using the vector page for temporary space and use
reserved space in cpu_info.

Sync with HEAD.

Use aprint_normal() for cfprint routines.

Catch up to -current.

sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work

Add trailing ; to CFATTACH_DECL.

Use CFATTACH_DECL().

Declare all cfattach structures const.

catch up with -current on kqueue branch

Catch up to -current.

* Add "pcitag_t *pba_bridgetag" to pci_attach_args.  This is set to
  NULL for root PCI busses.  For busses behind a bridge, it points to
  a persistent copy of the bridge's pcitag_t.  This can be very useful
  for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
  uses OFW device nodes to enumerate the bus.  When a PCI bus that is
  behind a bridge is attached, pci_attach_hook() allocates a new PCI
  chipset tag for the new bus and sets it's "curnode" to the OFW node
  of the bridge.  This is used as a starting point when enumerating
  that bus.  Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.

file mainbus.c was added on branch gehenna-devsw on 2002-05-16 01:01:40 +0000

* Add "pcitag_t *pba_bridgetag" to pci_attach_args.  This is set to
  NULL for root PCI busses.  For busses behind a bridge, it points to
  a persistent copy of the bridge's pcitag_t.  This can be very useful
  for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
  uses OFW device nodes to enumerate the bus.  When a PCI bus that is
  behind a bridge is attached, pci_attach_hook() allocates a new PCI
  chipset tag for the new bus and sets it's "curnode" to the OFW node
  of the bridge.  This is used as a starting point when enumerating
  that bus.  Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.

Sync kqueue branch with -current.

Catch up to -current.

Add a "cacheline_size" argument to pci_configure_bus().  It is used
to set the cacheline size in the BHLC register.  This should be the
size of the largest D-cache line on a system.

Sync the thorpej-mips-cache branch with -current.

Add a "firstbus" argument to pci_configure_bus(), indicating the
first bus number to use, rather than always assuming that we should
start at bus #0.

Update the kqueue branch to HEAD.

file mainbus.c was added on branch nathanw_sa on 2002-01-08 00:27:24 +0000

Make all powerpc ports use a common Makefile.powerpc (except walnut)
Enforce -Wmissing-prototypes -Wstrict-prototypes for all ppc ports.
Split out macppc cpu support and make common to mpc6xx ports.  Make
other mpc6xx ports use it.  Add evcnts for mpc6xx traps.

Catch up to -current.

Adapt to new PowerPC pmap.
Use more common PowerPC code including bus_dma and unified bus_space.

Catch up with -current.

Sync with HEAD.

Set the PCI mem tag to 0.  The BAR already contains the value that was here.

Sync with HEAD.

file mainbus.c was added on branch thorpej_scsipi on 2001-02-11 19:12:09 +0000

Make it a #error to define PCI without PCI_NETBSD_CONFIGURE.

Support for the Motorola Sandpoint reference platform using the
MPC8240 processor module.  See the README for more information.