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Current tag: MAIN
Revision 1.37 / (download) - annotate - [select for diffs], Tue Mar 5 14:15:34 2024 UTC (6 weeks, 2 days ago) by thorpej
Branch: MAIN
CVS Tags: HEAD
Changes since 1.36: +2 -4
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Diff to previous 1.36 (colored)
Move the at-shutdown call to resettodr() from cpu_reboot() to kern_reboot(). It's a small step, but it's a step.
Revision 1.36 / (download) - annotate - [select for diffs], Thu Jan 18 07:41:50 2024 UTC (3 months ago) by skrll
Branch: MAIN
Changes since 1.35: +2 -14
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Diff to previous 1.35 (colored)
Provide a working delay(9)
Revision 1.35 / (download) - annotate - [select for diffs], Fri Dec 22 08:41:59 2023 UTC (3 months, 3 weeks ago) by skrll
Branch: MAIN
Changes since 1.34: +4 -4
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Diff to previous 1.34 (colored)
Minor stylistic changes. NFCI.
Revision 1.34 / (download) - annotate - [select for diffs], Sun Sep 3 08:48:20 2023 UTC (7 months, 2 weeks ago) by skrll
Branch: MAIN
CVS Tags: thorpej-ifq-base,
thorpej-ifq,
thorpej-altq-separation-base,
thorpej-altq-separation
Changes since 1.33: +4 -4
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Diff to previous 1.33 (colored)
Fix and enable MULTIPROCESSOR
Revision 1.33 / (download) - annotate - [select for diffs], Thu Aug 24 05:46:55 2023 UTC (7 months, 3 weeks ago) by rin
Branch: MAIN
Changes since 1.32: +7 -3
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Diff to previous 1.32 (colored)
riscv: cpu_setmcontext: Do not unconditionally update tp register Conserve tp register for _UC_CPU and update later if _UC_TLSBASE is specified. This is what powerpc does, which also uses a general purpose register for TLS pointer. Found by tests/lib/libpthread/t_swapcontext:swapcontext1, which successfully passes now.
Revision 1.32 / (download) - annotate - [select for diffs], Fri Aug 4 09:06:33 2023 UTC (8 months, 2 weeks ago) by mrg
Branch: MAIN
Changes since 1.31: +3 -3
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Diff to previous 1.31 (colored)
avoid comparing arrays directly, compare the address of their first element. found by GCC 12.
Revision 1.31 / (download) - annotate - [select for diffs], Mon Jul 10 07:04:20 2023 UTC (9 months, 1 week ago) by rin
Branch: MAIN
Changes since 1.30: +13 -2
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Diff to previous 1.30 (colored)
riscv: Add FDT-based initrd, rndseed, and efirng support. Can be used from our in-tree bootrisv64.efi.
Revision 1.30 / (download) - annotate - [select for diffs], Mon Jul 10 07:01:48 2023 UTC (9 months, 1 week ago) by rin
Branch: MAIN
Changes since 1.29: +4 -11
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Diff to previous 1.29 (colored)
fdt(4): Factor out bootargs support from evbarm and riscv.
Revision 1.29 / (download) - annotate - [select for diffs], Mon Jun 12 19:04:14 2023 UTC (10 months, 1 week ago) by skrll
Branch: MAIN
Changes since 1.28: +36 -7
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Diff to previous 1.28 (colored)
risc-v: MULTIPROCESSOR support Add MULTIPROCESSOR support for RISC-V, but leave disabled for the moment as it's not 100% stable. Some other improvements to spl and cpu identification / reporting.
Revision 1.28 / (download) - annotate - [select for diffs], Sun May 28 12:56:56 2023 UTC (10 months, 3 weeks ago) by skrll
Branch: MAIN
Changes since 1.27: +3 -3
lines
Diff to previous 1.27 (colored)
Second arg to fdt_memory_remove_range is a size so pass dtbsize and not dtb + dtbsize
Revision 1.27 / (download) - annotate - [select for diffs], Sun May 14 09:14:30 2023 UTC (11 months ago) by skrll
Branch: MAIN
Changes since 1.26: +18 -3
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Diff to previous 1.26 (colored)
Check for RB_HALT in cpu_reboot.
Revision 1.26 / (download) - annotate - [select for diffs], Sun May 7 12:41:49 2023 UTC (11 months, 1 week ago) by skrll
Branch: MAIN
Changes since 1.25: +452 -56
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Diff to previous 1.25 (colored)
RISC-V support that works on QEMU with a single hart. Thanks for Simon Burge for plic(4).
Revision 1.25 / (download) - annotate - [select for diffs], Thu Nov 17 13:11:08 2022 UTC (17 months ago) by simonb
Branch: MAIN
CVS Tags: netbsd-10-base,
netbsd-10-0-RELEASE,
netbsd-10-0-RC6,
netbsd-10-0-RC5,
netbsd-10-0-RC4,
netbsd-10-0-RC3,
netbsd-10-0-RC2,
netbsd-10-0-RC1,
netbsd-10
Changes since 1.24: +3 -3
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Diff to previous 1.24 (colored)
Use updated defines for the user-mode sstatus value.
Revision 1.24 / (download) - annotate - [select for diffs], Tue Nov 15 14:33:33 2022 UTC (17 months ago) by simonb
Branch: MAIN
Changes since 1.23: +4 -4
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Diff to previous 1.23 (colored)
Use similar macro-magic to aarch64 armreg.h to add per-csr read/write/set-bits/clear-bits inline functions. Keep the open-coded 32-bit version of riscvreg_cycle_read() than reads a 64-bit cycle counter values. Added benefit of fixing these so that the inline asm uses __volatile and aren't opmtimised to nops by the compiler.
Revision 1.23 / (download) - annotate - [select for diffs], Tue Oct 18 04:24:54 2022 UTC (18 months ago) by skrll
Branch: MAIN
Changes since 1.22: +2 -4
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Diff to previous 1.22 (colored)
remove a stray comment
Revision 1.22 / (download) - annotate - [select for diffs], Sun Oct 16 06:19:16 2022 UTC (18 months ago) by skrll
Branch: MAIN
Changes since 1.21: +6 -6
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Diff to previous 1.21 (colored)
Re-orgnaise a litte. From Simon.
Revision 1.21 / (download) - annotate - [select for diffs], Sun Oct 16 06:14:53 2022 UTC (18 months ago) by skrll
Branch: MAIN
Changes since 1.20: +5 -4
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Diff to previous 1.20 (colored)
Map the DTB using VM_KERNEL_DTB_BASE and CONSADDR using VM_KERNEL_IO_BASE
Revision 1.20 / (download) - annotate - [select for diffs], Sat Oct 15 06:41:43 2022 UTC (18 months ago) by simonb
Branch: MAIN
Changes since 1.19: +6 -6
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Diff to previous 1.19 (colored)
#define<tab>
Revision 1.19 / (download) - annotate - [select for diffs], Wed Sep 28 06:05:28 2022 UTC (18 months, 3 weeks ago) by skrll
Branch: MAIN
CVS Tags: bouyer-sunxi-drm-base,
bouyer-sunxi-drm
Changes since 1.18: +3 -3
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Diff to previous 1.18 (colored)
Use legacy SBI Console GetChar for earlycons. It works on qemu.
Revision 1.18 / (download) - annotate - [select for diffs], Tue Sep 20 07:18:24 2022 UTC (18 months, 4 weeks ago) by skrll
Branch: MAIN
Changes since 1.17: +237 -9
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Diff to previous 1.17 (colored)
Checkpoint WIP.
QEMU RV64 virt can boot into virtual mode
OpenSBI v1.0
____ _____ ____ _____
/ __ \ / ____| _ \_ _|
| | | |_ __ ___ _ __ | (___ | |_) || |
| | | | '_ \ / _ \ '_ \ \___ \| _ < | |
| |__| | |_) | __/ | | |____) | |_) || |_
\____/| .__/ \___|_| |_|_____/|____/_____|
| |
|_|
Platform Name : riscv-virtio,qemu
Platform Features : medeleg
Platform HART Count : 1
Platform IPI Device : aclint-mswi
Platform Timer Device : aclint-mtimer @ 10000000Hz
Platform Console Device : uart8250
Platform HSM Device : ---
Platform Reboot Device : sifive_test
Platform Shutdown Device : sifive_test
Firmware Base : 0x80000000
Firmware Size : 252 KB
Runtime SBI Version : 0.3
Domain0 Name : root
Domain0 Boot HART : 0
Domain0 HARTs : 0*
Domain0 Region00 : 0x0000000002000000-0x000000000200ffff (I)
Domain0 Region01 : 0x0000000080000000-0x000000008003ffff ()
Domain0 Region02 : 0x0000000000000000-0xffffffffffffffff (R,W,X)
Domain0 Next Address : 0x0000000080200000
Domain0 Next Arg1 : 0x00000000bfe00000
Domain0 Next Mode : S-mode
Domain0 SysReset : yes
Boot HART ID : 0
Boot HART Domain : root
Boot HART ISA : rv64imafdcsuh
Boot HART Features : scounteren,mcounteren,mcountinhibit,time
Boot HART PMP Count : 16
Boot HART PMP Granularity : 4
Boot HART PMP Address Bits: 54
Boot HART MHPM Count : 16
Boot HART MIDELEG : 0x0000000000001666
Boot HART MEDELEG : 0x0000000000f0b509
------------
NetBSD start
sp: 0x0000_0000_80a0_2000
pc: 0x0000_0000_8020_0090
hart: 0x0000_0000_0000_0000
dtb: 0x0000_0000_bfe0_0000
l1: 0x0000_0000_80a0_2000
l2: 0x0000_0000_80a0_3000
uspace: 0x0000_0000_80a0_0000
bootstk: 0x0000_0000_80a0_2000
vtopdiff:0xffff_ffbf_7fe0_0000
bss: 0x0000_0000_808a_8bdc - 0x0000_0000_80a0_4000
0x0000_0000_80a0_3800: 0x0000_0000_2028_0821
kern 0x0000_0000_80a0_2000: 0x0000_0000_2008_002f
kern 0x0000_0000_80a0_2008: 0x0000_0000_2010_002f
kern 0x0000_0000_80a0_2010: 0x0000_0000_2018_002f
kern 0x0000_0000_80a0_2018: 0x0000_0000_2020_002f
kern 0x0000_0000_80a0_2020: 0x0000_0000_2028_002f
kern 0x0000_0000_80a0_2028: 0x0000_0000_2030_002f
kern 0x0000_0000_80a0_2030: 0x0000_0000_2038_002f
kern 0x0000_0000_80a0_2038: 0x0000_0000_2040_002f
kern 0x0000_0000_80a0_2040: 0x0000_0000_2048_002f
kern 0x0000_0000_80a0_2048: 0x0000_0000_2050_002f
kern 0x0000_0000_80a0_2050: 0x0000_0000_2058_002f
kern 0x0000_0000_80a0_2058: 0x0000_0000_2060_002f
kern 0x0000_0000_80a0_2060: 0x0000_0000_2068_002f
kern 0x0000_0000_80a0_2068: 0x0000_0000_2070_002f
kern 0x0000_0000_80a0_2070: 0x0000_0000_2078_002f
kern 0x0000_0000_80a0_2078: 0x0000_0000_2080_002f
dtb 0x0000_0000_80a0_2080: 0x0000_0000_2ff8_0027
PM
[ 1.0000000] FDT<0xffffffc002000000>
[ 1.0000000] consinit ok
[ 1.0000000] NetBSD/riscv (fdt) booting ...
[ 1.0000000] FDT /memory @ 0x80000000 size 0x40000000
[ 1.0000000] init_riscv: memory start 80000000 end c0000000 (len 40000000)
[ 1.0000000] bootargs: root=ld4a -v -x
[ 1.0000000] bootflag 'r' not recognised
[ 1.0000000] bootflag 'o' not recognised
[ 1.0000000] bootflag 'o' not recognised
[ 1.0000000] bootflag 't' not recognised
[ 1.0000000] bootflag '=' not recognised
[ 1.0000000] bootflag 'l' not recognised
[ 1.0000000] bootflag ' ' not recognised
[ 1.0000000] bootflag ' ' not recognised
[ 1.0000000] ------------------------------------------
[ 1.0000000] kern_vtopdiff = 0xffffffbf7fe00000
[ 1.0000000] memory_start = 0x 80000000
[ 1.0000000] memory_end = 0x c0000000
[ 1.0000000] memory_size = 0x 40000000
[ 1.0000000] kernstart_phys = 0x 80200000
[ 1.0000000] kernend_phys = 0x 80a00000
[ 1.0000000] VM_MIN_KERNEL_ADDRESS = 0xffffffc000000000
[ 1.0000000] kernstart_mega = 0xffffffc000000000
[ 1.0000000] kernstart = 0xffffffc000000000
[ 1.0000000] kernend = 0xffffffc000800000
[ 1.0000000] kernend_mega = 0xffffffc000800000
[ 1.0000000] VM_MAX_KERNEL_ADDRESS = 0xffffffd000000000
[ 1.0000000] ------------------------------------------
[ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564
Revision 1.17 / (download) - annotate - [select for diffs], Tue Sep 20 06:53:36 2022 UTC (18 months, 4 weeks ago) by skrll
Branch: MAIN
Changes since 1.16: +4 -4
lines
Diff to previous 1.16 (colored)
Whitespace
Revision 1.16 / (download) - annotate - [select for diffs], Tue Sep 20 06:48:29 2022 UTC (18 months, 4 weeks ago) by skrll
Branch: MAIN
Changes since 1.15: +5 -5
lines
Diff to previous 1.15 (colored)
KNF
Revision 1.15 / (download) - annotate - [select for diffs], Thu Oct 7 07:13:35 2021 UTC (2 years, 6 months ago) by skrll
Branch: MAIN
Changes since 1.14: +4 -2
lines
Diff to previous 1.14 (colored)
Hacky build fixes
Revision 1.14 / (download) - annotate - [select for diffs], Sat May 1 06:53:08 2021 UTC (2 years, 11 months ago) by skrll
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base,
thorpej-i2c-spi-conf2,
thorpej-i2c-spi-conf-base,
thorpej-futex2-base,
thorpej-futex2,
thorpej-cfargs2-base,
thorpej-cfargs2,
cjep_sun2x-base1,
cjep_sun2x-base,
cjep_sun2x,
cjep_staticlib_x-base1,
cjep_staticlib_x-base,
cjep_staticlib_x
Changes since 1.13: +4 -2
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Diff to previous 1.13 (colored)
Sprinkle #ifdef FPE for now
Revision 1.13 / (download) - annotate - [select for diffs], Wed Nov 4 20:05:47 2020 UTC (3 years, 5 months ago) by skrll
Branch: MAIN
CVS Tags: thorpej-futex-base,
thorpej-cfargs-base,
thorpej-cfargs
Branch point for: thorpej-i2c-spi-conf
Changes since 1.12: +4 -2
lines
Diff to previous 1.12 (colored)
Miscellaneous updates to reflect riscv-privileged-20190608.pdf Some from zmcgrew@
Revision 1.12 / (download) - annotate - [select for diffs], Wed Nov 4 07:09:46 2020 UTC (3 years, 5 months ago) by skrll
Branch: MAIN
Changes since 1.11: +3 -1
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Diff to previous 1.11 (colored)
RCSID and whitespace police...
Revision 1.11 / (download) - annotate - [select for diffs], Thu Jun 11 19:20:45 2020 UTC (3 years, 10 months ago) by ad
Branch: MAIN
Branch point for: thorpej-futex
Changes since 1.10: +2 -2
lines
Diff to previous 1.10 (colored)
uvm_availmem(): give it a boolean argument to specify whether a recent cached value will do, or if the very latest total must be fetched. It can be called thousands of times a second and fetching the totals impacts not only the calling LWP but other CPUs doing unrelated activity in the VM system.
Revision 1.10 / (download) - annotate - [select for diffs], Sat Mar 14 16:12:16 2020 UTC (4 years, 1 month ago) by skrll
Branch: MAIN
CVS Tags: phil-wifi-20200421,
phil-wifi-20200411,
phil-wifi-20200406,
bouyer-xenpvh-base2,
bouyer-xenpvh-base1,
bouyer-xenpvh-base,
bouyer-xenpvh
Changes since 1.9: +3 -3
lines
Diff to previous 1.9 (colored)
Trailing whitespace
Revision 1.9 / (download) - annotate - [select for diffs], Wed Mar 11 13:30:31 2020 UTC (4 years, 1 month ago) by thorpej
Branch: MAIN
Changes since 1.8: +4 -1
lines
Diff to previous 1.8 (colored)
With DEBUG defined, it's possible to execute a TLB-vs-segmap consistency
check from a (soft) interrupt handler. But if a platform does not otherwise
require the pmap_tlb_miss_lock, then where will be a brief window of
inconsistency that, while harmless, will still fire an assertion in the
consistency check.
Fix this with the following changes:
1- Refactor the pmap_tlb_miss_lock into MI code and rename it from
pmap_tlb_miss_lock_{enter,exit}() to pmap_tlb_miss_lock_{enter,exit}().
MD code can still define the "md" hooks as necessary, and if so, will
override the common implementation.
2- Provde a pmap_bootstrap_common() function to perform common pmap bootstrap
operations, namely initializing the pmap_tlb_miss_lock if it's needed.
If MD code overrides the implementation, it's responsible for initializing
its own lock.
3- Call pmap_bootstrap_common() from the mips, powerpc booke, and riscv
pmap_bootstrap() routines. (This required adding one for riscv.)
4- Switch powerpc booke to the common pmap_tlb_miss_lock.
5- Enable pmap_tlb_miss_lock if DEBUG is defined, even if it's not otherwise
required.
PR port-mips/55062 (Failed assertion in pmap_md_tlb_check_entry())
Revision 1.8 / (download) - annotate - [select for diffs], Tue Dec 31 13:07:12 2019 UTC (4 years, 3 months ago) by ad
Branch: MAIN
CVS Tags: is-mlppp-base,
is-mlppp,
ad-namecache-base3,
ad-namecache-base2,
ad-namecache-base1,
ad-namecache-base,
ad-namecache
Changes since 1.7: +2 -2
lines
Diff to previous 1.7 (colored)
Rename uvm_free() -> uvm_availmem().
Revision 1.7 / (download) - annotate - [select for diffs], Sat Dec 21 13:00:23 2019 UTC (4 years, 3 months ago) by ad
Branch: MAIN
Changes since 1.6: +2 -2
lines
Diff to previous 1.6 (colored)
uvmexp.free -> uvm_free()
Revision 1.6 / (download) - annotate - [select for diffs], Sat Nov 23 19:40:36 2019 UTC (4 years, 4 months ago) by ad
Branch: MAIN
Changes since 1.5: +18 -48
lines
Diff to previous 1.5 (colored)
cpu_need_resched(): - Remove all code that should be MI, leaving the bare minimum under arch/. - Make the required actions very explicit. - Pass in LWP pointer for convenience. - When a trap is required on another CPU, have the IPI set it locally. - Expunge cpu_did_resched().
Revision 1.5 / (download) - annotate - [select for diffs], Thu Nov 21 19:57:24 2019 UTC (4 years, 4 months ago) by ad
Branch: MAIN
Changes since 1.4: +1 -9
lines
Diff to previous 1.4 (colored)
mi_userret(): take care of calling preempt(), set spc_curpriority directly, and remove MD code that does the same.
Revision 1.4 / (download) - annotate - [select for diffs], Sat Apr 6 11:54:20 2019 UTC (5 years ago) by kamil
Branch: MAIN
CVS Tags: phil-wifi-20191119,
phil-wifi-20190609,
netbsd-9-base,
netbsd-9-3-RELEASE,
netbsd-9-2-RELEASE,
netbsd-9-1-RELEASE,
netbsd-9-0-RELEASE,
netbsd-9-0-RC2,
netbsd-9-0-RC1,
netbsd-9,
isaki-audio2-base,
isaki-audio2
Changes since 1.3: +2 -16
lines
Diff to previous 1.3 (colored)
Centralized shared part of child_return() into MI part Add a new function md_child_return() for MD specific bits only. New child_return() is now part of MI and central code that handles uniformly tracing code (KTR and ptrace(2)). Synchronize value passed to ktrsysret() among ports to SYS_fork. This is a traditional value and accessing p_lflag to check for PL_PPWAIT shall use locking against proc_lock. Returning SYS_fork vs SYS_vfork still isn't correct enough as there are more entry points to forking code. Instead of making it too good, just settle with plain SYS_fork for all ports.
Revision 1.3 / (download) - annotate - [select for diffs], Wed Apr 3 08:08:00 2019 UTC (5 years ago) by kamil
Branch: MAIN
Changes since 1.2: +13 -1
lines
Diff to previous 1.2 (colored)
Rework the fork(2)/vfork(2) event signalling under ptrace(2) Remove the constraint of SIGTRAP event being maskable by a tracee. Now all SIGTRAP TRAP_CHLD events are delivered to debugger. This code touches MD specific logic and the child_return routine. It's an intermediate step with a room for refactoring in future and right now the least invasive approach. This allows to assert expected behavior in already existing ATF tests and make the code prettier in future keeping the same semantics. Probably there is a need for a MI wrapper of child_return for shared functionality between ports.
Revision 1.2 / (download) - annotate - [select for diffs], Thu Mar 16 16:13:21 2017 UTC (7 years, 1 month ago) by chs
Branch: MAIN
CVS Tags: tls-maxphys-base-20171202,
prg-localcount2-base3,
prg-localcount2-base2,
prg-localcount2-base1,
prg-localcount2-base,
prg-localcount2,
phil-wifi-base,
pgoyette-localcount-20170426,
pgoyette-localcount-20170320,
pgoyette-compat-merge-20190127,
pgoyette-compat-base,
pgoyette-compat-20190127,
pgoyette-compat-20190118,
pgoyette-compat-1226,
pgoyette-compat-1126,
pgoyette-compat-1020,
pgoyette-compat-0930,
pgoyette-compat-0906,
pgoyette-compat-0728,
pgoyette-compat-0625,
pgoyette-compat-0521,
pgoyette-compat-0502,
pgoyette-compat-0422,
pgoyette-compat-0415,
pgoyette-compat-0407,
pgoyette-compat-0330,
pgoyette-compat-0322,
pgoyette-compat-0315,
pgoyette-compat,
perseant-stdc-iso10646-base,
perseant-stdc-iso10646,
nick-nhusb-base-20170825,
netbsd-8-base,
netbsd-8-2-RELEASE,
netbsd-8-1-RELEASE,
netbsd-8-1-RC1,
netbsd-8-0-RELEASE,
netbsd-8-0-RC2,
netbsd-8-0-RC1,
netbsd-8,
matt-nb8-mediatek-base,
matt-nb8-mediatek,
jdolecek-ncq-base,
jdolecek-ncq,
bouyer-socketcan-base1
Branch point for: tls-maxphys,
phil-wifi
Changes since 1.1: +4 -4
lines
Diff to previous 1.1 (colored)
allow pcu_save() and pcu_discard() to be called on other threads, ptrace needs to use it that way.
Revision 1.1 / (download) - annotate - [select for diffs], Sat Mar 28 16:13:56 2015 UTC (9 years ago) by matt
Branch: MAIN
CVS Tags: pgoyette-localcount-base,
pgoyette-localcount-20170107,
pgoyette-localcount-20161104,
pgoyette-localcount-20160806,
pgoyette-localcount-20160726,
nick-nhusb-base-20170204,
nick-nhusb-base-20161204,
nick-nhusb-base-20161004,
nick-nhusb-base-20160907,
nick-nhusb-base-20160529,
nick-nhusb-base-20160422,
nick-nhusb-base-20160319,
nick-nhusb-base-20151226,
nick-nhusb-base-20150921,
nick-nhusb-base-20150606,
nick-nhusb-base-20150406,
localcount-20160914,
bouyer-socketcan-base
Branch point for: pgoyette-localcount,
nick-nhusb,
bouyer-socketcan
Beginnings of RISCV kernel support. Note that the pmap support is not yet committed and probably won't be for awhile. This is mostly preliminary waiting for the supervisor specification to come out. Lots of missing pieces but it mostly builds.