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CVS log for src/sys/arch/riscv/riscv/pmap_machdep.c

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Default branch: MAIN


Revision 1.15 / (download) - annotate - [select for diffs], Fri Dec 23 10:44:25 2022 UTC (2 months, 3 weeks ago) by skrll
Branch: MAIN
CVS Tags: HEAD
Changes since 1.14: +8 -2 lines
Diff to previous 1.14 (colored)

Fix RV builds

Revision 1.14 / (download) - annotate - [select for diffs], Tue Nov 15 14:33:33 2022 UTC (4 months ago) by simonb
Branch: MAIN
CVS Tags: netbsd-10-base, netbsd-10
Changes since 1.13: +6 -6 lines
Diff to previous 1.13 (colored)

Use similar macro-magic to aarch64 armreg.h to add per-csr
read/write/set-bits/clear-bits inline functions.  Keep the
open-coded 32-bit version of riscvreg_cycle_read() than reads
a 64-bit cycle counter values.

Added benefit of fixing these so that the inline asm uses __volatile
and aren't opmtimised to nops by the compiler.

Revision 1.13 / (download) - annotate - [select for diffs], Sun Oct 16 08:43:44 2022 UTC (5 months ago) by skrll
Branch: MAIN
Changes since 1.12: +14 -7 lines
Diff to previous 1.12 (colored)

tlb_update_addr gets called with the KERNEL_PID (ASID) so handle this
case.

Revision 1.12 / (download) - annotate - [select for diffs], Sat Oct 15 06:41:43 2022 UTC (5 months ago) by simonb
Branch: MAIN
Changes since 1.11: +5 -5 lines
Diff to previous 1.11 (colored)

#define<tab>

Revision 1.11 / (download) - annotate - [select for diffs], Tue Sep 20 07:18:23 2022 UTC (5 months, 4 weeks ago) by skrll
Branch: MAIN
CVS Tags: bouyer-sunxi-drm-base, bouyer-sunxi-drm
Changes since 1.10: +145 -24 lines
Diff to previous 1.10 (colored)

Checkpoint WIP.

QEMU RV64 virt can boot into virtual mode

OpenSBI v1.0
   ____                    _____ ____ _____
  / __ \                  / ____|  _ \_   _|
 | |  | |_ __   ___ _ __ | (___ | |_) || |
 | |  | | '_ \ / _ \ '_ \ \___ \|  _ < | |
 | |__| | |_) |  __/ | | |____) | |_) || |_
  \____/| .__/ \___|_| |_|_____/|____/_____|
        | |
        |_|

Platform Name             : riscv-virtio,qemu
Platform Features         : medeleg
Platform HART Count       : 1
Platform IPI Device       : aclint-mswi
Platform Timer Device     : aclint-mtimer @ 10000000Hz
Platform Console Device   : uart8250
Platform HSM Device       : ---
Platform Reboot Device    : sifive_test
Platform Shutdown Device  : sifive_test
Firmware Base             : 0x80000000
Firmware Size             : 252 KB
Runtime SBI Version       : 0.3

Domain0 Name              : root
Domain0 Boot HART         : 0
Domain0 HARTs             : 0*
Domain0 Region00          : 0x0000000002000000-0x000000000200ffff (I)
Domain0 Region01          : 0x0000000080000000-0x000000008003ffff ()
Domain0 Region02          : 0x0000000000000000-0xffffffffffffffff (R,W,X)
Domain0 Next Address      : 0x0000000080200000
Domain0 Next Arg1         : 0x00000000bfe00000
Domain0 Next Mode         : S-mode
Domain0 SysReset          : yes

Boot HART ID              : 0
Boot HART Domain          : root
Boot HART ISA             : rv64imafdcsuh
Boot HART Features        : scounteren,mcounteren,mcountinhibit,time
Boot HART PMP Count       : 16
Boot HART PMP Granularity : 4
Boot HART PMP Address Bits: 54
Boot HART MHPM Count      : 16
Boot HART MIDELEG         : 0x0000000000001666
Boot HART MEDELEG         : 0x0000000000f0b509

------------
NetBSD start

sp:      0x0000_0000_80a0_2000
pc:      0x0000_0000_8020_0090
hart:    0x0000_0000_0000_0000
dtb:     0x0000_0000_bfe0_0000
l1:      0x0000_0000_80a0_2000
l2:      0x0000_0000_80a0_3000
uspace:  0x0000_0000_80a0_0000
bootstk: 0x0000_0000_80a0_2000
vtopdiff:0xffff_ffbf_7fe0_0000

bss:     0x0000_0000_808a_8bdc - 0x0000_0000_80a0_4000

0x0000_0000_80a0_3800: 0x0000_0000_2028_0821

kern 0x0000_0000_80a0_2000: 0x0000_0000_2008_002f
kern 0x0000_0000_80a0_2008: 0x0000_0000_2010_002f
kern 0x0000_0000_80a0_2010: 0x0000_0000_2018_002f
kern 0x0000_0000_80a0_2018: 0x0000_0000_2020_002f
kern 0x0000_0000_80a0_2020: 0x0000_0000_2028_002f
kern 0x0000_0000_80a0_2028: 0x0000_0000_2030_002f
kern 0x0000_0000_80a0_2030: 0x0000_0000_2038_002f
kern 0x0000_0000_80a0_2038: 0x0000_0000_2040_002f
kern 0x0000_0000_80a0_2040: 0x0000_0000_2048_002f
kern 0x0000_0000_80a0_2048: 0x0000_0000_2050_002f
kern 0x0000_0000_80a0_2050: 0x0000_0000_2058_002f
kern 0x0000_0000_80a0_2058: 0x0000_0000_2060_002f
kern 0x0000_0000_80a0_2060: 0x0000_0000_2068_002f
kern 0x0000_0000_80a0_2068: 0x0000_0000_2070_002f
kern 0x0000_0000_80a0_2070: 0x0000_0000_2078_002f
kern 0x0000_0000_80a0_2078: 0x0000_0000_2080_002f
dtb  0x0000_0000_80a0_2080: 0x0000_0000_2ff8_0027
PM
[   1.0000000] FDT<0xffffffc002000000>
[   1.0000000] consinit ok
[   1.0000000] NetBSD/riscv (fdt) booting ...
[   1.0000000] FDT /memory @ 0x80000000 size 0x40000000
[   1.0000000] init_riscv: memory start 80000000 end c0000000 (len 40000000)
[   1.0000000] bootargs: root=ld4a -v -x
[   1.0000000] bootflag 'r' not recognised
[   1.0000000] bootflag 'o' not recognised
[   1.0000000] bootflag 'o' not recognised
[   1.0000000] bootflag 't' not recognised
[   1.0000000] bootflag '=' not recognised
[   1.0000000] bootflag 'l' not recognised
[   1.0000000] bootflag ' ' not recognised
[   1.0000000] bootflag ' ' not recognised
[   1.0000000] ------------------------------------------
[   1.0000000]            kern_vtopdiff = 0xffffffbf7fe00000
[   1.0000000]             memory_start = 0x        80000000
[   1.0000000]               memory_end = 0x        c0000000
[   1.0000000]              memory_size = 0x        40000000
[   1.0000000]           kernstart_phys = 0x        80200000
[   1.0000000]             kernend_phys = 0x        80a00000
[   1.0000000]    VM_MIN_KERNEL_ADDRESS = 0xffffffc000000000
[   1.0000000]           kernstart_mega = 0xffffffc000000000
[   1.0000000]                kernstart = 0xffffffc000000000
[   1.0000000]                  kernend = 0xffffffc000800000
[   1.0000000]             kernend_mega = 0xffffffc000800000
[   1.0000000]    VM_MAX_KERNEL_ADDRESS = 0xffffffd000000000
[   1.0000000] ------------------------------------------
[   1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564

Revision 1.10 / (download) - annotate - [select for diffs], Sat Oct 30 07:18:46 2021 UTC (16 months, 2 weeks ago) by skrll
Branch: MAIN
Changes since 1.9: +3 -3 lines
Diff to previous 1.9 (colored)

Fix thinko in tlb_record_asids memset size calculation.

Revision 1.9 / (download) - annotate - [select for diffs], Thu Oct 7 07:13:35 2021 UTC (17 months, 1 week ago) by skrll
Branch: MAIN
Changes since 1.8: +15 -2 lines
Diff to previous 1.8 (colored)

Hacky build fixes

Revision 1.8 / (download) - annotate - [select for diffs], Sat Oct 2 14:28:05 2021 UTC (17 months, 2 weeks ago) by skrll
Branch: MAIN
Changes since 1.7: +3 -3 lines
Diff to previous 1.7 (colored)

Pass the pmap in tlb_set_asid for the benefit of aarch64.

Revision 1.6.8.1 / (download) - annotate - [select for diffs], Thu May 13 00:47:27 2021 UTC (22 months, 1 week ago) by thorpej
Branch: thorpej-i2c-spi-conf
Changes since 1.6: +11 -5 lines
Diff to previous 1.6 (colored) next main 1.7 (colored)

Sync with HEAD.

Revision 1.7 / (download) - annotate - [select for diffs], Sat May 1 07:41:24 2021 UTC (22 months, 2 weeks ago) by skrll
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-i2c-spi-conf-base, thorpej-futex2-base, thorpej-futex2, thorpej-cfargs2-base, thorpej-cfargs2, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.6: +11 -5 lines
Diff to previous 1.6 (colored)

Fixup some pmap / VM related #defines and code

Revision 1.2.22.3 / (download) - annotate - [select for diffs], Mon Apr 13 08:04:05 2020 UTC (2 years, 11 months ago) by martin
Branch: phil-wifi
Changes since 1.2.22.2: +28 -33 lines
Diff to previous 1.2.22.2 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

Mostly merge changes from HEAD upto 20200411

Revision 1.2.22.2 / (download) - annotate - [select for diffs], Wed Apr 8 14:07:51 2020 UTC (2 years, 11 months ago) by martin
Branch: phil-wifi
Changes since 1.2.22.1: +9 -2 lines
Diff to previous 1.2.22.1 (colored) to branchpoint 1.2 (colored)

Merge changes from current as of 20200406

Revision 1.6 / (download) - annotate - [select for diffs], Sat Mar 14 16:12:16 2020 UTC (3 years ago) by skrll
Branch: MAIN
CVS Tags: thorpej-futex-base, thorpej-futex, thorpej-cfargs-base, thorpej-cfargs, phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh
Branch point for: thorpej-i2c-spi-conf
Changes since 1.5: +3 -3 lines
Diff to previous 1.5 (colored)

Trailing whitespace

Revision 1.5 / (download) - annotate - [select for diffs], Wed Mar 11 13:30:31 2020 UTC (3 years ago) by thorpej
Branch: MAIN
Changes since 1.4: +9 -2 lines
Diff to previous 1.4 (colored)

With DEBUG defined, it's possible to execute a TLB-vs-segmap consistency
check from a (soft) interrupt handler.  But if a platform does not otherwise
require the pmap_tlb_miss_lock, then where will be a brief window of
inconsistency that, while harmless, will still fire an assertion in the
consistency check.

Fix this with the following changes:
1- Refactor the pmap_tlb_miss_lock into MI code and rename it from
   pmap_tlb_miss_lock_{enter,exit}() to pmap_tlb_miss_lock_{enter,exit}().
   MD code can still define the "md" hooks as necessary, and if so, will
   override the common implementation.
2- Provde a pmap_bootstrap_common() function to perform common pmap bootstrap
   operations, namely initializing the pmap_tlb_miss_lock if it's needed.
   If MD code overrides the implementation, it's responsible for initializing
   its own lock.
3- Call pmap_bootstrap_common() from the mips, powerpc booke, and riscv
   pmap_bootstrap() routines.  (This required adding one for riscv.)
4- Switch powerpc booke to the common pmap_tlb_miss_lock.
5- Enable pmap_tlb_miss_lock if DEBUG is defined, even if it's not otherwise
   required.

PR port-mips/55062 (Failed assertion in pmap_md_tlb_check_entry())

Revision 1.4 / (download) - annotate - [select for diffs], Sun Jun 16 07:42:52 2019 UTC (3 years, 9 months ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-20191119, netbsd-9-base, netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1, netbsd-9, is-mlppp-base, is-mlppp, ad-namecache-base3, ad-namecache-base2, ad-namecache-base1, ad-namecache-base, ad-namecache
Changes since 1.3: +22 -34 lines
Diff to previous 1.3 (colored)

Misc changes in RISC-V.

Revision 1.2.22.1 / (download) - annotate - [select for diffs], Mon Jun 10 22:06:41 2019 UTC (3 years, 9 months ago) by christos
Branch: phil-wifi
Changes since 1.2: +10 -4 lines
Diff to previous 1.2 (colored)

Sync with HEAD

Revision 1.3 / (download) - annotate - [select for diffs], Sat Jun 1 12:42:28 2019 UTC (3 years, 9 months ago) by maxv
Branch: MAIN
CVS Tags: phil-wifi-20190609
Changes since 1.2: +10 -4 lines
Diff to previous 1.2 (colored)

Misc changes in RISC-V. Start changing the memory layout, too.

Revision 1.2.18.2 / (download) - annotate - [select for diffs], Sun Dec 3 11:36:39 2017 UTC (5 years, 3 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.2.18.1: +208 -0 lines
Diff to previous 1.2.18.1 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

update from HEAD

Revision 1.2.2.2 / (download) - annotate - [select for diffs], Mon Apr 6 15:18:01 2015 UTC (7 years, 11 months ago) by skrll
Branch: nick-nhusb
Changes since 1.2.2.1: +208 -0 lines
Diff to previous 1.2.2.1 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

Sync with HEAD

Revision 1.2.18.1, Tue Mar 31 01:14:57 2015 UTC (7 years, 11 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.2: +0 -208 lines
FILE REMOVED

file pmap_machdep.c was added on branch tls-maxphys on 2017-12-03 11:36:39 +0000

Revision 1.2.2.1, Tue Mar 31 01:14:57 2015 UTC (7 years, 11 months ago) by skrll
Branch: nick-nhusb
Changes since 1.2: +0 -208 lines
FILE REMOVED

file pmap_machdep.c was added on branch nick-nhusb on 2015-04-06 15:18:01 +0000

Revision 1.2 / (download) - annotate - [select for diffs], Tue Mar 31 01:14:57 2015 UTC (7 years, 11 months ago) by matt
Branch: MAIN
CVS Tags: tls-maxphys-base-20171202, prg-localcount2-base3, prg-localcount2-base2, prg-localcount2-base1, prg-localcount2-base, prg-localcount2, phil-wifi-base, pgoyette-localcount-base, pgoyette-localcount-20170426, pgoyette-localcount-20170320, pgoyette-localcount-20170107, pgoyette-localcount-20161104, pgoyette-localcount-20160806, pgoyette-localcount-20160726, pgoyette-localcount, pgoyette-compat-merge-20190127, pgoyette-compat-base, pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906, pgoyette-compat-0728, pgoyette-compat-0625, pgoyette-compat-0521, pgoyette-compat-0502, pgoyette-compat-0422, pgoyette-compat-0415, pgoyette-compat-0407, pgoyette-compat-0330, pgoyette-compat-0322, pgoyette-compat-0315, pgoyette-compat, perseant-stdc-iso10646-base, perseant-stdc-iso10646, nick-nhusb-base-20170825, nick-nhusb-base-20170204, nick-nhusb-base-20161204, nick-nhusb-base-20161004, nick-nhusb-base-20160907, nick-nhusb-base-20160529, nick-nhusb-base-20160422, nick-nhusb-base-20160319, nick-nhusb-base-20151226, nick-nhusb-base-20150921, nick-nhusb-base-20150606, nick-nhusb-base-20150406, netbsd-8-base, netbsd-8-2-RELEASE, netbsd-8-1-RELEASE, netbsd-8-1-RC1, netbsd-8-0-RELEASE, netbsd-8-0-RC2, netbsd-8-0-RC1, netbsd-8, matt-nb8-mediatek-base, matt-nb8-mediatek, localcount-20160914, jdolecek-ncq-base, jdolecek-ncq, isaki-audio2-base, isaki-audio2, bouyer-socketcan-base1, bouyer-socketcan-base, bouyer-socketcan
Branch point for: tls-maxphys, phil-wifi, nick-nhusb
Changes since 1.1: +5 -5 lines
Diff to previous 1.1 (colored)

Use sfence.vm instruction and change ptbr cse to sptbr csr

Revision 1.1 / (download) - annotate - [select for diffs], Sat Mar 28 16:13:56 2015 UTC (7 years, 11 months ago) by matt
Branch: MAIN

Beginnings of RISCV kernel support.  Note that the pmap support is not yet
committed and probably won't be for awhile.  This is mostly preliminary
waiting for the supervisor specification to come out.  Lots of missing pieces
but it mostly builds.

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