Annotation of src/sys/arch/riscv/riscv/locore.S, Revision 1.40
1.40 ! skrll 1: /* $NetBSD: locore.S,v 1.39 2022/10/16 06:14:53 skrll Exp $ */
1.15 skrll 2:
1.1 matt 3: /*-
1.25 skrll 4: * Copyright (c) 2014, 2022 The NetBSD Foundation, Inc.
1.1 matt 5: * All rights reserved.
6: *
7: * This code is derived from software contributed to The NetBSD Foundation
1.25 skrll 8: * by Matt Thomas of 3am Software Foundry, and by Nick Hudson.
1.1 matt 9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: *
19: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29: * POSSIBILITY OF SUCH DAMAGE.
30: */
31:
1.25 skrll 32: #include "opt_console.h"
33: #include "opt_riscv_debug.h"
34:
1.1 matt 35: #include <machine/asm.h>
36: #include "assym.h"
37:
38: .globl _C_LABEL(exception_userexit)
39: .globl _C_LABEL(cpu_Debugger_insn)
40:
1.25 skrll 41: #if defined(VERBOSE_INIT_RISCV)
42:
43: #define VPRINTS(string) \
44: call locore_prints ; \
45: .asciz string ; \
46: .align 3 ; \
47:
48: #define VPRINTX(regno) \
49: mv a0, regno ; \
50: call locore_printx
51:
52: #define VPRINTXNL(regno) \
53: mv a0, regno ; \
54: call locore_printxnl
55:
56: /* Need to turn relaxation off for VPRINTS */
57: .option norelax
58:
59: #else
60: #define VPRINTS(string) /* nothing */
61: #define VPRINTX(regno) /* nothing */
62: #define VPRINTXNL(regno) /* nothing */
63: #endif
64:
65: #if VM_MIN_KERNEL_ADDRESS != VM_KERNEL_BASE
66: #error VM_MIN_KERNEL_ADDRESS assumed to match VM_KERNEL_BASE
67: #endif
68:
69: /*
70: * Entry point where.
71: * a0 is hartid
72: * a1 is pointer to dtb (PA)
73: */
1.1 matt 74: ENTRY_NP(start)
1.25 skrll 75: csrw sie, zero // disable interrupts
76: csrw sip, zero // clear any pending
77:
78: li s0, SR_FS
79: csrc sstatus, s0 // disable FP
80:
81: /*
82: * atomically swap a non-zero value into hart_boot. If we see zero
83: * we won in race to become BP.
84: */
85: li s1, 1
86: la s0, hart_boot
87:
88: amoswap.w s0, s1, (s0)
89: bnez s0, mpentry
90: /*
91: * The BP only executes from here on.
92: */
1.35 skrll 93: mv s10, a0 // copy hartid
94: mv s11, a1 // copy dtb PA
1.25 skrll 95:
96: /* set the stack pointer for boot */
1.34 skrll 97: PTR_LA t0, _C_LABEL(bootstk)
98: mv sp, t0
1.25 skrll 99:
100: VPRINTS("\n------------\nNetBSD start\n\n")
101: VPRINTS("sp: ")
102: VPRINTXNL(sp)
103:
104: VPRINTS("pc: ")
105: auipc a0, 0
106: VPRINTXNL(a0)
107:
108: VPRINTS("hart: ")
1.35 skrll 109: VPRINTXNL(s10)
1.25 skrll 110:
111: VPRINTS("dtb: ")
1.35 skrll 112: VPRINTXNL(s11)
1.25 skrll 113:
114: /*
115: * Calculate the difference between the VA and PA for start and
116: * keep in s8. Store this in kern_vtopdiff once the MMU is on.
117: */
1.34 skrll 118: PTR_LA t0, start
1.25 skrll 119: PTR_L s8, .Lstart
120:
1.34 skrll 121: sub s8, s8, t0
1.25 skrll 122:
1.33 skrll 123: PTR_LA s5, _C_LABEL(lwp0uspace)
124: PTR_LA s6, _C_LABEL(bootstk)
125:
1.25 skrll 126: /*
127: * Our load address is not fixed, but our VA is. We need to construct
128: * an initial PDETAB.
1.33 skrll 129: *
130: * The space for the inital page table is included in the kernel
131: * .bss size calculation so we know the space exists.
1.25 skrll 132: */
1.12 skrll 133:
1.25 skrll 134: li a1, 0
135: PTR_LA s2, _C_LABEL(l1_pte)
136: mv s4, s2 // last page table
137: #ifdef _LP64
138: PTR_LA s3, _C_LABEL(l2_pte) // s3 = second PDE page (RV64 only)
139: mv s4, s3 // last page table
140: #ifdef notyet
141: PTR_LA s4, _C_LABEL(l3_pte)
142: #endif
1.1 matt 143: #endif
1.25 skrll 144: PTR_LA s7, _C_LABEL(mmutables_end)
145:
1.1 matt 146:
1.25 skrll 147: // s2 L1 PDE (SV32:4MiB megapages, SV{39,48}: 2MiB megapages)
148: // s3 L2 PDE (_LP64 SV39 only)
149: // s4 L3 PDE (_LP64 SV48 only)
150: // s5 lwp0uspace
151: // s6 bootstk
152: // s7 end of memory to clear
1.1 matt 153:
1.25 skrll 154: VPRINTS("l1: ")
155: VPRINTXNL(s2)
1.1 matt 156: #ifdef _LP64
1.25 skrll 157: VPRINTS("l2: ")
158: VPRINTXNL(s3)
159: #ifdef notyet
160: VPRINTS("l3: ")
161: VPRINTXNL(s4)
162: #endif
1.1 matt 163: #endif
164:
1.25 skrll 165: VPRINTS("uspace: ")
166: VPRINTXNL(s5)
167: VPRINTS("bootstk: ")
168: VPRINTXNL(s6)
169:
170: VPRINTS("vtopdiff:")
171: VPRINTXNL(s8)
172:
173: VPRINTS("\n\r")
174:
175: VPRINTS("bss: ")
176: PTR_LA a0, _C_LABEL(__bss_start)
177: VPRINTX(a0)
178: VPRINTS(" - ")
179: VPRINTXNL(s7)
180:
181: VPRINTS("\n\r")
182:
183: // a0 start of memory to clear
184: // a1 end of memory to clear
185: PTR_LA a0, _C_LABEL(__bss_start)
186: mv a1, s7
187:
188: call clear_bss // zero through kernel_end (inc. stack)
189:
1.29 skrll 190: li s7, PTE_V // page table pointer {X,W,R} = {0,0,0}
1.25 skrll 191:
192: // We allocated the kernel first PDE page so let's insert in the
193: // page table.
194:
195: // Need to setup tables so that for
196: // sv32 : s2
197: // sv39 : s3 -> s2
198: // sv48 : s4 -> s3 -> s2
199:
1.1 matt 200: #ifdef _LP64
1.25 skrll 201: srli t0, s2, (PGSHIFT - PTE_PPN_SHIFT)
202: or t0, t0, s7 // Assumes s2[11:0] == 0
203: #if ((VM_MIN_KERNEL_ADDRESS >> XSEGSHIFT) & (NPDEPG - 1)) * SZREG
204: li t1, ((VM_MIN_KERNEL_ADDRESS >> XSEGSHIFT) & (NPDEPG - 1)) * SZREG
205: #ifdef notyet
206: add t1, t1, s4
207: #else
1.1 matt 208: add t1, t1, s3
1.25 skrll 209: #endif
1.1 matt 210: REG_S t0, 0(t1)
1.25 skrll 211:
1.31 skrll 212: VPRINTS("l2pde: ")
1.25 skrll 213: VPRINTX(t1)
214: #else
215: #ifdef notyet
216: REG_S t0, 0(s4)
1.1 matt 217: #else
218: REG_S t0, 0(s3)
219: #endif
220:
1.31 skrll 221: VPRINTS("l2pde: ")
1.25 skrll 222: VPRINTX(s3)
223: #endif
224:
1.31 skrll 225: VPRINTS(": ")
1.25 skrll 226: VPRINTXNL(t0)
227: VPRINTS("\n\r")
1.27 skrll 228: #endif // _LP64
229:
1.39 skrll 230: // kernel VA
1.27 skrll 231: li t1, ((VM_MIN_KERNEL_ADDRESS >> SEGSHIFT) & (NPDEPG - 1)) * SZREG
1.37 skrll 232: add s9, s2, t1
1.25 skrll 233:
234: #if PGSHIFT < PTE_PPN_SHIFT
235: #error Code assumes PGSHIFT is greater than PTE_PPN_SHIFT
236: #endif
237:
238: li s5, (VM_KERNEL_SIZE >> SEGSHIFT) // # of megapages
239: li s6, (NBSEG >> (PGSHIFT - PTE_PPN_SHIFT)) // load for ease
240: li s7, PTE_KERN | PTE_R | PTE_W | PTE_X
1.1 matt 241:
242: //
1.25 skrll 243: // Fill in the PDEs for kernel.
1.1 matt 244: //
1.25 skrll 245: PTR_LA s0, start
1.27 skrll 246: srli s0, s0, SEGSHIFT // round down to NBSEG, and shift in
247: slli s0, s0, (SEGSHIFT - PGSHIFT + PTE_PPN_SHIFT) // ... to PPN
1.25 skrll 248: or s0, s0, s7
1.38 skrll 249: 1:
1.31 skrll 250: VPRINTS("kern: ")
1.37 skrll 251: VPRINTX(s9)
1.31 skrll 252: VPRINTS(": ")
1.25 skrll 253: VPRINTXNL(s0)
254:
1.37 skrll 255: REG_S s0, 0(s9) // store PDE
1.25 skrll 256: add s0, s0, s6 // advance PA in PDE to next segment
1.37 skrll 257: add s9, s9, SZREG // advance to next PDE slot
1.25 skrll 258: addi s5, s5, -1 // count down segment
1.38 skrll 259: bnez s5, 1b // loop if more
1.25 skrll 260:
1.39 skrll 261: // DTB VA
262: li t1, ((VM_KERNEL_DTB_BASE >> SEGSHIFT) & (NPDEPG - 1)) * SZREG
263: add s9, s2, t1
264:
1.25 skrll 265: li s7, PTE_KERN | PTE_R | PTE_W
266:
1.39 skrll 267: //
268: // Fill in the PDE for the DTB. Only do one - if any more are required
269: // they will be mapped in later.
270: //
1.35 skrll 271: mv s0, s11
1.25 skrll 272: srli s0, s0, SEGSHIFT // round down to NBSEG, and shift in
273: slli s0, s0, (SEGSHIFT - PGSHIFT + PTE_PPN_SHIFT) // ... to PPN
274: or s0, s0, s7
275:
1.31 skrll 276: VPRINTS("dtb: ")
1.37 skrll 277: VPRINTX(s9)
1.31 skrll 278: VPRINTS(": ")
1.25 skrll 279: VPRINTXNL(s0)
280:
1.37 skrll 281: REG_S s0, 0(s9)
1.25 skrll 282:
283: #ifdef CONSADDR
1.39 skrll 284: li t1, ((VM_KERNEL_IO_BASE >> SEGSHIFT) & (NPDEPG - 1)) * SZREG
285: add s9, s2, t1
286:
287: // Fill in the PDE for CONSADDR.
288: ld t0, .Lconsaddr
289: mv s0, t0
1.25 skrll 290: srli s0, s0, SEGSHIFT // round down to NBSEG, and shift in
291: slli s0, s0, (SEGSHIFT - PGSHIFT + PTE_PPN_SHIFT) // ... to PPN
292: or s0, s0, s7
293:
1.31 skrll 294: VPRINTS("cons: ")
1.40 ! skrll 295: VPRINTX(s9)
1.31 skrll 296: VPRINTS(": ")
1.25 skrll 297: VPRINTXNL(s0)
298:
1.37 skrll 299: REG_S s0, 0(s9)
1.9 maxv 300: #endif
1.1 matt 301:
1.25 skrll 302: li a0, 'P'
303: call _C_LABEL(uartputc)
304:
305: /* Set supervisor trap vector base register */
1.40 ! skrll 306: PTR_LA t0, vstart
1.25 skrll 307: add t0, t0, s8
308: csrw stvec, t0
309:
310: /* Set supervisor address translation and protection register */
311: srli t1, s4, PGSHIFT
312: #ifdef _LP64
313: li t0, SATP_MODE_SV39
314: #else
315: li t0, SATP_MODE_SV32
316: #endif
317: or t0, t0, t1
318: sfence.vma
319: csrw satp, t0
1.1 matt 320:
1.25 skrll 321: .align 2
1.40 ! skrll 322: .global vstart
! 323: vstart:
1.1 matt 324: // MMU is on!
1.2 matt 325: csrw sscratch, zero // zero in sscratch to mark kernel
1.1 matt 326:
1.40 ! skrll 327: #ifdef CONSADDR
! 328: add sp, sp, s8
! 329: #endif
1.25 skrll 330: li a0, 'M'
331: call _C_LABEL(uartputc) // uartputs doesn't use stack
332: li a0, '\n'
333: call _C_LABEL(uartputc) // uartputs doesn't use stack
334: li a0, '\r'
335: call _C_LABEL(uartputc) // uartputs doesn't use stack
336:
1.1 matt 337: PTR_LA tp, _C_LABEL(lwp0) // put curlwp in tp
338:
1.25 skrll 339:
340: /* Set supervisor trap vector base register */
1.1 matt 341: PTR_LA a0, _C_LABEL(cpu_exception_handler)
342: csrw stvec, a0
343:
1.34 skrll 344: PTR_LA t0, bootstk // top of lwp0uspace
345: PTR_S t0, L_PCB(tp) // set uarea of lwp (already zeroed)
346: addi sp, t0, -TF_LEN // switch to new stack
1.1 matt 347: PTR_S sp, L_MD_UTF(tp) // store pointer to empty trapframe
348:
349: PTR_LA t1, _C_LABEL(kernel_pmap_store)
1.25 skrll 350: add t2, s4, s8 // PA -> VA
351: srli t3, s4, PGSHIFT
1.8 maxv 352: PTR_S t2, PM_MD_PDETAB(t1) // VA of kernel PDETAB
1.25 skrll 353: PTR_S t3, PM_MD_PPN(t1) // PPN of kernel PDETAB
354:
355: /*
356: * Store kern_vtopdiff (the difference between the physical
357: * and virtual address of the "start" symbol).
358: */
1.34 skrll 359: PTR_LA t0, _C_LABEL(kern_vtopdiff)
360: PTR_S s8, 0(t0) /* kern_vtopdiff = start(virt) - start(phys) */
1.25 skrll 361:
362: #if notyet
1.35 skrll 363: mv a0, s11 // dtb
1.25 skrll 364: call _C_LABEL(init_mmu)
365: #endif
366:
367: li t0, VM_MIN_KERNEL_ADDRESS + VM_KERNEL_SIZE
368: li t1, NBSEG - 1
1.35 skrll 369: and t1, s11, t1
1.25 skrll 370: or t0, t0, t1
371:
372: /* Set the global pointer */
373: .option push
374: .option norelax
375: lla gp, __global_pointer$
376: .option pop
1.1 matt 377:
378: // Now we should ready to start initializing the kernel.
1.36 skrll 379: mv a0, s10 // hartid
1.39 skrll 380: mv a1, s11 // dtb (physical)
1.26 skrll 381:
382: li s0, 0 // zero frame pointer
1.2 matt 383: call _C_LABEL(init_riscv) // do MD startup
384: tail _C_LABEL(main) // and transfer to main
1.25 skrll 385: /* No return from main */
1.1 matt 386: END(start)
387:
1.25 skrll 388:
389: ENTRY(mpentry)
390: 1:
391: wfi
392: j 1b
393: END(mpentry)
394:
395:
396: .align 3
397: .Lstart:
398: #ifdef _LP64
399: .quad start
400: #else
401: .word start
402: #endif
403:
404:
405: #ifdef CONSADDR
406: .align 3
407: .Lconsaddr:
408: #ifdef _LP64
409: .quad CONSADDR
410: #else
411: .word CONSADDR
412: #endif
413: #endif
414:
415:
416: ENTRY_NP(uartputc)
417: #ifdef EARLYCONS
418: tail ___CONCAT(EARLYCONS, _platform_early_putchar)
419: #else
1.28 skrll 420: #define SBI_LEGACY_CONSOLE_PUTCHAR 1
1.25 skrll 421: li a7, SBI_LEGACY_CONSOLE_PUTCHAR
422: ecall
423: ret
424: #endif
425: END(uartputc)
426:
427:
1.28 skrll 428: ENTRY_NP(uartgetc)
429: #ifdef EARLYCONS
430: li a0, -1
431: #else
432: #define SBI_LEGACY_CONSOLE_GETCHAR 2
433: li a7, SBI_LEGACY_CONSOLE_GETCHAR
434: ecall
435: ret
436: #endif
437:
438:
1.25 skrll 439: ENTRY_NP(clear_bss)
440: bgeu a0, a1, 1f
441: 2:
442: sb zero, 0(a0)
443: addi a0, a0, 1
444: bne a1, a0, 2b
445: 1:
446: ret
447: END(clear_bss)
448:
449:
450: #if defined(VERBOSE_INIT_RISCV)
451: ENTRY_NP(locore_prints)
452: addi sp, sp, -(SZREG * 2)
453: REG_S s0, (0 * SZREG)(sp)
454: mv s0, ra
455: 1:
456: lbu a0, 0(s0)
457: beqz a0, 2f
458:
459: call uartputc
460:
461: addi s0, s0, 1
462: j 1b
463: 2:
464: addi s0, s0, 8 // s0 points to the null terminator
465: andi ra, s0, -8
466:
467: REG_L s0, (0 * SZREG)(sp)
468: addi sp, sp, (SZREG * 2)
469: ret
470:
471: END(locore_prints)
472:
473:
474: ENTRY_NP(locore_printx)
475: addi sp, sp, -(SZREG * 4)
476: REG_S s0, (0 * SZREG)(sp)
477: REG_S s1, (1 * SZREG)(sp)
478: REG_S s2, (2 * SZREG)(sp)
479: REG_S ra, (3 * SZREG)(sp)
480:
481: mv s1, a0 // our print value
482: li s2, 10
483:
484: li a0, '0'
485: call uartputc
486: li a0, 'x'
487: call uartputc
488:
489: // Word size in bits
490: li s0, (SZREG * 8)
491: 1:
492: addi s0, s0, -4 // nibble shift
493:
494: srl a0, s1, s0 // extract ...
495: andi a0, a0, 0xf
496:
497: bltu a0, s2, 2f
498: addi a0, a0, ('a' - '0' - 10)
499: 2: addi a0, a0, '0'
500:
501: call uartputc
502:
503: beqz s0, 3f
504:
505: and a0, s0, (16 - 1)
506: bnez a0, 1b
507:
508: li a0, '_'
509: call uartputc
510:
511: j 1b
512:
513: 3:
514: REG_L s0, (0 * SZREG)(sp)
515: REG_L s1, (1 * SZREG)(sp)
516: REG_L s2, (2 * SZREG)(sp)
517: REG_L ra, (3 * SZREG)(sp)
518: addi sp, sp, (SZREG * 4)
519: ret
520: END(locore_printx)
521:
522:
523: ENTRY_NP(locore_printxnl)
524: addi sp, sp, -(SZREG * 2)
525: REG_S ra, (1 * SZREG)(sp)
526:
527: call locore_printx
528: li a0, '\n'
529: call uartputc
530:
531: li a0, '\r'
532: call uartputc
533:
534: REG_L ra, (1 * SZREG)(sp)
535: addi sp, sp, (SZREG * 2)
536:
537: ret
538: END(locore_printxnl)
539: #endif /* VERBOSE_INIT_RISCV */
540:
541:
542: .data
543: .align 2
544: hart_boot:
545: .word 0
546:
547: .section "_init_memory", "aw", %nobits
548: .align PGSHIFT
549: .global _C_LABEL(lwp0uspace)
550: _C_LABEL(lwp0uspace):
551: .space UPAGES * PAGE_SIZE
552: bootstk:
553:
554: /*
555: * Allocate some memory after the kernel image for stacks and
556: * bootstrap L1PT
557: */
558: .align PGSHIFT
559:
560: .section "_init_memory", "aw", %nobits
561: .align PGSHIFT
562: mmutables_start:
563: .global _C_LABEL(l1_pte)
564: l1_pte:
565: .space PAGE_SIZE
566: #ifdef _LP64
567: .global _C_LABEL(l2_pte)
568: l2_pte:
569: .space PAGE_SIZE
570: #ifdef notyet
571: l3_pte:
572: .space PAGE_SIZE
573: #endif
574: #endif
575: mmutables_end:
576:
577:
1.1 matt 578: ENTRY_NP(cpu_Debugger)
579: cpu_Debugger_insn:
580: sbreak
581: ret
582: END(cpu_Debugger)
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