CVS log for src/sys/arch/riscv/riscv/db_machdep.c

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Keyword substitution: kv
Default branch: MAIN

risc-v: support crash(8)

risc-v: split db_{read,write}_bytes from db_machdep.c

Another step towards crash(8) support

risc-v: don't include locore.h in db_machdep.h

risc-v: MULTIPROCESSOR support

Add MULTIPROCESSOR support for RISC-V, but leave disabled for the moment
as it's not 100% stable.

Some other improvements to spl and cpu identification / reporting.

Nuke funny trailing whitespace.

Basic ddb and backtrace support.

[   1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564
[   1.0000000] cpu0: Begin traceback...
[   1.0000000] trace fp ffffffc000801dd0
[   1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98
[   1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984
[   1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430
[   1.0000000] cpu0: End traceback...
[   1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0):
[   1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp =                 0
[   1.0000000] s0 =0xffffffc000600ac0, s1 =            0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80
[   1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8
[   1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8
[   1.0000000] a0 =              0x17, a1 =               0xa, a2 =                 0, a3 =0xffffffc00041f658
[   1.0000000] a4 =                 0, a5 =               0x1, a5 =                 0, a7 =               0x1
[   1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 =              0x75
[   1.0000000] t4 =                 0, t5 =              0x63, t6 =               0x1
[   1.0000000] kernel: breakpoint
Stopped in pid 0.0 (system) at  ffffffc0000007e4:       c.ebreak
db>

Sync w/ HEAD.

sync with head

Improve ddb disassembly for mips (and riscv, cribbed from mips).

- use db_read_bytes to get instructions
- move the address check logic previously attached only to fetching
  instructions for disassembly to db_read_bytes (and db_write_bytes)

Motivated by related x86 changes this afternoon.

Note that the address check logic is not as sophisticated as what the
x86 code does, but it's what we had before. (Except that riscv will
now also try to fetch usermode instructions instead of just failing.)

Sync with HEAD.

Add a ddb disassembler for riscv.

builds, but not really tested yet.

Sync w/ HEAD.

RCSID and whitespace police...

Miscellaneous updates to reflect riscv-privileged-20190608.pdf

Some from zmcgrew@

Mostly merge changes from HEAD upto 20200411

Merge changes from current as of 20200406

Trailing whitespace

Misc changes in RISC-V.

Synch with HEAD

PR/53206: David Binderman: fix array bounds comparison in KASSERT.

update from HEAD

Sync with HEAD

file db_machdep.c was added on branch tls-maxphys on 2017-12-03 11:36:39 +0000

file db_machdep.c was added on branch nick-nhusb on 2015-04-06 15:18:01 +0000

Beginnings of RISCV kernel support.  Note that the pmap support is not yet
committed and probably won't be for awhile.  This is mostly preliminary
waiting for the supervisor specification to come out.  Lots of missing pieces
but it mostly builds.