CVS log for src/sys/arch/prep/prep/platform.c

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Remove unnecessary <sys/malloc.h>.

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

GCC 4.8 build fixes from John D. Baker

kill sprintf

Catchup with rmind-uvmplock merge.

Cleanup includes.  (<net/netisr.h> is handled by softints, not MD anymore,
so this can be nuked).

struct device * -> device_t
struct cfdata * -> cfdata_t
use device accessors, use device_private.
some softc/device_t splits (macppc needs a bunch more)
aprint*_dev used considerably more

Sync with HEAD.

sync with head.

sync with head.

Remove clause 3 and 4 from TNF licenses

sync with HEAD

sync with head.

Sync with HEAD.

Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.

Sync with HEAD.

Sync with head.

sync with head.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Change pic_prepivr around a bit.  Handle the default IRQ 7 from the 8259
better, and add a new motivr_get_irq().  The motorola machines require an
actual read from the 8259 for PCI irqs, so in that case, we read the
8259, and then read the IVR to ack the irq.

Move i8259_get_irq() to i8259_common.c for above.

Fix some minor typos in the chip id's for prep residual.

Fix ibmnws and prep to properly initialize the prep ivr depending on if
the machine is motorola, or IBM based.

Tested on a 7043 and an MTX604

Apply patches from John D. Baker to make INSTALL compile again.  Also
cleans up some of the config stuff for the mcclock pnpbus attachment.

convert printf's to aprint_*.

change prep_pct to genppc_pct to share better

Convert prep to use the new generic powerpc PCI stuff.  There are
probably a few more things that can be made generic here.  Tested on
7248-100.

sync with head.

Sync with head.

sync with head.

Pull up following revision(s) (requested by garbled in ticket #138):
	sys/arch/prep/prep/platform.c: revision 1.22
	sys/arch/prep/pnpbus/nvram_pnpbus.c: revision 1.4
Now that the interrupt bug on the 7043-140 is fixed, it also fixes the
long standing issue with interrupts onthe PowerStack E1.  Remove the
quirk entry for the PowerStack E1 and revert to using the IVR.
Also, add a \n to the attachment of the mk clock printf that was missing.

sync with head

Now that the interrupt bug on the 7043-140 is fixed, it also fixes the
long standing issue with interrupts onthe PowerStack E1.  Remove the
quirk entry for the PowerStack E1 and revert to using the IVR.
Also, add a \n to the attachment of the mk clock printf that was missing.

sync with head

Merge from HEAD.

Add support for rebooting 7024 and 7025 models.  Since I cannot figure
out how to properly reboot these machines, instead we make use of the
auto-poweron-alarm time, and power cycle the machine to simulate a
reboot.  This is a hack, but until I get documentation on these machines,
at least you will be able to reboot them.

General fixups:
1) Fix support for the powerstack E1.  This machine needs to use the 8259
directly, and cannot use the prep interrupt vector register.  Place a
quirk entry in the table for the machine.
2) Add a new com0_vreset boot image.  The vreset code only works on a few
machines, and breaks others like the 7025-F40.  Its only limitedly useful
when used with the com0, so just make it an optional image the user can
install by hand if they want.
3) Bump the bootloader to 1.8 with the above change.

sync with head.

sync with head.

Sync with head.

A bit of clock rototill.  It's safer to detect things known by the
residual with the pnpbus probes, than it is to do it with raw isa probes,
so I've replaced the isa mkclock and mcclock code with a pnpbus attachment.

While writing the mkclock code, I realized that on motorola prep machines
the mkclock uses the same port range as the nvram part. (it's actually
the same chip/part).  This was causing the nvram not to work on those
machines.  Now the nvram code will recognize this, and wire up the
mkclock as well.  The mkclock probe is just a stub probe used to
pre-detect the fact that this is one of those machines.

Completely rework how we look up PCI interrupts on prep:

1) Rather than build an array of the pci->intr mappings, build a proplib
tree.
2) add a SIMPLEQ of device properties to the pci_chipset_tag to hold the
proplib trees of each bus.
3) Move the interrupt routing code from pci_conf_interrupt to pci_map_intr()
4) Deal properly with non-native PCI bridge chips that are not recognized
by the prep firmware, and therefore are not noted in the residual data.

The major win of this restructure is #4. Hopefully I haven't broken
anything. Tested on a 7248-100, 7043-140 and 7024-E20.

Sync with head.

Implement partial support for the RS6K PCI Bridge found on 7025-F40
models.  This code was made possible by assistance from Cory Bajus.

Add code that asks the PCI bridge what it's config base address is, and
use that when wiring up an indirect bridge type.
Move prep's user segment register to 10, because the 7025's PCI config
address is at 11, where the user segment used to be.
Add a battable entry for 0xbf800000 for machines with RS6K bridges.

There is still probably work left to be done before a 7025-F40 is fully
supported.

Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.

sync with head.

sync with head

Use inb/outb macros instead of casting things to volatile.

convert some of the simple __asm statements to the standard powerpc
macros, like mtmsr().

Sync with head.

sync with head - hopefully this will work

sync with head.

Prep super-commit:

1) create new pnpbus psuedo bus.  This is a bus layer that reads the PNP
tree from the residual data and allows attachment of devices with the
information given therein.  Based loosely on i386/pnpbios.

2) Delete obio bus, as with the pnp bus we no longer need it.

3) Create a number of functions that gather the information needed to set
up the machine from the residual data, rather than hardcoding it in.

4) Create a quirk table for machines that are bizzare enough that the
residual information is not sufficient.  (such as the 6015)

5) Using the data gathering routines and the quirk table, delete struct
platform completely from the architecture.  Prep is now almost completely
dynamic in figuring out the machine it is running on and setting things
up properly.

6) Add a wdc_pnpbus driver which attaches the wdc controller found on
some 7248's and the 6015.  This replaces the now-defunct wdc_obio.

7) delete all the mot_* and ibm_* files, and replace them with a single
ibm_machdep.c which only contains the quirk functions for the 6015 and
the 6050.

8) Modify GENERIC to work with all this stuff.

sync with head.

Commit support for the IBM Model 7024 E20 and E30.  (E30 not tested).

Changes:
Added a pci-EISA bridge device and associated glue to the prep port.
  Adapted from i386.
Change pci_intr_fixup_*() to pass the pin argument on all platforms.
Make PCI_NETBSD_CONFIGURE leave the MPIC alone.  We map it separately.

7024 kernel was also succ. tested on an IBM 7043, so no regression there.

bare asm -> __asm

merge ktrace-lwp.

Sync with HEAD.

Pass the interrupt swizzle down to the platforms' fixup functions.
N.B. Only using it on the ulmb60xa for now.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

__KERNEL_RCSID()

catch up with -current.

catch up with -current on kqueue branch

Catch up to -current.

Support IBM RS/6000 43P 7043-140.

Added IBM Personal Power Series 830 IDE controller support.

Use PLATFORM_*

rename reset_ibm_generic() -> reset_prep_generic().

Catch up with -current.

Catch up to -current.

Add platform support for the Motorola Ultra Plus and Ultra 60x boards.

Note that this currently matches only the boards built into Bull Estrella
systems, as Bull chose to change the board identification string whose
original content is not known at this time.

In order to support both indirect PCI configuration space access as well
as direct-mapped PCI configuration space access (such as implemented on
the IBM 27-82650 PCI Host Bridge), switch to a function vector based
PCI configuration space access implementation.  The appropriate PCI
chipset tag is provided by platform-specific code.

Update the kqueue branch to HEAD.

file platform.c was added on branch nathanw_sa on 2002-02-28 04:11:32 +0000

Make all powerpc ports use a common Makefile.powerpc (except walnut)
Enforce -Wmissing-prototypes -Wstrict-prototypes for all ppc ports.
Split out macppc cpu support and make common to mpc6xx ports.  Make
other mpc6xx ports use it.  Add evcnts for mpc6xx traps.

Seprate model depended code. (based on arc 'struct platform')

files.prep:
 - add new files entry.

pci_machdep.c:
 - use dev/pci/pciconf.c instead of mine for pci io/mem addr/intr fixup.

cpu.c:
 - separate code

machdep.c:
 - call ident_platform()

mainbus.c:
 - call pci_configure_bus(), if defined PCI_NETBSD_CONFIGURE

ibm_machdep.c:
 - for IBM PReP generic

ibm_6050.c:
 - for IBM Personal Power Series 830/850

ibm_7248.c:
 - for IBM RS6000/43P deppendency