CVS log for src/sys/arch/powerpc/powerpc/process_machdep.c

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Default branch: MAIN

Do not bother to set PSL_SE in l_md.md_flags - it is not checked anywhere.

Sync with HEAD.

For booke and ibm4xx, switch to software-based single-stepping for PT_STEP
ptrace(2) command from broken hardware-based implementation.

As described in proposal on port-powerpc@,

http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html

hardware debug facilities of booke and 4xx use critical interrupts, that
are difficult to handle for this purpose; they are not automatically masked
when entering kernel mode via system call trap or hardware interrupt.
See my proposal above for more details.

Now, hardware debug facilities are exclusively usable by kernel itself.
They are much more functional than PSL_SE MSR bit of oea, and should be
useful to, e.g., support byte-granular watchpoint for DDB in the future.

Pull up following revision(s) (requested by kamil in ticket #1117):

	sys/arch/sh3/include/ptrace.h: revision 1.19
	sys/arch/amd64/amd64/process_machdep.c: revision 1.48
	sys/arch/sh3/sh3/process_machdep.c: revision 1.23
	sys/arch/sh3/sh3/process_machdep.c: revision 1.24
	sys/arch/i386/i386/process_machdep.c: revision 1.95
	sys/arch/x86/x86/fpu.c (apply patch)
	sys/kern/sys_ptrace_common.c: revision 1.84
	sys/arch/powerpc/powerpc/process_machdep.c: revision 1.40
	sys/sys/ptrace.h: revision 1.71
	sys/arch/powerpc/powerpc/process_machdep.c: revision 1.41
	(all via patch, adapted)

Fix s87_tw reconstruction to correctly indicate register states

Fix the code reconstructing s87_tw (full tag word) from fx_sw (abridged
tag word) to correctly represent all register states.  The previous code
only distinguished between empty/non-empty registers, and assigned
'regular value' to all non-empty registers.  The new code explicitly
distinguishes the two other tag word values: empty and special.

Fix the machine-dependent ptrace register-related requests (e.g.
PT_GETXMMREGS, PT_GETXSTATE on x86) to correctly respect the LWP number
passed as the data argument.  Before this change, these requests
did not operate on the requested LWP of a multithreaded program.
This change required moving ptrace_update_lwp() out of unit scope,
and changing ptrace_machdep_dorequest() function to take a pointer
to pointer as the second argument, consistently with ptrace_regs().

I am planning to extend the ATF ptrace() register tests in the future
to check for regressions in multithreaded programs, as time permits.

Reviewed by kamil.

Add missing 'error' declaration

Add missing 'error' declaration

Fix the machine-dependent ptrace requests to respect LWP number

Fix the machine-dependent ptrace register-related requests (e.g.
PT_GETXMMREGS, PT_GETXSTATE on x86) to correctly respect the LWP number
passed as the data argument.  Before this change, these requests
did not operate on the requested LWP of a multithreaded program.

This change required moving ptrace_update_lwp() out of unit scope,
and changing ptrace_machdep_dorequest() function to take a pointer
to pointer as the second argument, consistently with ptrace_regs().

I am planning to extend the ATF ptrace() register tests in the future
to check for regressions in multithreaded programs, as time permits.

Reviewed by kamil.

Style and cosmetic changes. No binary changes intended.

update from HEAD

Sync with HEAD

Sync with HEAD

Sync with HEAD

allow pcu_save() and pcu_discard() to be called on other threads,
ptrace needs to use it that way.

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Don't test for PSL_SE in tf_srr1 since will be cleared on the next exception.
Keep a copy of it in l_md.md_flags which will be preserved.

Remove __HAVE_PROCESS_XFPREGS and add the extra parameter for the size
  of the fp save area to all the process_read_fpregs() and
  process_write_fpregs() functions.
None of the functions have been modified to use the new parameters.
The size is set for all the writes, but some of the arch-specific reads
  just pass NULL.
The amd64 (and i386) need variable sized fp register save areas in order
  to support AVX and other enhanced register areas.
These functions are rarely called - so the extra argument won't matter.

Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.

Fix call sites to reflect the new definition.

Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html

Catchup with rmind-uvmplock merge.

cleanup includes (include <powerpc/psl.h explicitly)

Fix curlwp check for fpreg/vecreg to acknowledge that the PCU is either
for the current lwp or that PCU is not owned on any cpu.

Change KASSERT to KASSERTMSG.

Sync with HEAD.

sync with head

Move powerpc to use pcu to manage FPU/AltiVec/SPE.

sync with head

Use l->l_md.md_utf in preference to trapframe(l).  This shrink the kernel
just a bit in size.

sync with head

Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.

Add SPE (signal processing engine) support for mpc85xx/booke.  Think of it
as AltiVec-lite (really lite).  Genercize AltiVec support so that it could
the same interface could support SPE as well.  Rework the FPU support along
the same lines.  Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).

Deal with trapframe changes and booke changes.

sync with head

Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.

Remove uarea swap-out functionality:

- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code.  Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.

Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).

Discussed on <tech-kern>, reviewed by <ad>.

sync with HEAD

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Sync with HEAD

sync with head.

sync with HEAD

Sync with head.

Sync with head.

Merge some of the less invasive changes from the vmlocking branch:

- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements

Sync with HEAD.

Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

- sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.

sync with head.

Change the process/lwp flags seen by userland via sysctl back to the
P_*/L_* naming convention, and rename the in-kernel flags to avoid
conflict. (P_ -> PK_, L_ -> LW_ ). Add back the (now unused) LSDEAD
constant.

Restores source compatibility with pre-newlock2 tools like ps or top.

Reviewed by Andrew Doran.

Sync with head.

sync with head.

sync with head.

Move ktrace, ptrace, systrace, and procfs to use kauth(9).

First, remove process_checkioperm() calls from MD code. Similar checks
using kauth(9) routines (on the process scope, using appropriate action)
are done in the callers.

Add secmodel back-end to handle each subsystem.

sync with head

sync with head.

Sync with head.

merge yamt-uio_vmspace branch.

- use vmspace rather than proc or lwp where appropriate.
  the latter is more natural to specify an address space.
  (and less likely to be abused for random purposes.)
- fix a swdmover race.

adapt the rest of MD code.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

Declare the second arg of process_write_{fp,}regs() to be const.
This permits sh5 to continue to re-use those functions in cpu_setmcontext()
with the recent change to Makefile.kern.inc (revision 1.62).

Adapt to branch. macppc release builds.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

Add a SAVE/DISCARD flag to save_{fpu,vec}_lwp.  Use it appropriately.
Nuke struct fpu and use struct fpreg instead (except for the names, they
were identical).  On MP machines, this will avoid an unneeded IPI to save
the register contents that are about to discarded.

ANSIfy.

__KERNEL_RCSID()

Apply the aborted ktrace-lwp changes to a specific branch.  This is just for
others to review, I'm concerned that patch fuziness may have resulted in some
errant code being generated but I'll look at that later by comparing the diff
from the base to the branch with the file I attempt to apply to it.  This will,
at the very least, put the changes in a better context for others to review
them and attempt to tinker with removing passing of 'struct lwp' through
the kernel.

Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.

'struct proc *' -> 'struct lwp *' as required to get GENERIC for macppc built

Pass lwp pointers throughtout the kernel, as required, so that the lwpid can
be inserted into ktrace records.  The general change has been to replace
"struct proc *" with "struct lwp *" in various function prototypes, pass
the lwp through and use l_proc to get the process pointer when needed.

Bump the kernel rev up to 1.6V

Make AltiVec registers available via ptrace/procfs.  Simplify AltiVec
processing.  Add a "common" procfs_machdep.c for PowerPC platforms.
Even though it is supposed to be port specific, most (if not all)
PowerPC ports can just use the common one.

Cast to register_t, not int, to be more LP64 friendly.

Merge the nathanw_sa branch.

sync kqueue branch with HEAD

catch up with -current.

LWPify

Catch up to -current.

restructure the FPU and AltiVEC code so that it works for MP.

catch up with -current.

No longer need to pull in lwp.h; proc.h pulls it in for us.

Peform a rototill over the powerpc-based ports.

Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop.  Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.

Initial SA support for ppc.  Test-booted on sandpoint, macppc, & walnut.
mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein
<kleink@netbsd.org>.

update to -current

file process_machdep.c was added on branch nathanw_sa on 2001-11-05 19:46:18 +0000

bcopy -> memcpy, bzero -> memset, bcmp -> memcmp.
Reviewed by Matt Thomas, ok'd by Tsubai Masanari.

Catch up to -current.

Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
 - New pmap and revised trap handler.
 - Support on-chip timers, PCI controller, UARTs
 - Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
 - Add in-kernel PPC floating point emulation
 - New in{,4}_cksum that is between 1.5 and 5 times faster than the
   old version depending on CPU type.
General changes:
 - Kernel support for generic dbsym-style symbols.

Sync with HEAD.

Build with -Wall -Wetc.

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

Sync w/ netbsd-1-5-base.

Need <sys/ptrace.h> for declarations.

Add PT_GETFPREGS and PT_SETFPREGS support.

Sync w/ -current.

PT_{STEP,GETREGS,SETREGS} support.

PowerPC port