CVS log for src/sys/arch/powerpc/powerpc/powerpc_machdep.c

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Export CPU capability of unaligned memory access to userland
as machdep.no_unaligned sysctl(7) variable.

This will be used for ld.so.conf in order to provide strictly-
aligned versions of libc routines.

s/auxillary/auxiliary/ in comments.

fix various typos, mainly s/trasfering/transferring/ and s/theese/these/.

Sync with HEAD.

sandpoint has its own module_init_md(). So, do not compile in
that function in powerpc_machdep.c.

Sync with HEAD.

Convert to KASSERTMSG(9) to display wrong IPL.

For booke and ibm4xx, switch to software-based single-stepping for PT_STEP
ptrace(2) command from broken hardware-based implementation.

As described in proposal on port-powerpc@,

http://mail-index.netbsd.org/port-powerpc/2021/02/26/msg003597.html

hardware debug facilities of booke and 4xx use critical interrupts, that
are difficult to handle for this purpose; they are not automatically masked
when entering kernel mode via system call trap or hardware interrupt.
See my proposal above for more details.

Now, hardware debug facilities are exclusively usable by kernel itself.
They are much more functional than PSL_SE MSR bit of oea, and should be
useful to, e.g., support byte-granular watchpoint for DDB in the future.

Factor out emulation code for m[ft]msr in user mode from oea, and
adjust it for systems without FPU.

Now, it can be used from booke and ibm4xx in order to support fenv(3).

Part of PR port-powerpc/55425
openssl fails on FPU emulation for powerpc

Provide machdep.fpu_present sysctl variable like other ports.

Userland can get informed that FPU is absent and emulated in software
(and calculation results may not be correct in bit-to-bit precision).

This variable should be useful even if we could fix FPU emulation;
it is much faster to skip FPU arithmetic in general, rather than
relying upon emulation by kernel via illegal instruction handler.

Style and cosmetic changes. No binary changes intended.

Merge changes from current as of 20200406

Sync with head.

Pull up following revision(s) (requested by rin in ticket #733):

	sys/arch/powerpc/powerpc/fpu.c: revision 1.39
	sys/arch/powerpc/powerpc/powerpc_machdep.c: revision 1.77

Provide no-op's as pcu_ops_md_defs[PCU_FPU] even if !PPC_HAVE_FPU.

This is required by subr_pcu.c rev 1.21 and later:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/kern/subr_pcu.c#rev1.21

Otherwise, panic occurs when FP instruction is emulated on machines
without FPU.

Note that PowerPC UISA as well as SVR4 ABI require FP instructions,
and emulation is enabled unconditionally on machines without FPU.

Provide no-op's as pcu_ops_md_defs[PCU_FPU] even if !PPC_HAVE_FPU.

This is required by subr_pcu.c rev 1.21 and later:
http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/kern/subr_pcu.c#rev1.21

Otherwise, panic occurs when FP instruction is emulated on machines
without FPU.

Note that PowerPC UISA as well as SVR4 ABI require FP instructions,
and emulation is enabled unconditionally on machines without FPU.

cpu_ast(): no need to call userret(), as the caller does it for us. From rin@.

Need to call userret() from cpu_ast().

cpu_need_resched():

- Remove all code that should be MI, leaving the bare minimum under arch/.
- Make the required actions very explicit.
- Pass in LWP pointer for convenience.
- When a trap is required on another CPU, have the IPI set it locally.
- Expunge cpu_did_resched().

mi_userret(): take care of calling preempt(), set spc_curpriority directly,
and remove MD code that does the same.

Sync with HEAD

Ssync with HEAD

interrupt has two 'r's

fix another typo while I'm here (flsah)

update from HEAD

Sync with HEAD

ddb MP support

Rebase to HEAD as of a few days ago.

Rebase.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

Implement MI IPI interface with cross-call support.

sync with head

remove dup cpu_model sysctl; use the mi version in hw.

Fix PPC64 setregs

If execing a LP64 image, we need to read the function descriptor to get
the entry point and the TOC base.  (Do we need to fixup the TOC base?)

use __diagused for KASSERT only variable.

sync with head

sync with HEAD

cpuset_info is no longer volatile

Pull up following revision(s) (requested by matt in ticket #251):
	sys/arch/powerpc/powerpc/powerpc_machdep.c: revision 1.64
	sys/arch/powerpc/include/cpu.h: revision 1.90
Add CPU_EXECPROT sysctl so that atf can enable exec permission tests for
PPC Booke.

sync with head

sync to latest -current.

Add CPU_EXECPROT sysctl so that atf can enable exec permission tests for
PPC Booke.

sync to -current.

Remove COMPAT_SA / KERN_SA.  Welcome to 6.99.3!
Approved by core@.

merge to -current.

Add a posix_spawn syscall, as discussed on tech-kern.
Based on the summer of code project by Charles Zhang, heavily reworked
later by me - all bugs are likely mine.
Ok: core, releng.

implement bdev_size(9) wrapper around d_psize() routine, so we can take
the device lock in relevant places.  avoid doing so while actually dumping.

tested i386 crash dumps still work, and that all touched files compile.

fixes PR#45705.

s/MULTIPROCESOR/MULTIPROCESSOR/.

Cleanup hatch names.
Add cpuset_info.

Fix code that's been broken for over seven years...

Catchup with rmind-uvmplock merge.

Add a common cpu_ast(l, ci) routine.
Add a ci_pmap_asid_cur for BOOKE debugging.

Make more module friendly (part 1).
Don't export frame.h and psl.h to all of the kernel.
add lwp_pc and clkf accessor functions.
whitespace cleanup.

struct device * -> device_t
struct cfdata * -> cfdata_t
split device/softc (CFATTACH_DECL_NEW)
use device_accessors and device_private
constify

Make startlwp and upcallret common instead of having 3 mostly identical copies.

Add mm_md_kernacc and now kmem tools work again.

need mm_md_direct_mapped_phys support.

Welcome to 5.99.53!  Merge rmind-uvmplock branch:

- Reorganize locking in UVM and provide extra serialisation for pmap(9).
  New lock order: [vmpage-owner-lock] -> pmap-lock.

- Simplify locking in some pmap(9) modules by removing P->V locking.

- Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share
  the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs).

- Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner.
  Add TLBSTATS option for x86 to collect statistics about TLB shootdowns.

- Unify /dev/mem et al in MI code and provide required locking (removes
  kernel-lock on some ports).  Also, avoid cache-aliasing issues.

Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches
formed the core changes of this branch.

sync with head

Switch alpha to use PCU to manage the FPU.
Tested by mhitch and review by rmind.

Sync with HEAD.

Remove <machine/atomic.h>; use <sys/atomic.h> instead.
Add <powerpc/cpuset.h> (for mpc85xx pmap).
Add some initial MP code for mpc85xx
Rework ipi code to be common across all ppcs
Change PPC to keep curlwp in %r13 while in the kernel.
Move astpending from cpu_info to mdlwp
Improve cpu_need_resched to be more MP friendly.

sync with head

Move powerpc to use pcu to manage FPU/AltiVec/SPE.

sync with head

Use l->l_md.md_utf in preference to trapframe(l).  This shrink the kernel
just a bit in size.

sync with head

Sync with HEAD

Refactor ps_strings access. Based on PK_32, write either the normal
version or the 32bit compat layout in execve1. Introduce a new function
copyin_psstrings for reading it back from userland and converting it to
the native layout. Refactor procfs to share most of the code with the
kern.proc_args sysctl handler.

This material is based upon work partially supported by
The NetBSD Foundation under a contract with Joerg Sonnenberger.

Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.

Add SPE (signal processing engine) support for mpc85xx/booke.  Think of it
as AltiVec-lite (really lite).  Genercize AltiVec support so that it could
the same interface could support SPE as well.  Rework the FPU support along
the same lines.  Move the __asm() to their own XXX_subr.S (altivec, fpu, spe).

Retire struct user, remove sys/user.h inclusions.  Note sys/user.h header
as obsolete.  Remove USER_TO_UAREA/UAREA_TO_USER macros.

Various #include fixes and review by matt@.

Deal with trapframe changes and booke changes.

Some missing sys/device.h dependencies.

- Invent mm_md_getva() and mm_md_relva() routines, provided by MD and
  indicated with __HAVE_MM_MD_PREFER_VA.  It will be used to deal with
  cache aliasing issues and thus fix little MIPS, ARM and friends.

- Convert dev_mem_readwrite() to use unmanaged mappings.  Fix a missed
  offset addition in a case of direct map.  Sprinkle various comments in
  the memory device driver.

- Add missing direct map handling on hp700 and vax.  Make checks across
  m68k ports more consistent, reduce the diffs.  Fix kernacc check miss
  on news68k.  Minor off-by-one fix for alpha.  Add MEMC_PHYS_BASE for
  mmap() case check on acorn26.  Misc clean-up.

Unify /dev/{mem,kmem,zero,null} implementations in MI code.  Based on patch
from Joerg Sonnenberger, proposed on tech-kern@, in February 2008.

Work and depression still in progress.

sync with head

Define kobj_machdep and module_init_md empty functions so that powerpc
kernels (at least macppc) with 'options MODULAR' can be built.

Change u_long to vaddr_t/vsize_t in exec code where appropriate (mostly
involves setregs and vmcmds).  Should result in no code differences.

Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.

sync with head.

Sync with HEAD.

Sync with HEAD.

Merge wrstuden-revivesa into HEAD.

Re-add cpu_upcall() and page fault code. i386 kernels now compile.
They don't boot, but that seems to be a consequence of current from the
day this branch was started.

Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.

Also, kern_sa.c has received partial cleanup. There's still more
to do, though.

sync with HEAD

Sync with HEAD.

sync with head.

Replace as much of the hardcoded CACHELINESIZE with
curcpu()->ci_ci.dcache_line_size as I can.  With this change, an ofppc kernel
compiled with both PPC_OEA and PPC_OEA64_BRIDGE defined, boots.

Rewrite a big chunk of the pmap and locore code for powerpc to better
deal with the 64bit bridge mode.  pmap changes by Matt Thomas, rest by myself.

Change pmap.c to work similar to exec_elf.c to allow us to compile in
multiple pmaps to a single kernel.  This allows the pmap for bridge64 to
co-exist with the 32bit pmap.

Yank __HAVE_PMAP_PHYSSEG from all the oea code.

Add a new global, "oeacpufeat", which is used early in locore to determine
certain cpu features.  This allows us to conditionalize code early in the boot
for certain CPUs that have special needs.

Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was
found in.  Some of it seemed incorrect, and my 7044 booted just fine
without it.  It would appear that the bridge cpus treat BAT instructions
as nops, so they seem to be safe.

In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear
MSR[SF], and ASR[V].

With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64
will boot on the POWERIII-2 cpu.  However, it will not yet boot on a 32bit
cpu, because of CACHELINESIZE.  Work remains to be done there to fix that.

sync with HEAD

Sync with HEAD.

Sync with HEAD.

sync with head

Sync with HEAD.

Sync with HEAD.

Interrupt handling changes, in discussion since February:

- Reduce available SPL levels for hardware devices to none, vm, sched, high.
- Acquire kernel_lock only for interrupts at IPL_VM.
- Implement threaded soft interrupts.

sync with HEAD

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

sync with head.

sync with HEAD

Sync with head.

Sync with HEAD.

Sync with head.

- add booted_device and booted_kernel sysctl nodes to let userland know
  about runtime environment.

sync with head.

Merge newlock2 to head.

Remove support for SA. Ok core@.

sync with head.

Sync with head.

sync with head

in cpu_dumpconf(), don't panic() if we can't bdevsw_lookup() the
dumpdev.  this occurs when we try to set the dumpdev to a device
with no driver loaded.  this fixes PR#34872.

in sys_swapctl, if bdevsw_lookup() fails, set dumpdev = NODEV
before calling cpu_dumpconf().  (this also fixes PR#34872.)

XXX: cpu_dumpconf() should probably be changed to take a dumpdev
XXX: and return an error in such cases, but that is a much more
XXX: intrusive change.

XXX2: this is only run-tested on sparc64 and compile tested on a
XXX2: couple of platforms.

sync with head

sync with head

1st cut of Powermac G5 support (uses bridge mode).

sync with head.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

remove unnecessary extern declaration.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

Clear PSL_SE on a scheduler activation upcall.

Don't add PSL_FE_FDLT to srr1, but put in pcb_flags.  It will be added to
the SRR1 only when the lwp owns the FPU.

Tango on sysctl_createv() and flags.  The flags have all been renamed,
and sysctl_createv() now uses more arguments.

fix an obvious typo which prevented the machdep.cacheinfo table from being
published.
This generated the following warning message at boot time:
sysctl_createv: sysctl_create(cacheinfo) returned 17

Make it compile without PPC_OEA.

Dynamic sysctl.

Gone are the old kern_sysctl(), cpu_sysctl(), hw_sysctl(),
vfs_sysctl(), etc, routines, along with sysctl_int() et al.  Now all
nodes are registered with the tree, and nodes can be added (or
removed) easily, and I/O to and from the tree is handled generically.

Since the nodes are registered with the tree, the mapping from name to
number (and back again) can now be discovered, instead of having to be
hard coded.  Adding new nodes to the tree is likewise much simpler --
the new infrastructure handles almost all the work for simple types,
and just about anything else can be done with a small helper function.

All existing nodes are where they were before (numerically speaking),
so all existing consumers of sysctl information should notice no
difference.

PS - I'm sorry, but there's a distinct lack of documentation at the
moment.  I'm working on sysctl(3/8/9) right now, and I promise to
watch out for buses.

ANSIfy.

__KERNEL_RCSID()

LWP-ify for bebox/GENERIC

Back out the lwp/ktrace changes. They contained a lot of colateral damage,
and need to be examined and discussed more.

'struct proc *' -> 'struct lwp *' as required to get GENERIC for macppc built

Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).

Perform a rototill of the powerpc code.  Mandate use of SPRG0 to store
a pointer to current cpu's cpu_info structure.  Use cpu_info for
intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on
non-MULTIPROCESSOR machines.  Add common macros GET_CPUINFO and
INIT_CPUINFO to get and initialize the cpu_info struct on startup.  Make
ibm4xx use the standard <powerpc/frame.h>.  Use IFRAME_xx in ibm4xx
trap_subr.S instead of explicit magic offsets.  Move INTSTK and SPILLSTK
to std.<platform>.  Change faultbuf to a struct instead of an array.

On MPC6XX cpus, stop using the vector page for temporary space and use
reserved space in cpu_info.

In cpu_upcall, cast to register_t, not int.  (int is not LP64 friendly)

Merge the nathanw_sa branch.

sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work

Catch up to -current.

Merge the gehenna-devsw branch into the trunk.

This merge changes the device switch tables from static array to
dynamically generated by config(8).

- All device switches is defined as a constant structure in device drivers.

- The new grammer ``device-major'' is introduced to ``files''.

	device-major <prefix> char <num> [block <num>] [<rules>]

- All device major numbers must be listed up in port dependent majors.<arch>
  by using this grammer.

- Added the new naming convention.
  The name of the device switch must be <prefix>_[bc]devsw for auto-generation
  of device switch tables.

- The backward compatibility of loading block/character device
  switch by LKM framework is broken. This is necessary to convert
  from block/character device major to device name in runtime and vice versa.

- The restriction to assign device major by LKM is completely removed.
  We don't need to reserve LKM entries for dynamic loading of device switch.

- In compile time, device major numbers list is packed into the kernel and
  the LKM framework will refer it to assign device major number dynamically.

sync kqueue branch with HEAD

Catch up to -current.

catch up with -current.

Invoke upcalls directly, instead of going through a trampoline.
(Since upcalls shouldn't return at all, even the return part of the
trampoline is unnecessary).

Add machdep.powerpc sysctl.  Change the default value of powersave to -1
(< 0 mean no powersave available).  Enable powersave by default for
750/7400/7410 but leave if off for 7450/7455.

catch up with -current.

No longer need to pull in lwp.h; proc.h pulls it in for us.

Peform a rototill over the powerpc-based ports.

Move the trap/vector initialization for MPC6xx ports to mpc6xx_machdep.c
Also move softnet, install_extintr, mapiodev, kvtop.  Add common BAT
initialization code.

Add user Altivec support.

Fix calls to OF_call_method in macppc/macppc/machdep.c.

Use ci_fpuproc in cpu_info instead of separate fpuproc.

Add separate syscall.c and defined __HAVE_SYSCALL_INTERN.

catch up with -current on kqueue branch

Replace the access to devsw table and the hard-coded major with devsw API.

LWPify the changes in setregs().

Catch up to -current.
(CVS: It's not just a program. It's an adventure!)

Allocate space on the stack for struct saframe (the linkage area)
(Accidentally lost this code when switching to thr common upcall code).

Use p->p_psstr instead of PS_STRINGS.
Tested on boot to multi-user on sandpoint.

Catch up with -current.

Add cache_info to cpu_info which provides details about D$ and I$
sizes and line sizes.  This is needed for cache flusing, clearing
memory, and several other operations.  This information is accessible
from userland through a new CPU_CACHEINFO sysctl.

Change type of dumpmag to u_int32_t since it is actually
a 32bit unsigned magic number.
As per discussion on tech-kern, and fixes port-sparc64/11949.

Garbage collect cpu_stashcontext().

Oops, don't delete the declaration of sigcode[] and upcallcode.

Convert to new, smaller cpu_upcall().

Make sure we use the proper stack pointer for signal delivery.

Dress up upcall's callframe correctly.

Update to Current World Order.

Improve upcall to better work with libpthread.

Make some callee space on the stack for the cpu_upcall.

Initial SA support for ppc.  Test-booted on sandpoint, macppc, & walnut.
mcontext and cpu_getmcontext()/cpu_setmcontext() from Klaus Klein
<kleink@netbsd.org>.

Update the kqueue branch to HEAD.

file powerpc_machdep.c was added on branch nathanw_sa on 2001-11-05 19:46:18 +0000

Make all powerpc ports use a common Makefile.powerpc (except walnut)
Enforce -Wmissing-prototypes -Wstrict-prototypes for all ppc ports.
Split out macppc cpu support and make common to mpc6xx ports.  Make
other mpc6xx ports use it.  Add evcnts for mpc6xx traps.

update to -current

auxilliary -> auxiliary

bcopy -> memcpy, bzero -> memset, bcmp -> memcmp.
Reviewed by Matt Thomas, ok'd by Tsubai Masanari.

Fix typo. s/extention/extension/

Sync with HEAD

Catch up with -current.

Regenerate this file from cvs repository in order to get back original
copyright.

add standard NetBSD RCS Id on top

Sync with HEAD.

file powerpc_machdep.c was added on branch thorpej_scsipi on 2001-03-12 13:29:14 +0000

Move cpu_sysct and dump{mag,lo,siz} & cpu_dumpconf to powerpc_machdep.c.
dumpsys is still port-specific for now.  XXX dumpsys is still a stub
on all powerpc ports.

Since setregs is common among all the powerpc ports,
make a common version and put it in powerpc_machdep.c