CVS log for src/sys/arch/powerpc/powerpc/db_interface.c

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Default branch: MAIN

juggle around DDB guarded blocks to make them consistent and make code
build with or without DDB/KGDB options enabled for powerpc.

ddb/db_active.h: New home for extern db_active.

This can be included unconditionally, and db_active can then be
queried unconditionally; if DDB is not in the kernel, then db_active
is a constant zero.  Reduces need for #include opt_ddb.h, #ifdef DDB.

Make ibm4xx kernels compiled by clang.

As clang cannot correctly assemble m[ft]pid:
- for asm sources, use m[ft]spr from/to SPR_PID
- for C sources, use M[FT]PID macros (see include/ibm4xx/spr.h)
This is ugly...

No binary changes for GCC-compiled kernels.

s/Reseting/Resetting/

Sync with HEAD.

Fix all remaining typos, mainly in comments but also in few definitions and log messages, reported by me in PR kern/54889.
Also fixed some additional typos in comments, found on review of same files or typos.

Sync with HEAD.

Sync with HEAD.

G/C misleading <evbppc/tlb.h>. Use <powerpc/ibm4xx/tlb.h> directly.

introduce DDB_END_CMD and replace more than 20 copies of the same
list of NULLs and 0.  idea from rillig@.

all touched ports built, several booted.

Style and cosmetic changes. No binary changes intended.

update from HEAD

Sync with HEAD

ddb MP support

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

One const is good enough.

sync with head

Add a machine splhist command to give (a incomplete) spl history.
(only the most recent are going to be accurate).

splraise(6) from 0 at 549214603
splraise(7) from 6 at 549214643 (+40)
splx(6) from 7 at 549214691 (+48)
splx(0) from 6 at 549214730 (+39)

sync with head

merge to -current.

Need runtime checks for mach mmu command.

Enable XBSEN and HIGHBAT for OEA 7455 and related CPUs.
The BAT entries now have a resolution of 8MB.  (Adjacent entries are merged
up to a total of 2GB per entry).

Remove white-spaces.

Catchup with rmind-uvmplock merge.

cleanup includes (explicit inclusion of <powerpc/psl.h> or <powerpc/userret.h>)

Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>.  Include it
explicitly.

Sync with HEAD.

sync with head

If a CPU has HIGHBAT, then use them.  We dynamically change dsitrap to
select between bats 4-7 when HIGHBAT is detected.

Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.

Add booke support

Sync with HEAD.

sync with head

Adapt to spr.h breakup.

New machine commands for PPC OEA:
bat: prints the BAT registers and translations
mmu: prints MMU registers (sdr1, sr0..15)

Reverted last commit for db_disasm.c and db_inteface.c.
Sorry, erroneously commited them...

Fixed typo: PPC_OEA64_BIRDGE -> PPC_OEA64_BRIDGE

document powerpc ddb commands.  PR#38307.

sync with HEAD

sync with head.

Sync with HEAD.

Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.

Sync with HEAD.

Sync with head.

sync with head.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Sync with head.

Sync with HEAD

Sync with HEAD.

Add a new option DDB_VERBOSE_HELP that adds online help to ddb.
From Adam Hamsik.
Minor modifications by me, all bugs are probably mine.

Add KGDB support to evbppc/virtex port. From Jean-Francois Boudreault,
cosmetics by me.

While there, generalize virtex_console_tag() to virtex_bus_space_tag()
and fix one instance of yamt-idlelwp fallout (ci_need_resched renamed
to ci_want_resched).

XXX Only compile tested since my access to suitable Virtex HW is sporadic
XXX at best.

- sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.

sync with head.

More boolean_t -> bool lossage.

sync with head.

bare asm -> __asm

merge ktrace-lwp.

Sync with HEAD. Here we go again...

Appease -Wcast-qual for the IBM4XX case.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

Nuke register prefix for local variables, clean up indentation a little.

Add code to drop into DDB if you get a DSI fault on the current stack page.

ANSIfy.

Remove db_onpanic check.

__KERNEL_RCSID()

Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).

Perform a rototill of the powerpc code.  Mandate use of SPRG0 to store
a pointer to current cpu's cpu_info structure.  Use cpu_info for
intstk,intr_depth,still_stk,idle_pcb,curpcb,curlwp,etal even on
non-MULTIPROCESSOR machines.  Add common macros GET_CPUINFO and
INIT_CPUINFO to get and initialize the cpu_info struct on startup.  Make
ibm4xx use the standard <powerpc/frame.h>.  Use IFRAME_xx in ibm4xx
trap_subr.S instead of explicit magic offsets.  Move INTSTK and SPILLSTK
to std.<platform>.  Change faultbuf to a struct instead of an array.

On MPC6XX cpus, stop using the vector page for temporary space and use
reserved space in cpu_info.

MPC601 support bits:
* install 601-specific DSI and RUNMODETRC trap handlers
* save/restore MQ in trapframe, add MQ hooks to DDB
* extend battable to 512 entries to hold the 601's 8M translations
* instead of adding I/O to BAT starvation, set up segment registers
  for Memory-Forced I/O Controller Interface Access
* sync after tlbie

Sync with HEAD.

On the IBM 4xx, don't enter DDB on user mode traps.  Fixes
port-powerpc/19662.

Some minor cleanup while here.

Sync with HEAD.

Use Software Single Stepping for now when PPC_IBM4xx is defined. The
existing hardware assisted method doesn't work on this cpu.

Also correct the "I_B" constant in db_machine.h.

Add a range check for the DCR address in db_ppc4xx_dcr().

Add a "machine dcr" command, for the IBM4XX case, which permits
reading/writing of the cpu's DCR registers.

Sync with HEAD.

Use tlbrelo and tlbrehi.

catch up with -current on kqueue branch

Catch up to -current.

Nuke local extern label_t *db_recover;  it's now in <ddb/db_extern.h>

Eliminate commons.

Catch up with -current.

Catch up to -current.

Handle the 601's Run Mode/Trace Exception.

More catchup.

Sync kqueue branch with -current.

Catch up to -current.

add support for kgdb over zs

allow ddb access to lr, ctr, cr and xer registers when not on PPC_IBM4XX

fix single stepping and continuing from breakpoints in ddb

revert revision 1.13
this turns single stepping back off since it doesn't correctly work
note that without single stepping, several things do not work as
expected, including continuing from interrupts

restore msr on return from ddb, this allows single stepping

update to -current

file db_interface.c was added on branch nathanw_sa on 2002-01-08 00:27:11 +0000

bcopy -> memcpy, bzero -> memset, bcmp -> memcmp.
Reviewed by Matt Thomas, ok'd by Tsubai Masanari.

Add a db_active variable that indicates if a call to the debugger is
active.  Seems to be required by the MI com driver nowadays.

Catch up to -current.

Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
 - New pmap and revised trap handler.
 - Support on-chip timers, PCI controller, UARTs
 - Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
 - Add in-kernel PPC floating point emulation
 - New in{,4}_cksum that is between 1.5 and 5 times faster than the
   old version depending on CPU type.
General changes:
 - Kernel support for generic dbsym-style symbols.

Sync with HEAD.

Build with -Wall -Wetc.

Sync with HEAD.

When fatal trap occurs, enter DDB with trapframe rather than just "Debugger()".

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

Sync w/ netbsd-1-5-base.

Make this compile again.

Pull in missing DDB headers.

Pull up to last week's -current.

rename the MD Debugger() to cpu_Debugger()
add MI Debugger() which switches to console if wscons is used prior
to calling cpu_Debugger()

vm_offset_t --> [pv]addr_t

defopt DDB.

Fix layout of powerpc_saved_state; copy in saved MSR.

Import DDB from OpenBSD/powerpc.