CVS log for src/sys/arch/powerpc/include/oea/pmap.h

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Additionally pull up following revision(s) (requested by rin in ticket #400):

	sys/arch/powerpc/include/oea/pmap.h: revision 1.39
	sys/arch/powerpc/include/pmap.h: revision 1.43
	sys/arch/powerpc/oea/pmap_kernel.c: revision 1.14
	sys/arch/powerpc/oea/pmap.c: revision 1.117
	sys/arch/powerpc/oea/pmap.c: revision 1.118
	sys/arch/powerpc/oea/pmap.c: revision 1.119
	sys/arch/powerpc/include/vmparam.h: revision 1.27
	sys/arch/powerpc/powerpc/trap.c: revision 1.165
	sys/arch/powerpc/oea/pmap.c: revision 1.120
	sys/arch/powerpc/oea/pmap.c: revision 1.121
	sys/arch/powerpc/powerpc/vm_machdep.c: revision 1.106
	sys/arch/powerpc/powerpc/bus_dma.c: revision 1.56

powerpc/oea: trap: pmap_{pte,ste}_spill() even in the interrupt context

Page table for oea is something like L2 TLB on memory; kernel and
processes share its entries, and process entries can be spilled out.

As done for MMU based on software-managed TLB, we need to restore
such entries even in the interrupt context.

Note that pmap_pte_spill() require no resouce to restore entries.
Still-not-implemented pmap_ste_spill() for OEA64 should also.
Part of PR kern/57621

powerpc/oea: pmap: Drop unused argument for pmap_pvo_reclaim(), NFC
Part of PR kern/57621

powerpc/oea: pmap: Rework pmap_pte_spill()

It was broken in many ways... Now, it gets working stable both for
OEA and OEA64_BRIDGE, as far as I can see.
Part of PR kern/57621

powerpc/oea: pmap: Fix mostly-pointless overhead of pmap_pvo_pool
(1) Drop __aligned(32) from struct pvo_entry; otherwise,
    sizeof(struct pvo_entry) is round-up'ed to a multiple of 32.
(2) Do not set sizeof(struct pvo_entry) to `align` argument for
    pool_init(9); it must be power of 2.
(3) Align pvo_entry to 32-byte boundary only if reasonably possible,
    i.e., OEA without DIAGNOSTIC (--> POOL_REDZONE) for now.
Part of PR kern/57621

powerpc/oea: pmap_create: Use PR_ZERO and drop memset(9), NFC
Part of PR kern/57621

powerpc: oea: For OEA64_BRIDGE, 1:1 map up to 3GiB memory
As done for OEA. Note that kva over 3GiB is reserved.

Provide PMAP_MAP_POOLPAGE for OEA64_BRIDGE at the same time, by
which direct-mapped memory is utilized in order to work around
starvation of 512MiB kernel virtual space.
PR kern/57621

powerpc: Make sure direct-mapped buffer fits within correct range

For OEA and OEA64_BRIDGE, only first 3GiB memory is direct-mapped.
Part of PR kern/57621

powerpc: oea: For OEA64_BRIDGE, 1:1 map up to 3GiB memory

As done for OEA. Note that kva over 3GiB is reserved.

Provide PMAP_MAP_POOLPAGE for OEA64_BRIDGE at the same time, by
which direct-mapped memory is utilized in order to work around
starvation of 512MiB kernel virtual space.

PR kern/57621

Trailing whitespace.

Try to fix PV tracking support.

* For oea (with real PV tracking support):

  Define __HAVE_PMAP_PV_TRACK. Otherwise, pmap_pv_init() is not called by
  uvm_init().

* For booke and ibm4xx (without PV tracking support):

  For MODULAR kernel and modules, define __HAVE_PMAP_PV_TRACK together with
  PMAP_PV_TRACK_ONLY_STUBS, so that modules can be shared with oea.

Note that PMAP_PV_TRACK_ONLY_STUBS can be used even for oea,
as a compile-time option to strip real PV tracking support.

powerpc: Implement pv-tracking for unmanaged pages.

Needed for drm.

Sync with HEAD.

Re-factor the code in pmap_extract() that checks the 601 I/O segment
table and the BAT tables into separate functions that can be called
from outside of the pmap module.

Complete the pmap symbol renaming shenanigans for pmap_bootstrap[12]().

Split pmap_bootstrap() into 2 functions:
- pmap_bootstrap1(), which sets up the low-level pmap data structures.
- pmap_bootstrap2(), which actually programs the MMU hardware based on
  pmap_bootstrap1()'s work.

pmap_bootstrap() is still provided as a wrapper around the two, but this
provides flexibility to platforms that might need to do additional work
between these two phases.

Include missing opt_modular.h so that struct vm_page_md is compatible to
that for booke.

LKM was gone.

Merge changes from current as of 20200406

pmap_remove_all(): Return a boolean value to indicate the behaviour.  If
true, all mappings have been removed, the pmap is totally cleared out, and
UVM can then avoid doing the work to call pmap_remove() for each map entry.
If false, either nothing has been done, or some helpful arch-specific voodoo
has taken place.

Sync with HEAD

s/static inline/static __inline/g for consistency.

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Add pmap_ste_spill

sync with head

Fix -fno-common fallout.

Modify *ASSERTMSG() so they are now used as variadic macros. The main goal
is to provide routines that do as KASSERT(9) says: append a message
to the panic format string when the assertion triggers, with optional
arguments.

Fix call sites to reflect the new definition.

Discussed on tech-kern@. See
http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html

Modify mapiodev to take a third argument indicating whether the space
should be prefetchable (true) or not (false).

Catchup with rmind-uvmplock merge.

PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h
when building a MODULAR kernel or compiling _MODULE.
It should be noted that MODULAR or _MODULE export a view of the kernel
as being MULTIPROCESSOR (even if isn't).
The shared pmap TLB uses mdpg in places where it used mdpg to avoid
deadly embrance inclusion problems.

Add #error for unknown PPC variant
Now that oea calls cpu_fixup_stubs, we don't need pmap_fixup_stubs.

Sync with HEAD.

sync with head

Sync with HEAD

implement pmap_mmap_flags() and teach PowerPC's bus_space_mmap() to actually
use BUS_SPACE_MAP_PREFETCHABLE which, now that /dev/pci* knows how to use it,
helps improve X performance

When an OEA kernel is configured for multiple MMU types, use the new
powerpc fixup mechanism to bind the kernel to a particular MMU.  This
avoids an indirect call for every pmap call.

Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.

PMAP_NC -> PMAP_NOCACHE.

Move struct vm_page_md definition from vmparam.h to pmap.h, because
it's used only by pmap.  vmparam.h has definitions for wider
audience.

All GENERIC kernels build tested, except ia64.

powerpc/include/booke/vmparam.h has one too, but it has no pmap.h,
so it's left as is.

sync with head

Add a flags argument to pmap_kenter_pa(9).
Patch showed on tech-kern@ http://mail-index.netbsd.org/tech-kern/2009/11/04/msg006434.html
No objections.

Remove uarea swap-out functionality:

- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code.  Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.

Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).

Discussed on <tech-kern>, reviewed by <ad>.

Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.

sync with head.

Sync with HEAD.

change pmap flags argument from int to u_int.
discussed with christos@ on source-changes-d@

Sync with HEAD.

Sync with HEAD.

Wrap #include "opt_ppcarch.h" in #ifdef _KERNEL_OPT, to allow
lib/librump to build for evbppc.

Update haad-dm branch to haad-dm-base2.

Make pmap_kernel() a MI macro for struct pmap *kernel_pmap_ptr,
which is now the "API" provided by the pmap module.  pmap_kernel()
remains as the syntactic sugar.

Bonus cosmetics round: move all the pmap_t pointer typedefs into
uvm_pmap.h.

Thanks to Greg Oster for providing cpu muscle for doing test builds.

sync with HEAD

Sync with HEAD.

sync with head.

Cleanup/simplify #if/#endif

Rewrite a big chunk of the pmap and locore code for powerpc to better
deal with the 64bit bridge mode.  pmap changes by Matt Thomas, rest by myself.

Change pmap.c to work similar to exec_elf.c to allow us to compile in
multiple pmaps to a single kernel.  This allows the pmap for bridge64 to
co-exist with the 32bit pmap.

Yank __HAVE_PMAP_PHYSSEG from all the oea code.

Add a new global, "oeacpufeat", which is used early in locore to determine
certain cpu features.  This allows us to conditionalize code early in the boot
for certain CPUs that have special needs.

Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was
found in.  Some of it seemed incorrect, and my 7044 booted just fine
without it.  It would appear that the bridge cpus treat BAT instructions
as nops, so they seem to be safe.

In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear
MSR[SF], and ASR[V].

With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64
will boot on the POWERIII-2 cpu.  However, it will not yet boot on a 32bit
cpu, because of CACHELINESIZE.  Work remains to be done there to fix that.

sync with head

Sync with HEAD

When compiling in bridge mode, add a prototype for pmap_setup_segment0_map()

- sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.

sync with head.

Replace the Mach-derived boolean_t type with the C99 bool type.  A
future commit will replace use of TRUE and FALSE with true and false.

sync with head.

sync with head

sync with head

1st cut of Powermac G5 support (uses bridge mode).

sync with head.

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

More PPC64 changes.  (latent for now).

add support for non-executable mappings (where the hardware allows this)
and make the stack and heap non-executable by default.  the changes
fall into two basic catagories:

 - pmap and trap-handler changes.  these are all MD:
   = alpha: we already track per-page execute permission with the (software)
	PG_EXEC bit, so just have the trap handler pay attention to it.
   = i386: use a new GDT segment for %cs for processes that have no
	executable mappings above a certain threshold (currently the
	bottom of the stack).  track per-page execute permission with
	the last unused PTE bit.
   = powerpc/ibm4xx: just use the hardware exec bit.
   = powerpc/oea: we already track per-page exec bits, but the hardware only
	implements non-exec mappings at the segment level.  so track the
	number of executable mappings in each segment and turn on the no-exec
	segment bit iff the count is 0.  adjust the trap handler to deal.
   = sparc (sun4m): fix our use of the hardware protection bits.
	fix the trap handler to recognize text faults.
   = sparc64: split the existing unified TSB into data and instruction TSBs,
	and only load TTEs into the appropriate TSB(s) for the permissions.
	fix the trap handler to check for execute permission.
   = not yet implemented: amd64, hppa, sh5

 - changes in all the emulations that put a signal trampoline on the stack.
   instead, we now put the trampoline into a uvm_aobj and map that into
   the process separately.

originally from openbsd, adapted for netbsd by me.

Add POOL_VTOPHYS.  Change vtophys to return -1 if pmap_extract fails.
(callers of vtophys should always supply a valid VA so that
pmap_extract should never fail).

Make lint happy.

Make things a bit more LP64 friendly.

Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).