Annotation of src/sys/arch/powerpc/include/cpu.h, Revision 1.89
1.89 ! kiyohara 1: /* $NetBSD: cpu.h,v 1.88 2011/06/30 00:52:59 matt Exp $ */
1.1 ws 2:
3: /*
1.5 ws 4: * Copyright (C) 1999 Wolfgang Solfrank.
5: * Copyright (C) 1999 TooLs GmbH.
1.9 matt 6: * Copyright (C) 1995-1997 Wolfgang Solfrank.
7: * Copyright (C) 1995-1997 TooLs GmbH.
1.1 ws 8: * All rights reserved.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by TooLs GmbH.
21: * 4. The name of TooLs GmbH may not be used to endorse or promote products
22: * derived from this software without specific prior written permission.
23: *
24: * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
25: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27: * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28: * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
29: * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
30: * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31: * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32: * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33: * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34: */
1.5 ws 35: #ifndef _POWERPC_CPU_H_
36: #define _POWERPC_CPU_H_
1.1 ws 37:
1.27 matt 38: struct cache_info {
39: int dcache_size;
40: int dcache_line_size;
41: int icache_size;
42: int icache_line_size;
43: };
44:
1.73 phx 45: #if defined(_KERNEL) || defined(_KMEMUSER)
1.9 matt 46: #if defined(_KERNEL_OPT)
47: #include "opt_lockdebug.h"
1.83 matt 48: #include "opt_modular.h"
1.9 matt 49: #include "opt_multiprocessor.h"
1.16 matt 50: #include "opt_ppcarch.h"
1.9 matt 51: #endif
52:
1.73 phx 53: #ifdef _KERNEL
1.9 matt 54: #include <machine/intr.h>
1.72 uebayasi 55: #include <sys/device_if.h>
56: #include <sys/evcnt.h>
1.73 phx 57: #endif
1.9 matt 58:
1.42 yamt 59: #include <sys/cpu_data.h>
1.14 eeh 60:
1.9 matt 61: struct cpu_info {
1.42 yamt 62: struct cpu_data ci_data; /* MI per-cpu data */
1.73 phx 63: #ifdef _KERNEL
1.74 matt 64: device_t ci_dev; /* device of corresponding cpu */
65: struct cpu_softc *ci_softc; /* private cpu info */
1.23 thorpej 66: struct lwp *ci_curlwp; /* current owner of the processor */
1.9 matt 67:
68: struct pcb *ci_curpcb;
1.38 matt 69: struct pmap *ci_curpm;
1.80 matt 70: struct lwp *ci_softlwps[SOFTINT_COUNT];
1.77 matt 71: int ci_cpuid; /* from SPR_PIR */
1.9 matt 72:
1.57 rjs 73: int ci_want_resched;
1.74 matt 74: volatile uint64_t ci_lastintr;
1.28 matt 75: volatile u_long ci_lasttb;
76: volatile int ci_tickspending;
1.50 freza 77: volatile int ci_cpl;
78: volatile int ci_iactive;
1.60 ad 79: volatile int ci_idepth;
1.84 matt 80: union {
81: #if !defined(PPC_BOOKE) && !defined(_MODULE)
82: volatile imask_t un1_ipending;
83: #define ci_ipending ci_un1.un1_ipending
1.74 matt 84: #endif
1.84 matt 85: uint64_t un1_pad64;
86: } ci_un1;
1.77 matt 87: volatile uint32_t ci_pending_ipis;
1.53 ad 88: int ci_mtx_oldspl;
89: int ci_mtx_count;
1.84 matt 90: #if defined(PPC_IBM4XX) || defined(MODULAR) || defined(_MODULE)
1.9 matt 91: char *ci_intstk;
1.68 matt 92: #endif
1.84 matt 93: #define CI_SAVETEMP (0*CPUSAVE_LEN)
94: #define CI_SAVEDDB (1*CPUSAVE_LEN)
95: #define CI_SAVEIPKDB (2*CPUSAVE_LEN)
96: #define CI_SAVEMMU (3*CPUSAVE_LEN)
97: #define CI_SAVEMAX (4*CPUSAVE_LEN)
1.32 matt 98: #define CPUSAVE_LEN 8
1.84 matt 99: #if !defined(PPC_BOOKE) && !defined(MODULAR) && !defined(_MODULE)
100: #define CPUSAVE_SIZE (CI_SAVEMAX*CPUSAVE_LEN)
101: #else
102: #define CPUSAVE_SIZE 128
103: #endif
1.32 matt 104: #define CPUSAVE_R28 0 /* where r28 gets saved */
105: #define CPUSAVE_R29 1 /* where r29 gets saved */
106: #define CPUSAVE_R30 2 /* where r30 gets saved */
107: #define CPUSAVE_R31 3 /* where r31 gets saved */
1.84 matt 108: #define CPUSAVE_DEAR 4 /* where IBM4XX SPR_DEAR gets saved */
109: #define CPUSAVE_DAR 4 /* where OEA SPR_DAR gets saved */
110: #define CPUSAVE_ESR 5 /* where IBM4XX SPR_ESR gets saved */
111: #define CPUSAVE_DSISR 5 /* where OEA SPR_DSISR gets saved */
1.74 matt 112: #define CPUSAVE_SRR0 6 /* where SRR0 gets saved */
113: #define CPUSAVE_SRR1 7 /* where SRR1 gets saved */
1.84 matt 114: register_t ci_savearea[CPUSAVE_SIZE];
115: #if defined(PPC_BOOKE) || defined(MODULAR) || defined(_MODULE)
1.86 matt 116: uint32_t ci_pmap_asid_cur;
1.74 matt 117: struct pmap_segtab *ci_pmap_segtabs[2];
118: #define ci_pmap_kern_segtab ci_pmap_segtabs[0]
119: #define ci_pmap_user_segtab ci_pmap_segtabs[1]
120: struct pmap_tlb_info *ci_tlb_info;
1.84 matt 121: #endif /* PPC_BOOKE || MODULAR || _MODULE */
1.14 eeh 122: struct cache_info ci_ci;
1.40 matt 123: void *ci_sysmon_cookie;
1.43 matt 124: void (*ci_idlespin)(void);
1.44 briggs 125: uint32_t ci_khz;
1.25 matt 126: struct evcnt ci_ev_clock; /* clock intrs */
1.50 freza 127: struct evcnt ci_ev_statclock; /* stat clock */
1.9 matt 128: struct evcnt ci_ev_traps; /* calls to trap() */
129: struct evcnt ci_ev_kdsi; /* kernel DSI traps */
130: struct evcnt ci_ev_udsi; /* user DSI traps */
131: struct evcnt ci_ev_udsi_fatal; /* user DSI trap failures */
1.33 matt 132: struct evcnt ci_ev_kisi; /* kernel ISI traps */
1.9 matt 133: struct evcnt ci_ev_isi; /* user ISI traps */
134: struct evcnt ci_ev_isi_fatal; /* user ISI trap failures */
135: struct evcnt ci_ev_pgm; /* user PGM traps */
1.75 matt 136: struct evcnt ci_ev_debug; /* user debug traps */
1.9 matt 137: struct evcnt ci_ev_fpu; /* FPU traps */
138: struct evcnt ci_ev_fpusw; /* FPU context switch */
139: struct evcnt ci_ev_ali; /* Alignment traps */
140: struct evcnt ci_ev_ali_fatal; /* Alignment fatal trap */
141: struct evcnt ci_ev_scalls; /* system call traps */
142: struct evcnt ci_ev_vec; /* Altivec traps */
143: struct evcnt ci_ev_vecsw; /* Altivec context switches */
1.16 matt 144: struct evcnt ci_ev_umchk; /* user MCHK events */
1.59 garbled 145: struct evcnt ci_ev_ipi; /* IPIs received */
1.74 matt 146: struct evcnt ci_ev_tlbmiss_soft; /* tlb miss (no trap) */
147: struct evcnt ci_ev_dtlbmiss_hard; /* data tlb miss (trap) */
148: struct evcnt ci_ev_itlbmiss_hard; /* instruction tlb miss (trap) */
1.73 phx 149: #endif /* _KERNEL */
1.9 matt 150: };
1.73 phx 151: #endif /* _KERNEL || _KMEMUSER */
152:
153: #ifdef _KERNEL
1.9 matt 154:
1.83 matt 155: #if defined(MULTIPROCESSOR) && !defined(_MODULE)
1.59 garbled 156: struct cpu_hatch_data {
1.87 matt 157: int hatch_running;
158: device_t hatch_self;
159: struct cpu_info *hatch_ci;
160: uint32_t hatch_tbu;
161: uint32_t hatch_tbl;
162: uint32_t hatch_hid0;
163: uint32_t hatch_pir;
164: #if defined(PPC_OEA) || defined(PPC_OEA64_BRIDGE)
165: uintptr_t hatch_asr;
166: uintptr_t hatch_sdr1;
167: uint32_t hatch_sr[16];
168: uintptr_t hatch_batu[8], hatch_batl[8];
169: #endif
170: #if defined(PPC_BOOKE)
171: vaddr_t hatch_sp;
172: #endif
173: };
174:
175: struct cpuset_info {
176: __cpuset_t cpus_running;
177: __cpuset_t cpus_hatched;
178: __cpuset_t cpus_paused;
179: __cpuset_t cpus_resumed;
180: __cpuset_t cpus_halted;
1.59 garbled 181: };
1.87 matt 182:
183: extern volatile struct cpuset_info cpuset_info;
1.83 matt 184: #endif /* MULTIPROCESSOR && !_MODULE */
1.59 garbled 185:
1.83 matt 186: #if defined(MULTIPROCESSOR) || defined(_MODULE)
187: #define cpu_number() (curcpu()->ci_index + 0)
1.9 matt 188:
189: #define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0)
1.83 matt 190: #define CPU_INFO_ITERATOR int
191: #define CPU_INFO_FOREACH(cii, ci) \
1.64 garbled 192: cii = 0, ci = &cpu_info[0]; cii < ncpu; cii++, ci++
1.18 chs 193:
1.9 matt 194: #else
195: #define cpu_number() 0
196:
1.83 matt 197: #define CPU_IS_PRIMARY(ci) true
198: #define CPU_INFO_ITERATOR int
199: #define CPU_INFO_FOREACH(cii, ci) \
1.18 chs 200: cii = 0, ci = curcpu(); ci != NULL; ci = NULL
201:
1.83 matt 202: #endif /* MULTIPROCESSOR || _MODULE */
1.9 matt 203:
1.25 matt 204: extern struct cpu_info cpu_info[];
205:
1.77 matt 206: static __inline struct cpu_info * curcpu(void) __pure;
1.47 perry 207: static __inline struct cpu_info *
1.25 matt 208: curcpu(void)
209: {
210: struct cpu_info *ci;
211:
1.78 matt 212: __asm volatile ("mfsprg0 %0" : "=r"(ci));
1.25 matt 213: return ci;
214: }
215:
1.77 matt 216: register struct lwp *powerpc_curlwp __asm("r13");
217: #define curlwp powerpc_curlwp
1.25 matt 218: #define curpcb (curcpu()->ci_curpcb)
1.38 matt 219: #define curpm (curcpu()->ci_curpm)
1.25 matt 220:
1.47 perry 221: static __inline register_t
1.18 chs 222: mfmsr(void)
223: {
1.20 matt 224: register_t msr;
1.18 chs 225:
1.46 perry 226: __asm volatile ("mfmsr %0" : "=r"(msr));
1.18 chs 227: return msr;
228: }
229:
1.47 perry 230: static __inline void
1.20 matt 231: mtmsr(register_t msr)
1.18 chs 232: {
1.74 matt 233: //KASSERT(msr & PSL_CE);
234: //KASSERT(msr & PSL_DE);
1.46 perry 235: __asm volatile ("mtmsr %0" : : "r"(msr));
1.19 chs 236: }
237:
1.84 matt 238: #if !defined(_MODULE)
1.47 perry 239: static __inline uint32_t
1.19 chs 240: mftbl(void)
241: {
242: uint32_t tbl;
243:
1.46 perry 244: __asm volatile (
1.29 hannken 245: #ifdef PPC_IBM403
1.74 matt 246: " mftblo %[tbl]" "\n"
247: #elif defined(PPC_BOOKE)
248: " mfspr %[tbl],268" "\n"
1.29 hannken 249: #else
1.74 matt 250: " mftbl %[tbl]" "\n"
1.29 hannken 251: #endif
1.74 matt 252: : [tbl] "=r" (tbl));
1.29 hannken 253:
1.19 chs 254: return tbl;
255: }
256:
1.47 perry 257: static __inline uint64_t
1.19 chs 258: mftb(void)
259: {
260: uint64_t tb;
1.32 matt 261:
262: #ifdef _LP64
1.46 perry 263: __asm volatile ("mftb %0" : "=r"(tb));
1.32 matt 264: #else
1.19 chs 265: int tmp;
266:
1.46 perry 267: __asm volatile (
1.29 hannken 268: #ifdef PPC_IBM403
1.74 matt 269: "1: mftbhi %[tb]" "\n"
270: " mftblo %L[tb]" "\n"
271: " mftbhi %[tmp]" "\n"
272: #elif defined(PPC_BOOKE)
273: "1: mfspr %[tb],269" "\n"
274: " mfspr %L[tb],268" "\n"
275: " mfspr %[tmp],269" "\n"
1.29 hannken 276: #else
1.74 matt 277: "1: mftbu %[tb]" "\n"
278: " mftb %L[tb]" "\n"
279: " mftbu %[tmp]" "\n"
280: #endif
281: " cmplw %[tb],%[tmp]" "\n"
282: " bne- 1b" "\n"
283: : [tb] "=r" (tb), [tmp] "=r"(tmp)
284: :: "cr0");
1.32 matt 285: #endif
1.29 hannken 286:
1.19 chs 287: return tb;
1.24 kleink 288: }
289:
1.47 perry 290: static __inline uint32_t
1.24 kleink 291: mfrtcl(void)
292: {
293: uint32_t rtcl;
294:
1.46 perry 295: __asm volatile ("mfrtcl %0" : "=r"(rtcl));
1.24 kleink 296: return rtcl;
297: }
298:
1.47 perry 299: static __inline void
1.24 kleink 300: mfrtc(uint32_t *rtcp)
301: {
302: uint32_t tmp;
303:
1.46 perry 304: __asm volatile (
1.74 matt 305: "1: mfrtcu %[rtcu]" "\n"
306: " mfrtcl %[rtcl]" "\n"
307: " mfrtcu %[tmp]" "\n"
308: " cmplw %[rtcu],%[tmp]" "\n"
309: " bne- 1b"
310: : [rtcu] "=r"(rtcp[0]), [rtcl] "=r"(rtcp[1]), [tmp] "=r"(tmp)
311: :: "cr0");
1.19 chs 312: }
1.84 matt 313: #endif /* !_MODULE */
1.19 chs 314:
1.47 perry 315: static __inline uint32_t
1.19 chs 316: mfpvr(void)
317: {
318: uint32_t pvr;
319:
1.46 perry 320: __asm volatile ("mfpvr %0" : "=r"(pvr));
1.19 chs 321: return (pvr);
1.18 chs 322: }
323:
1.84 matt 324: #ifdef _MODULE
325: extern const char __CPU_MAXNUM;
326: /*
327: * Make with 0xffff to force a R_PPC_ADDR16_LO without the
328: * corresponding R_PPC_ADDR16_HI relocation.
329: */
330: #define CPU_MAXNUM (((uintptr_t)&__CPU_MAXNUM)&0xffff)
331: #endif /* _MODULE */
332:
1.83 matt 333: #if !defined(_MODULE)
1.9 matt 334: extern int powersave;
335: extern int cpu_timebase;
336: extern int cpu_printfataltraps;
1.16 matt 337: extern char cpu_model[];
338:
1.83 matt 339: struct cpu_info *
340: cpu_attach_common(device_t, int);
341: void cpu_setup(device_t, struct cpu_info *);
342: void cpu_identify(char *, size_t);
343: void cpu_probe_cache(void);
1.85 matt 344:
1.83 matt 345: void dcache_wb_page(vaddr_t);
346: void dcache_wbinv_page(vaddr_t);
347: void dcache_inv_page(vaddr_t);
348: void dcache_zero_page(vaddr_t);
349: void icache_inv_page(vaddr_t);
350: void dcache_wb(vaddr_t, vsize_t);
351: void dcache_wbinv(vaddr_t, vsize_t);
352: void dcache_inv(vaddr_t, vsize_t);
353: void icache_inv(vaddr_t, vsize_t);
1.85 matt 354:
1.88 matt 355: void * mapiodev(paddr_t, psize_t, bool);
1.83 matt 356: void unmapiodev(vaddr_t, vsize_t);
1.9 matt 357:
1.59 garbled 358: #ifdef MULTIPROCESSOR
1.83 matt 359: int md_setup_trampoline(volatile struct cpu_hatch_data *,
360: struct cpu_info *);
361: void md_presync_timebase(volatile struct cpu_hatch_data *);
362: void md_start_timebase(volatile struct cpu_hatch_data *);
363: void md_sync_timebase(volatile struct cpu_hatch_data *);
364: void md_setup_interrupts(void);
365: int cpu_spinup(device_t, struct cpu_info *);
366: register_t
367: cpu_hatch(void);
368: void cpu_spinup_trampoline(void);
369: void cpu_boot_secondary_processors(void);
370: #endif /* MULTIPROCESSOR */
371: #endif /* !_MODULE */
372:
373: #define cpu_proc_fork(p1, p2)
1.59 garbled 374:
1.9 matt 375: #define DELAY(n) delay(n)
1.83 matt 376: void delay(unsigned int);
377:
378: #define CLKF_USERMODE(cf) cpu_clkf_usermode(cf)
379: #define CLKF_PC(cf) cpu_clkf_pc(cf)
380: #define CLKF_INTR(cf) cpu_clkf_intr(cf)
381:
382: bool cpu_clkf_usermode(const struct clockframe *);
383: vaddr_t cpu_clkf_pc(const struct clockframe *);
384: bool cpu_clkf_intr(const struct clockframe *);
385:
386: #define LWP_PC(l) cpu_lwp_pc(l)
387:
388: vaddr_t cpu_lwp_pc(struct lwp *);
1.9 matt 389:
1.86 matt 390: void cpu_ast(struct lwp *, struct cpu_info *);
1.79 matt 391: void * cpu_uarea_alloc(bool);
392: bool cpu_uarea_free(void *);
1.77 matt 393: void cpu_need_resched(struct cpu_info *, int);
394: void cpu_signotify(struct lwp *);
395: void cpu_need_proftick(struct lwp *);
396: #define cpu_did_resched(l) ((l)->l_md.md_astpending = 0)
1.9 matt 397:
1.81 matt 398: void cpu_fixup_stubs(void);
399:
1.83 matt 400: #if !defined(PPC_IBM4XX) && !defined(PPC_BOOKE) && !defined(_MODULE)
1.85 matt 401: int cpu_get_dfs(void);
402: void cpu_set_dfs(int);
403:
1.83 matt 404: void oea_init(void (*)(void));
405: void oea_startup(const char *);
406: void oea_dumpsys(void);
407: void oea_install_extint(void (*)(void));
1.89 ! kiyohara 408: paddr_t kvtop(void *);
1.16 matt 409:
410: extern paddr_t msgbuf_paddr;
411: extern int cpu_altivec;
412: #endif
413:
1.9 matt 414: #endif /* _KERNEL */
415:
1.61 garbled 416: /* XXX The below breaks unified pmap on ppc32 */
417:
1.83 matt 418: #if !defined(CACHELINESIZE) && !defined(_MODULE) \
419: && (defined(_KERNEL) || defined(_STANDALONE))
420: #if defined(PPC_IBM403)
1.62 garbled 421: #define CACHELINESIZE 16
422: #define MAXCACHELINESIZE 16
1.83 matt 423: #elif defined (PPC_OEA64_BRIDGE)
1.62 garbled 424: #define CACHELINESIZE 128
425: #define MAXCACHELINESIZE 128
1.51 sanjayl 426: #else
1.62 garbled 427: #define CACHELINESIZE 32
428: #define MAXCACHELINESIZE 32
1.51 sanjayl 429: #endif /* PPC_OEA64_BRIDGE */
1.29 hannken 430: #endif
1.10 matt 431:
1.83 matt 432: void __syncicache(void *, size_t);
1.14 eeh 433:
1.5 ws 434: /*
435: * CTL_MACHDEP definitions.
436: */
1.9 matt 437: #define CPU_CACHELINE 1
438: #define CPU_TIMEBASE 2
439: #define CPU_CPUTEMP 3
440: #define CPU_PRINTFATALTRAPS 4
1.14 eeh 441: #define CPU_CACHEINFO 5
1.16 matt 442: #define CPU_ALTIVEC 6
443: #define CPU_MODEL 7
1.58 nisimura 444: #define CPU_POWERSAVE 8 /* int: use CPU powersave mode */
445: #define CPU_BOOTED_DEVICE 9 /* string: device we booted from */
446: #define CPU_BOOTED_KERNEL 10 /* string: kernel we booted */
447: #define CPU_MAXID 11 /* number of valid machdep ids */
1.1 ws 448:
1.5 ws 449: #endif /* _POWERPC_CPU_H_ */
CVSweb <webmaster@jp.NetBSD.org>
![[BACK]](/icons/back.gif){kind=icon}
Return to cpu.h CVS log ![[TXT]](/icons/text.gif){kind=icon}
![[DIR]](/icons/dir.gif){kind=icon}
Up to [cvs.NetBSD.org] / src / sys / arch / powerpc / include