Annotation of src/sys/arch/powerpc/include/cpu.h, Revision 1.103.2.4
1.103.2.4! pgoyette 1: /* $NetBSD: cpu.h,v 1.107 2018/07/15 05:16:44 maxv Exp $ */
1.1 ws 2:
3: /*
1.5 ws 4: * Copyright (C) 1999 Wolfgang Solfrank.
5: * Copyright (C) 1999 TooLs GmbH.
1.9 matt 6: * Copyright (C) 1995-1997 Wolfgang Solfrank.
7: * Copyright (C) 1995-1997 TooLs GmbH.
1.1 ws 8: * All rights reserved.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by TooLs GmbH.
21: * 4. The name of TooLs GmbH may not be used to endorse or promote products
22: * derived from this software without specific prior written permission.
23: *
24: * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
25: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27: * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28: * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
29: * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
30: * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31: * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
32: * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
33: * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34: */
1.103 chs 35:
1.5 ws 36: #ifndef _POWERPC_CPU_H_
37: #define _POWERPC_CPU_H_
1.1 ws 38:
1.27 matt 39: struct cache_info {
40: int dcache_size;
41: int dcache_line_size;
42: int icache_size;
43: int icache_line_size;
44: };
45:
1.73 phx 46: #if defined(_KERNEL) || defined(_KMEMUSER)
1.9 matt 47: #if defined(_KERNEL_OPT)
48: #include "opt_lockdebug.h"
1.83 matt 49: #include "opt_modular.h"
1.9 matt 50: #include "opt_multiprocessor.h"
1.16 matt 51: #include "opt_ppcarch.h"
1.9 matt 52: #endif
53:
1.73 phx 54: #ifdef _KERNEL
1.102 nonaka 55: #include <sys/intr.h>
1.72 uebayasi 56: #include <sys/device_if.h>
57: #include <sys/evcnt.h>
1.103 chs 58: #include <sys/param.h>
59: #include <sys/kernel.h>
1.73 phx 60: #endif
1.9 matt 61:
1.42 yamt 62: #include <sys/cpu_data.h>
1.14 eeh 63:
1.9 matt 64: struct cpu_info {
1.42 yamt 65: struct cpu_data ci_data; /* MI per-cpu data */
1.73 phx 66: #ifdef _KERNEL
1.74 matt 67: device_t ci_dev; /* device of corresponding cpu */
68: struct cpu_softc *ci_softc; /* private cpu info */
1.23 thorpej 69: struct lwp *ci_curlwp; /* current owner of the processor */
1.9 matt 70:
71: struct pcb *ci_curpcb;
1.38 matt 72: struct pmap *ci_curpm;
1.80 matt 73: struct lwp *ci_softlwps[SOFTINT_COUNT];
1.77 matt 74: int ci_cpuid; /* from SPR_PIR */
1.9 matt 75:
1.57 rjs 76: int ci_want_resched;
1.74 matt 77: volatile uint64_t ci_lastintr;
1.28 matt 78: volatile u_long ci_lasttb;
79: volatile int ci_tickspending;
1.50 freza 80: volatile int ci_cpl;
81: volatile int ci_iactive;
1.60 ad 82: volatile int ci_idepth;
1.84 matt 83: union {
84: #if !defined(PPC_BOOKE) && !defined(_MODULE)
85: volatile imask_t un1_ipending;
86: #define ci_ipending ci_un1.un1_ipending
1.74 matt 87: #endif
1.84 matt 88: uint64_t un1_pad64;
89: } ci_un1;
1.77 matt 90: volatile uint32_t ci_pending_ipis;
1.53 ad 91: int ci_mtx_oldspl;
92: int ci_mtx_count;
1.84 matt 93: #if defined(PPC_IBM4XX) || defined(MODULAR) || defined(_MODULE)
1.9 matt 94: char *ci_intstk;
1.68 matt 95: #endif
1.84 matt 96: #define CI_SAVETEMP (0*CPUSAVE_LEN)
97: #define CI_SAVEDDB (1*CPUSAVE_LEN)
1.103.2.4! pgoyette 98: #define CI_SAVEIPKDB (2*CPUSAVE_LEN) /* obsolete */
1.84 matt 99: #define CI_SAVEMMU (3*CPUSAVE_LEN)
100: #define CI_SAVEMAX (4*CPUSAVE_LEN)
1.32 matt 101: #define CPUSAVE_LEN 8
1.84 matt 102: #if !defined(PPC_BOOKE) && !defined(MODULAR) && !defined(_MODULE)
103: #define CPUSAVE_SIZE (CI_SAVEMAX*CPUSAVE_LEN)
104: #else
105: #define CPUSAVE_SIZE 128
106: #endif
1.32 matt 107: #define CPUSAVE_R28 0 /* where r28 gets saved */
108: #define CPUSAVE_R29 1 /* where r29 gets saved */
109: #define CPUSAVE_R30 2 /* where r30 gets saved */
110: #define CPUSAVE_R31 3 /* where r31 gets saved */
1.84 matt 111: #define CPUSAVE_DEAR 4 /* where IBM4XX SPR_DEAR gets saved */
112: #define CPUSAVE_DAR 4 /* where OEA SPR_DAR gets saved */
113: #define CPUSAVE_ESR 5 /* where IBM4XX SPR_ESR gets saved */
114: #define CPUSAVE_DSISR 5 /* where OEA SPR_DSISR gets saved */
1.74 matt 115: #define CPUSAVE_SRR0 6 /* where SRR0 gets saved */
116: #define CPUSAVE_SRR1 7 /* where SRR1 gets saved */
1.84 matt 117: register_t ci_savearea[CPUSAVE_SIZE];
118: #if defined(PPC_BOOKE) || defined(MODULAR) || defined(_MODULE)
1.86 matt 119: uint32_t ci_pmap_asid_cur;
1.92 matt 120: union pmap_segtab *ci_pmap_segtabs[2];
1.74 matt 121: #define ci_pmap_kern_segtab ci_pmap_segtabs[0]
122: #define ci_pmap_user_segtab ci_pmap_segtabs[1]
123: struct pmap_tlb_info *ci_tlb_info;
1.84 matt 124: #endif /* PPC_BOOKE || MODULAR || _MODULE */
1.14 eeh 125: struct cache_info ci_ci;
1.40 matt 126: void *ci_sysmon_cookie;
1.43 matt 127: void (*ci_idlespin)(void);
1.44 briggs 128: uint32_t ci_khz;
1.25 matt 129: struct evcnt ci_ev_clock; /* clock intrs */
1.50 freza 130: struct evcnt ci_ev_statclock; /* stat clock */
1.9 matt 131: struct evcnt ci_ev_traps; /* calls to trap() */
132: struct evcnt ci_ev_kdsi; /* kernel DSI traps */
133: struct evcnt ci_ev_udsi; /* user DSI traps */
134: struct evcnt ci_ev_udsi_fatal; /* user DSI trap failures */
1.33 matt 135: struct evcnt ci_ev_kisi; /* kernel ISI traps */
1.9 matt 136: struct evcnt ci_ev_isi; /* user ISI traps */
137: struct evcnt ci_ev_isi_fatal; /* user ISI trap failures */
138: struct evcnt ci_ev_pgm; /* user PGM traps */
1.75 matt 139: struct evcnt ci_ev_debug; /* user debug traps */
1.9 matt 140: struct evcnt ci_ev_fpu; /* FPU traps */
141: struct evcnt ci_ev_fpusw; /* FPU context switch */
142: struct evcnt ci_ev_ali; /* Alignment traps */
143: struct evcnt ci_ev_ali_fatal; /* Alignment fatal trap */
144: struct evcnt ci_ev_scalls; /* system call traps */
145: struct evcnt ci_ev_vec; /* Altivec traps */
146: struct evcnt ci_ev_vecsw; /* Altivec context switches */
1.16 matt 147: struct evcnt ci_ev_umchk; /* user MCHK events */
1.59 garbled 148: struct evcnt ci_ev_ipi; /* IPIs received */
1.74 matt 149: struct evcnt ci_ev_tlbmiss_soft; /* tlb miss (no trap) */
150: struct evcnt ci_ev_dtlbmiss_hard; /* data tlb miss (trap) */
151: struct evcnt ci_ev_itlbmiss_hard; /* instruction tlb miss (trap) */
1.73 phx 152: #endif /* _KERNEL */
1.9 matt 153: };
1.73 phx 154: #endif /* _KERNEL || _KMEMUSER */
155:
156: #ifdef _KERNEL
1.9 matt 157:
1.83 matt 158: #if defined(MULTIPROCESSOR) && !defined(_MODULE)
1.59 garbled 159: struct cpu_hatch_data {
1.87 matt 160: int hatch_running;
161: device_t hatch_self;
162: struct cpu_info *hatch_ci;
163: uint32_t hatch_tbu;
164: uint32_t hatch_tbl;
1.103.2.1 pgoyette 165: #if defined(PPC_OEA64_BRIDGE) || defined (_ARCH_PPC64)
166: uint64_t hatch_hid0;
1.103.2.3 pgoyette 167: uint64_t hatch_hid1;
1.103.2.2 pgoyette 168: uint64_t hatch_hid4;
169: uint64_t hatch_hid5;
1.103.2.1 pgoyette 170: #else
1.87 matt 171: uint32_t hatch_hid0;
1.103.2.1 pgoyette 172: #endif
1.87 matt 173: uint32_t hatch_pir;
174: #if defined(PPC_OEA) || defined(PPC_OEA64_BRIDGE)
175: uintptr_t hatch_asr;
176: uintptr_t hatch_sdr1;
177: uint32_t hatch_sr[16];
1.94 kiyohara 178: uintptr_t hatch_ibatu[8], hatch_ibatl[8];
179: uintptr_t hatch_dbatu[8], hatch_dbatl[8];
1.87 matt 180: #endif
181: #if defined(PPC_BOOKE)
182: vaddr_t hatch_sp;
1.95 matt 183: u_int hatch_tlbidx;
1.87 matt 184: #endif
185: };
186:
187: struct cpuset_info {
1.97 matt 188: kcpuset_t *cpus_running;
189: kcpuset_t *cpus_hatched;
190: kcpuset_t *cpus_paused;
191: kcpuset_t *cpus_resumed;
192: kcpuset_t *cpus_halted;
1.59 garbled 193: };
1.87 matt 194:
1.97 matt 195: extern struct cpuset_info cpuset_info;
1.83 matt 196: #endif /* MULTIPROCESSOR && !_MODULE */
1.59 garbled 197:
1.83 matt 198: #if defined(MULTIPROCESSOR) || defined(_MODULE)
199: #define cpu_number() (curcpu()->ci_index + 0)
1.9 matt 200:
201: #define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0)
1.83 matt 202: #define CPU_INFO_ITERATOR int
203: #define CPU_INFO_FOREACH(cii, ci) \
1.103 chs 204: cii = 0, ci = &cpu_info[0]; cii < (ncpu ? ncpu : 1); cii++, ci++
1.18 chs 205:
1.9 matt 206: #else
207: #define cpu_number() 0
208:
1.83 matt 209: #define CPU_IS_PRIMARY(ci) true
210: #define CPU_INFO_ITERATOR int
211: #define CPU_INFO_FOREACH(cii, ci) \
1.98 nisimura 212: (void)cii, ci = curcpu(); ci != NULL; ci = NULL
1.18 chs 213:
1.83 matt 214: #endif /* MULTIPROCESSOR || _MODULE */
1.9 matt 215:
1.25 matt 216: extern struct cpu_info cpu_info[];
217:
1.77 matt 218: static __inline struct cpu_info * curcpu(void) __pure;
1.47 perry 219: static __inline struct cpu_info *
1.25 matt 220: curcpu(void)
221: {
222: struct cpu_info *ci;
223:
1.78 matt 224: __asm volatile ("mfsprg0 %0" : "=r"(ci));
1.25 matt 225: return ci;
226: }
227:
1.91 matt 228: #ifdef __clang__
229: #define curlwp (curcpu()->ci_curlwp)
230: #else
1.77 matt 231: register struct lwp *powerpc_curlwp __asm("r13");
232: #define curlwp powerpc_curlwp
1.91 matt 233: #endif
1.25 matt 234: #define curpcb (curcpu()->ci_curpcb)
1.38 matt 235: #define curpm (curcpu()->ci_curpm)
1.25 matt 236:
1.47 perry 237: static __inline register_t
1.18 chs 238: mfmsr(void)
239: {
1.20 matt 240: register_t msr;
1.18 chs 241:
1.46 perry 242: __asm volatile ("mfmsr %0" : "=r"(msr));
1.18 chs 243: return msr;
244: }
245:
1.47 perry 246: static __inline void
1.20 matt 247: mtmsr(register_t msr)
1.18 chs 248: {
1.74 matt 249: //KASSERT(msr & PSL_CE);
250: //KASSERT(msr & PSL_DE);
1.46 perry 251: __asm volatile ("mtmsr %0" : : "r"(msr));
1.19 chs 252: }
253:
1.84 matt 254: #if !defined(_MODULE)
1.47 perry 255: static __inline uint32_t
1.19 chs 256: mftbl(void)
257: {
258: uint32_t tbl;
259:
1.46 perry 260: __asm volatile (
1.29 hannken 261: #ifdef PPC_IBM403
1.74 matt 262: " mftblo %[tbl]" "\n"
263: #elif defined(PPC_BOOKE)
264: " mfspr %[tbl],268" "\n"
1.29 hannken 265: #else
1.74 matt 266: " mftbl %[tbl]" "\n"
1.29 hannken 267: #endif
1.74 matt 268: : [tbl] "=r" (tbl));
1.29 hannken 269:
1.19 chs 270: return tbl;
271: }
272:
1.47 perry 273: static __inline uint64_t
1.19 chs 274: mftb(void)
275: {
276: uint64_t tb;
1.32 matt 277:
1.96 macallan 278: #ifdef _ARCH_PPC64
1.46 perry 279: __asm volatile ("mftb %0" : "=r"(tb));
1.32 matt 280: #else
1.19 chs 281: int tmp;
282:
1.46 perry 283: __asm volatile (
1.29 hannken 284: #ifdef PPC_IBM403
1.74 matt 285: "1: mftbhi %[tb]" "\n"
286: " mftblo %L[tb]" "\n"
287: " mftbhi %[tmp]" "\n"
288: #elif defined(PPC_BOOKE)
289: "1: mfspr %[tb],269" "\n"
290: " mfspr %L[tb],268" "\n"
291: " mfspr %[tmp],269" "\n"
1.29 hannken 292: #else
1.74 matt 293: "1: mftbu %[tb]" "\n"
294: " mftb %L[tb]" "\n"
295: " mftbu %[tmp]" "\n"
296: #endif
297: " cmplw %[tb],%[tmp]" "\n"
298: " bne- 1b" "\n"
299: : [tb] "=r" (tb), [tmp] "=r"(tmp)
300: :: "cr0");
1.32 matt 301: #endif
1.29 hannken 302:
1.19 chs 303: return tb;
1.24 kleink 304: }
305:
1.47 perry 306: static __inline uint32_t
1.24 kleink 307: mfrtcl(void)
308: {
309: uint32_t rtcl;
310:
1.46 perry 311: __asm volatile ("mfrtcl %0" : "=r"(rtcl));
1.24 kleink 312: return rtcl;
313: }
314:
1.47 perry 315: static __inline void
1.24 kleink 316: mfrtc(uint32_t *rtcp)
317: {
318: uint32_t tmp;
319:
1.46 perry 320: __asm volatile (
1.74 matt 321: "1: mfrtcu %[rtcu]" "\n"
322: " mfrtcl %[rtcl]" "\n"
323: " mfrtcu %[tmp]" "\n"
324: " cmplw %[rtcu],%[tmp]" "\n"
325: " bne- 1b"
326: : [rtcu] "=r"(rtcp[0]), [rtcl] "=r"(rtcp[1]), [tmp] "=r"(tmp)
327: :: "cr0");
1.19 chs 328: }
1.99 macallan 329:
330: static __inline uint64_t
331: rtc_nanosecs(void)
332: {
333: /*
334: * 601 RTC/DEC registers share clock of 7.8125 MHz, 128 ns per tick.
335: * DEC has max of 25 bits, FFFFFF => 2.14748352 seconds.
336: * RTCU is seconds, 32 bits.
337: * RTCL is nano-seconds, 23 bit counter from 0 - 999,999,872 (999,999,999 - 128 ns)
338: */
339: uint64_t cycles;
340: uint32_t tmp[2];
341:
342: mfrtc(tmp);
343:
344: cycles = tmp[0] * 1000000000;
345: cycles += (tmp[1] >> 7);
346:
347: return cycles;
348: }
1.84 matt 349: #endif /* !_MODULE */
1.19 chs 350:
1.47 perry 351: static __inline uint32_t
1.19 chs 352: mfpvr(void)
353: {
354: uint32_t pvr;
355:
1.46 perry 356: __asm volatile ("mfpvr %0" : "=r"(pvr));
1.19 chs 357: return (pvr);
1.18 chs 358: }
359:
1.84 matt 360: #ifdef _MODULE
361: extern const char __CPU_MAXNUM;
362: /*
363: * Make with 0xffff to force a R_PPC_ADDR16_LO without the
364: * corresponding R_PPC_ADDR16_HI relocation.
365: */
366: #define CPU_MAXNUM (((uintptr_t)&__CPU_MAXNUM)&0xffff)
367: #endif /* _MODULE */
368:
1.83 matt 369: #if !defined(_MODULE)
1.93 matt 370: extern char *booted_kernel;
1.9 matt 371: extern int powersave;
372: extern int cpu_timebase;
373: extern int cpu_printfataltraps;
1.16 matt 374:
1.83 matt 375: struct cpu_info *
376: cpu_attach_common(device_t, int);
377: void cpu_setup(device_t, struct cpu_info *);
378: void cpu_identify(char *, size_t);
379: void cpu_probe_cache(void);
1.85 matt 380:
1.83 matt 381: void dcache_wb_page(vaddr_t);
382: void dcache_wbinv_page(vaddr_t);
383: void dcache_inv_page(vaddr_t);
384: void dcache_zero_page(vaddr_t);
385: void icache_inv_page(vaddr_t);
386: void dcache_wb(vaddr_t, vsize_t);
387: void dcache_wbinv(vaddr_t, vsize_t);
388: void dcache_inv(vaddr_t, vsize_t);
389: void icache_inv(vaddr_t, vsize_t);
1.85 matt 390:
1.88 matt 391: void * mapiodev(paddr_t, psize_t, bool);
1.83 matt 392: void unmapiodev(vaddr_t, vsize_t);
1.9 matt 393:
1.59 garbled 394: #ifdef MULTIPROCESSOR
1.83 matt 395: int md_setup_trampoline(volatile struct cpu_hatch_data *,
396: struct cpu_info *);
397: void md_presync_timebase(volatile struct cpu_hatch_data *);
398: void md_start_timebase(volatile struct cpu_hatch_data *);
399: void md_sync_timebase(volatile struct cpu_hatch_data *);
400: void md_setup_interrupts(void);
401: int cpu_spinup(device_t, struct cpu_info *);
402: register_t
403: cpu_hatch(void);
404: void cpu_spinup_trampoline(void);
405: void cpu_boot_secondary_processors(void);
1.101 nonaka 406: void cpu_halt(void);
407: void cpu_halt_others(void);
408: void cpu_pause(struct trapframe *);
409: void cpu_pause_others(void);
410: void cpu_resume(cpuid_t);
411: void cpu_resume_others(void);
412: int cpu_is_paused(int);
413: void cpu_debug_dump(void);
1.83 matt 414: #endif /* MULTIPROCESSOR */
415: #endif /* !_MODULE */
416:
417: #define cpu_proc_fork(p1, p2)
1.59 garbled 418:
1.9 matt 419: #define DELAY(n) delay(n)
1.83 matt 420: void delay(unsigned int);
421:
422: #define CLKF_USERMODE(cf) cpu_clkf_usermode(cf)
423: #define CLKF_PC(cf) cpu_clkf_pc(cf)
424: #define CLKF_INTR(cf) cpu_clkf_intr(cf)
425:
426: bool cpu_clkf_usermode(const struct clockframe *);
427: vaddr_t cpu_clkf_pc(const struct clockframe *);
428: bool cpu_clkf_intr(const struct clockframe *);
429:
430: #define LWP_PC(l) cpu_lwp_pc(l)
431:
432: vaddr_t cpu_lwp_pc(struct lwp *);
1.9 matt 433:
1.86 matt 434: void cpu_ast(struct lwp *, struct cpu_info *);
1.79 matt 435: void * cpu_uarea_alloc(bool);
436: bool cpu_uarea_free(void *);
1.77 matt 437: void cpu_need_resched(struct cpu_info *, int);
438: void cpu_signotify(struct lwp *);
439: void cpu_need_proftick(struct lwp *);
440: #define cpu_did_resched(l) ((l)->l_md.md_astpending = 0)
1.9 matt 441:
1.81 matt 442: void cpu_fixup_stubs(void);
443:
1.83 matt 444: #if !defined(PPC_IBM4XX) && !defined(PPC_BOOKE) && !defined(_MODULE)
1.85 matt 445: int cpu_get_dfs(void);
446: void cpu_set_dfs(int);
447:
1.83 matt 448: void oea_init(void (*)(void));
449: void oea_startup(const char *);
450: void oea_dumpsys(void);
451: void oea_install_extint(void (*)(void));
1.89 kiyohara 452: paddr_t kvtop(void *);
1.16 matt 453:
454: extern paddr_t msgbuf_paddr;
455: extern int cpu_altivec;
456: #endif
457:
1.9 matt 458: #endif /* _KERNEL */
459:
1.61 garbled 460: /* XXX The below breaks unified pmap on ppc32 */
461:
1.83 matt 462: #if !defined(CACHELINESIZE) && !defined(_MODULE) \
463: && (defined(_KERNEL) || defined(_STANDALONE))
464: #if defined(PPC_IBM403)
1.62 garbled 465: #define CACHELINESIZE 16
466: #define MAXCACHELINESIZE 16
1.83 matt 467: #elif defined (PPC_OEA64_BRIDGE)
1.62 garbled 468: #define CACHELINESIZE 128
469: #define MAXCACHELINESIZE 128
1.51 sanjayl 470: #else
1.62 garbled 471: #define CACHELINESIZE 32
472: #define MAXCACHELINESIZE 32
1.51 sanjayl 473: #endif /* PPC_OEA64_BRIDGE */
1.29 hannken 474: #endif
1.10 matt 475:
1.83 matt 476: void __syncicache(void *, size_t);
1.14 eeh 477:
1.5 ws 478: /*
479: * CTL_MACHDEP definitions.
480: */
1.9 matt 481: #define CPU_CACHELINE 1
482: #define CPU_TIMEBASE 2
483: #define CPU_CPUTEMP 3
484: #define CPU_PRINTFATALTRAPS 4
1.14 eeh 485: #define CPU_CACHEINFO 5
1.16 matt 486: #define CPU_ALTIVEC 6
487: #define CPU_MODEL 7
1.58 nisimura 488: #define CPU_POWERSAVE 8 /* int: use CPU powersave mode */
489: #define CPU_BOOTED_DEVICE 9 /* string: device we booted from */
490: #define CPU_BOOTED_KERNEL 10 /* string: kernel we booted */
1.90 matt 491: #define CPU_EXECPROT 11 /* bool: PROT_EXEC works */
492: #define CPU_MAXID 12 /* number of valid machdep ids */
1.1 ws 493:
1.5 ws 494: #endif /* _POWERPC_CPU_H_ */
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