Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

===================================================================
RCS file: /ftp/cvs/cvsroot/src/sys/arch/powerpc/include/cpu.h,v
rcsdiff: /ftp/cvs/cvsroot/src/sys/arch/powerpc/include/cpu.h,v: warning: Unknown phrases like `commitid ...;' are present.
retrieving revision 1.88.2.4
retrieving revision 1.89
diff -u -p -r1.88.2.4 -r1.89
--- src/sys/arch/powerpc/include/cpu.h	2014/05/22 11:40:04	1.88.2.4
+++ src/sys/arch/powerpc/include/cpu.h	2011/12/13 11:03:52	1.89
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.h,v 1.88.2.4 2014/05/22 11:40:04 yamt Exp $	*/
+/*	$NetBSD: cpu.h,v 1.89 2011/12/13 11:03:52 kiyohara Exp $	*/
 
 /*
  * Copyright (C) 1999 Wolfgang Solfrank.
@@ -114,7 +114,7 @@ struct cpu_info {
 	register_t ci_savearea[CPUSAVE_SIZE];
 #if defined(PPC_BOOKE) || defined(MODULAR) || defined(_MODULE)
 	uint32_t ci_pmap_asid_cur;
-	union pmap_segtab *ci_pmap_segtabs[2];
+	struct pmap_segtab *ci_pmap_segtabs[2];
 #define	ci_pmap_kern_segtab	ci_pmap_segtabs[0]
 #define	ci_pmap_user_segtab	ci_pmap_segtabs[1]
 	struct pmap_tlb_info *ci_tlb_info;
@@ -165,24 +165,22 @@ struct cpu_hatch_data {
 	uintptr_t hatch_asr;
 	uintptr_t hatch_sdr1;
 	uint32_t hatch_sr[16];
-	uintptr_t hatch_ibatu[8], hatch_ibatl[8];
-	uintptr_t hatch_dbatu[8], hatch_dbatl[8];
+	uintptr_t hatch_batu[8], hatch_batl[8];
 #endif
 #if defined(PPC_BOOKE)
 	vaddr_t hatch_sp;
-	u_int hatch_tlbidx;
 #endif
 };
 
 struct cpuset_info {
-	kcpuset_t *cpus_running;
-	kcpuset_t *cpus_hatched;
-	kcpuset_t *cpus_paused;
-	kcpuset_t *cpus_resumed;
-	kcpuset_t *cpus_halted;
+	__cpuset_t cpus_running;
+	__cpuset_t cpus_hatched;
+	__cpuset_t cpus_paused;
+	__cpuset_t cpus_resumed;
+	__cpuset_t cpus_halted;
 };
 
-extern struct cpuset_info cpuset_info;
+extern volatile struct cpuset_info cpuset_info;
 #endif /* MULTIPROCESSOR && !_MODULE */
 
 #if defined(MULTIPROCESSOR) || defined(_MODULE)
@@ -199,7 +197,7 @@ extern struct cpuset_info cpuset_info;
 #define CPU_IS_PRIMARY(ci)	true
 #define CPU_INFO_ITERATOR	int
 #define CPU_INFO_FOREACH(cii, ci)				\
-	(void)cii, ci = curcpu(); ci != NULL; ci = NULL
+	cii = 0, ci = curcpu(); ci != NULL; ci = NULL
 
 #endif /* MULTIPROCESSOR || _MODULE */
 
@@ -215,12 +213,8 @@ curcpu(void)
 	return ci;
 }
 
-#ifdef __clang__
-#define	curlwp			(curcpu()->ci_curlwp)
-#else
 register struct lwp *powerpc_curlwp __asm("r13");
 #define	curlwp			powerpc_curlwp
-#endif
 #define curpcb			(curcpu()->ci_curpcb)
 #define curpm			(curcpu()->ci_curpm)
 
@@ -265,7 +259,7 @@ mftb(void)
 {
 	uint64_t tb;
 
-#ifdef _ARCH_PPC64
+#ifdef _LP64
 	__asm volatile ("mftb %0" : "=r"(tb));
 #else
 	int tmp;
@@ -316,26 +310,6 @@ mfrtc(uint32_t *rtcp)
 	    : [rtcu] "=r"(rtcp[0]), [rtcl] "=r"(rtcp[1]), [tmp] "=r"(tmp)
 	    :: "cr0");
 }
-
-static __inline uint64_t
-rtc_nanosecs(void)
-{
-    /* 
-     * 601 RTC/DEC registers share clock of 7.8125 MHz, 128 ns per tick.
-     * DEC has max of 25 bits, FFFFFF => 2.14748352 seconds.
-     * RTCU is seconds, 32 bits.
-     * RTCL is nano-seconds, 23 bit counter from 0 - 999,999,872 (999,999,999 - 128 ns)
-     */
-    uint64_t cycles;
-    uint32_t tmp[2];
-
-    mfrtc(tmp);
-
-    cycles = tmp[0] * 1000000000;
-    cycles += (tmp[1] >> 7);
-
-    return cycles;
-}
 #endif /* !_MODULE */
 
 static __inline uint32_t
@@ -357,10 +331,10 @@ extern const char __CPU_MAXNUM;
 #endif /* _MODULE */
 
 #if !defined(_MODULE)
-extern char *booted_kernel;
 extern int powersave;
 extern int cpu_timebase;
 extern int cpu_printfataltraps;
+extern char cpu_model[];
 
 struct cpu_info *
 	cpu_attach_common(device_t, int);
@@ -470,7 +444,6 @@ void	__syncicache(void *, size_t);
 #define	CPU_POWERSAVE		8	/* int: use CPU powersave mode */
 #define	CPU_BOOTED_DEVICE	9	/* string: device we booted from */
 #define	CPU_BOOTED_KERNEL	10	/* string: kernel we booted */
-#define	CPU_EXECPROT		11	/* bool: PROT_EXEC works */
-#define	CPU_MAXID		12	/* number of valid machdep ids */
+#define	CPU_MAXID		11	/* number of valid machdep ids */
 
 #endif	/* _POWERPC_CPU_H_ */