version 1.10, 2001/08/28 03:03:43 |
version 1.10.6.11, 2002/08/27 23:45:15 |
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#if defined(_KERNEL_OPT) |
#if defined(_KERNEL_OPT) |
#include "opt_lockdebug.h" |
#include "opt_lockdebug.h" |
#include "opt_multiprocessor.h" |
#include "opt_multiprocessor.h" |
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#include "opt_ppcarch.h" |
#endif |
#endif |
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#include <sys/device.h> |
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#include <machine/frame.h> |
#include <machine/frame.h> |
#include <machine/psl.h> |
#include <machine/psl.h> |
#include <machine/intr.h> |
#include <machine/intr.h> |
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#include <sys/device.h> |
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struct cache_info { |
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int dcache_size; |
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int dcache_line_size; |
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int icache_size; |
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int icache_line_size; |
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}; |
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#ifdef _KERNEL |
#ifdef _KERNEL |
#include <sys/sched.h> |
#include <sys/sched.h> |
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#include <dev/sysmon/sysmonvar.h> |
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struct cpu_info { |
struct cpu_info { |
struct schedstate_percpu ci_schedstate; /* scheduler state */ |
struct schedstate_percpu ci_schedstate; /* scheduler state */ |
#if defined(DIAGNOSTIC) || defined(LOCKDEBUG) |
#if defined(DIAGNOSTIC) || defined(LOCKDEBUG) |
Line 54 struct cpu_info { |
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Line 66 struct cpu_info { |
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u_long ci_simple_locks; /* # of simple locks held */ |
u_long ci_simple_locks; /* # of simple locks held */ |
#endif |
#endif |
struct device *ci_dev; /* device of corresponding cpu */ |
struct device *ci_dev; /* device of corresponding cpu */ |
struct proc *ci_curproc; /* current owner of the processor */ |
struct lwp *ci_curlwp; /* current owner of the processor */ |
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struct pcb *ci_curpcb; |
struct pcb *ci_curpcb; |
struct pmap *ci_curpm; |
struct pmap *ci_curpm; |
struct proc *ci_fpuproc; |
struct lwp *ci_fpulwp; |
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struct lwp *ci_veclwp; |
struct pcb *ci_idle_pcb; /* PA of our idle pcb */ |
struct pcb *ci_idle_pcb; /* PA of our idle pcb */ |
int ci_cpuid; |
int ci_cpuid; |
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Line 75 struct cpu_info { |
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Line 88 struct cpu_info { |
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int ci_ddbsave[8]; |
int ci_ddbsave[8]; |
int ci_ipkdbsave[8]; |
int ci_ipkdbsave[8]; |
int ci_disisave[4]; |
int ci_disisave[4]; |
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struct cache_info ci_ci; |
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struct sysmon_envsys ci_sysmon; |
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struct envsys_tre_data ci_tau_info; |
struct evcnt ci_ev_traps; /* calls to trap() */ |
struct evcnt ci_ev_traps; /* calls to trap() */ |
struct evcnt ci_ev_kdsi; /* kernel DSI traps */ |
struct evcnt ci_ev_kdsi; /* kernel DSI traps */ |
struct evcnt ci_ev_udsi; /* user DSI traps */ |
struct evcnt ci_ev_udsi; /* user DSI traps */ |
Line 89 struct cpu_info { |
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Line 105 struct cpu_info { |
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struct evcnt ci_ev_scalls; /* system call traps */ |
struct evcnt ci_ev_scalls; /* system call traps */ |
struct evcnt ci_ev_vec; /* Altivec traps */ |
struct evcnt ci_ev_vec; /* Altivec traps */ |
struct evcnt ci_ev_vecsw; /* Altivec context switches */ |
struct evcnt ci_ev_vecsw; /* Altivec context switches */ |
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struct evcnt ci_ev_umchk; /* user MCHK events */ |
}; |
}; |
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#ifdef MULTIPROCESSOR |
#ifdef MULTIPROCESSOR |
static __inline int |
static __inline int |
cpu_number() |
cpu_number(void) |
{ |
{ |
int pir; |
int pir; |
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} |
} |
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static __inline struct cpu_info * |
static __inline struct cpu_info * |
curcpu() |
curcpu(void) |
{ |
{ |
struct cpu_info *ci; |
struct cpu_info *ci; |
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return ci; |
return ci; |
} |
} |
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void cpu_boot_secondary_processors(void); |
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extern struct cpu_info cpu_info[]; |
extern struct cpu_info cpu_info[]; |
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#define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) |
#define CPU_IS_PRIMARY(ci) ((ci)->ci_cpuid == 0) |
#define curproc curcpu()->ci_curproc |
#define curlwp curcpu()->ci_curlwp |
#define fpuproc curcpu()->ci_fpuproc |
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#define curpcb curcpu()->ci_curpcb |
#define curpcb curcpu()->ci_curpcb |
#define curpm curcpu()->ci_curpm |
#define curpm curcpu()->ci_curpm |
#define want_resched curcpu()->ci_want_resched |
#define want_resched curcpu()->ci_want_resched |
#define astpending curcpu()->ci_astpending |
#define astpending curcpu()->ci_astpending |
#define intr_depth curcpu()->ci_intrdepth |
#define intr_depth curcpu()->ci_intrdepth |
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#define CPU_INFO_ITERATOR int |
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#define CPU_INFO_FOREACH(cii, ci) \ |
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cii = 0, ci = &cpu_info[0]; cii < CPU_MAXNUM; cii++, ci++ |
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#else |
#else |
extern struct cpu_info cpu_info_store; |
extern struct cpu_info cpu_info_store; |
extern volatile int want_resched; |
extern volatile int want_resched; |
Line 130 extern volatile int intr_depth; |
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Line 152 extern volatile int intr_depth; |
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#define curcpu() (&cpu_info_store) |
#define curcpu() (&cpu_info_store) |
#define cpu_number() 0 |
#define cpu_number() 0 |
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#define CPU_INFO_ITERATOR int |
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#define CPU_INFO_FOREACH(cii, ci) \ |
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cii = 0, ci = curcpu(); ci != NULL; ci = NULL |
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#endif /* MULTIPROCESSOR */ |
#endif /* MULTIPROCESSOR */ |
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static __inline register_t |
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mfmsr(void) |
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{ |
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register_t msr; |
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asm volatile ("mfmsr %0" : "=r"(msr)); |
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return msr; |
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} |
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static __inline void |
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mtmsr(register_t msr) |
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{ |
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asm volatile ("mtmsr %0" : : "r"(msr)); |
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} |
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static __inline uint32_t |
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mftbl(void) |
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{ |
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uint32_t tbl; |
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asm volatile ("mftbl %0" : "=r"(tbl)); |
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return tbl; |
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} |
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static __inline uint64_t |
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mftb(void) |
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{ |
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uint64_t tb; |
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int tmp; |
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asm volatile (" |
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1: mftbu %0 \n\ |
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mftb %0+1 \n\ |
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mftbu %1 \n\ |
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cmplw %0,%1 \n\ |
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bne- 1b" |
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: "=r"(tb), "=r"(tmp)); |
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return tb; |
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} |
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static __inline uint32_t |
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mfpvr(void) |
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{ |
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uint32_t pvr; |
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asm volatile ("mfpvr %0" : "=r"(pvr)); |
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return (pvr); |
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} |
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#define CLKF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0) |
#define CLKF_USERMODE(frame) (((frame)->srr1 & PSL_PR) != 0) |
#define CLKF_BASEPRI(frame) ((frame)->pri == 0) |
#define CLKF_BASEPRI(frame) ((frame)->pri == 0) |
#define CLKF_PC(frame) ((frame)->srr0) |
#define CLKF_PC(frame) ((frame)->srr0) |
#define CLKF_INTR(frame) ((frame)->depth > 0) |
#define CLKF_INTR(frame) ((frame)->depth > 0) |
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#define PROC_PC(p) (trapframe(p)->srr0) |
#define LWP_PC(l) (trapframe(l)->srr0) |
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#define cpu_swapout(p) |
#define cpu_swapout(p) |
#define cpu_wait(p) |
#define cpu_wait(p) |
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#define cpu_proc_fork(p1, p2) |
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extern int powersave; |
extern int powersave; |
extern int cpu_timebase; |
extern int cpu_timebase; |
extern int cpu_printfataltraps; |
extern int cpu_printfataltraps; |
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extern char cpu_model[]; |
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struct cpu_info *cpu_attach_common(struct device *, int); |
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void cpu_setup(struct device *, struct cpu_info *); |
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void cpu_identify(char *, size_t); |
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void delay (unsigned int); |
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void cpu_probe_cache(void); |
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void dcache_flush_page(vaddr_t); |
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void icache_flush_page(vaddr_t); |
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void dcache_flush(vaddr_t, vsize_t); |
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void icache_flush(vaddr_t, vsize_t); |
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extern struct cpu_info *cpu_attach_common(struct device *, int); |
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extern void cpu_identify(char *, size_t); |
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extern void delay (unsigned int); |
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#define DELAY(n) delay(n) |
#define DELAY(n) delay(n) |
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#define need_resched(ci) (want_resched = 1, astpending = 1) |
#define need_resched(ci) (want_resched = 1, astpending = 1) |
#define need_proftick(p) ((p)->p_flag |= P_OWEUPC, astpending = 1) |
#define need_proftick(p) ((p)->p_flag |= P_OWEUPC, astpending = 1) |
#define signotify(p) (astpending = 1) |
#define signotify(p) (astpending = 1) |
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#ifdef PPC_MPC6XX |
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void mpc6xx_init(void (*)(void)); |
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void mpc6xx_startup(const char *); |
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void mpc6xx_dumpsys(void); |
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void mpc6xx_install_extint(void (*)(void)); |
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void *mapiodev(paddr_t, psize_t); |
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paddr_t kvtop(caddr_t); |
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void softnet(int); |
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extern paddr_t msgbuf_paddr; |
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extern int cpu_altivec; |
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#endif |
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#endif /* _KERNEL */ |
#endif /* _KERNEL */ |
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#if defined(_KERNEL) || defined(_STANDALONE) |
#if defined(_KERNEL) || defined(_STANDALONE) |
Line 163 extern void delay (unsigned int); |
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Line 261 extern void delay (unsigned int); |
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#endif |
#endif |
#endif |
#endif |
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void __syncicache(void *, int); |
void __syncicache(void *, size_t); |
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/* |
/* |
* CTL_MACHDEP definitions. |
* CTL_MACHDEP definitions. |
Line 172 void __syncicache(void *, int); |
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Line 270 void __syncicache(void *, int); |
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#define CPU_TIMEBASE 2 |
#define CPU_TIMEBASE 2 |
#define CPU_CPUTEMP 3 |
#define CPU_CPUTEMP 3 |
#define CPU_PRINTFATALTRAPS 4 |
#define CPU_PRINTFATALTRAPS 4 |
#define CPU_MAXID 5 |
#define CPU_CACHEINFO 5 |
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#define CPU_ALTIVEC 6 |
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#define CPU_MODEL 7 |
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#define CPU_POWERSAVE 8 |
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#define CPU_MAXID 9 |
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#define CTL_MACHDEP_NAMES { \ |
#define CTL_MACHDEP_NAMES { \ |
{ 0, 0 }, \ |
{ 0, 0 }, \ |
Line 180 void __syncicache(void *, int); |
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Line 282 void __syncicache(void *, int); |
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{ "timebase", CTLTYPE_INT }, \ |
{ "timebase", CTLTYPE_INT }, \ |
{ "cputempature", CTLTYPE_INT }, \ |
{ "cputempature", CTLTYPE_INT }, \ |
{ "printfataltraps", CTLTYPE_INT }, \ |
{ "printfataltraps", CTLTYPE_INT }, \ |
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{ "cacheinfo", CTLTYPE_STRUCT }, \ |
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{ "altivec", CTLTYPE_INT }, \ |
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{ "model", CTLTYPE_STRING }, \ |
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{ "powersave", CTLTYPE_INT }, \ |
} |
} |
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#endif /* _POWERPC_CPU_H_ */ |
#endif /* _POWERPC_CPU_H_ */ |