CVS log for src/sys/arch/powerpc/fpu/fpu_implode.c

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Keyword substitution: kv
Default branch: MAIN

Fix logic for FPSCR[OX]; set FPSCR[FI] (and therefore FPSCR[XX]).

Fix logic for FPSCR[UX]:
- Correct FPSCR[FPRF] field when round to 0.0 or 0.0f.
- Simplify.

Simplify logic to remove needless goto. NFC.

Fix logic for FI, FR, and FPRF fields of FPSCR.

They are not sticky bits and updated by arithmetic and round
insns at the same time.

Comparison insns update only FPCC sub-field of FPRF.

For other insns, these field are left untouched.

Also, for single-precision insns, exception bits should be set by
the first fpu_implode(), which rounds the value to float.

Fix debug printf. Unbreak DEBUG build.

Remove extra break.

fpu_implode(): Clear lower word for float just for sure.

Make fpu_explode() and fpu_implode() take uint64_t and uint64_t *,
instead of register number, respectively. NFC.

Fix off-by-one error in exponent when round a double to the
largest normalized value; QNaN was wrongly generated here.

Make fpu_ftod() return uint64_t value. NFC.

Set FPSCR[FPRF] for calculated result, for all instructions
that are documented to update this field.

Exceptions are fcti{w,d}{,z}; FPSCR[FPRF] becomes undefined,
according to Power ISA. We do not overwrite this field for
these insns at the moment.

static-fy fpu_fto[ixsd](). NFC.

Further fix for fcti{w,d}{,z}.

- Treat {Q,S}NaN correctly.
- Set exception bits appropriately.
- Introduce round_int().

Remove stale comment.

Fix fcti{w,d}{,z}.

- Treat 64-bit integer correctly for fctid{,z}.
- Respect round mode specified by FPSCR[RN].

XXX
- Set FPSCR[FR] and [FI] appropriately.
- Also set FPSCR[FPRF]?
- fctid{,z} traps on powerpc32 (confirmed on 603e and G4).

Do not assert FPSCR[UX] when overflow.

u_int64_t --> uint64_t. No binary changes.

Sort headers. No functional changes intended.

sync with head.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

KNF nit.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

Remove (the now non-compiling) support for 128bit FP emulation, which
isn't needed for PowerPC anyway.

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

__KERNEL_RCSID()

Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
 - New pmap and revised trap handler.
 - Support on-chip timers, PCI controller, UARTs
 - Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
 - Add in-kernel PPC floating point emulation
 - New in{,4}_cksum that is between 1.5 and 5 times faster than the
   old version depending on CPU type.
General changes:
 - Kernel support for generic dbsym-style symbols.

file fpu_implode.c was added on branch nathanw_sa on 2001-06-13 06:01:48 +0000

Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
 - New pmap and revised trap handler.
 - Support on-chip timers, PCI controller, UARTs
 - Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
 - Add in-kernel PPC floating point emulation
 - New in{,4}_cksum that is between 1.5 and 5 times faster than the
   old version depending on CPU type.
General changes:
 - Kernel support for generic dbsym-style symbols.