CVS log for src/sys/arch/powerpc/fpu/fpu_emu.h

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Keyword substitution: kv
Default branch: MAIN

Turn fpu_sub() macro into static inline function for clarity.
No binary changes.

fpu_sub(): Do not invert sign bit of NaN.

Taken from FreeBSD:
https://cgit.freebsd.org/src/commit/lib/libc/sparc64/fpu?h=releng/12.3&id=8ff9d52cd08cbf31efde4052d3593a5680eaa2a5

Clean up fpu_extern.h; only a function public to external is fpu_emulate().

Other functions are private to fpu_*.c and therefore live in fpu_emu.h.

Also, drop needless forward struct declarations.

NFC.

Fix logic for FI, FR, and FPRF fields of FPSCR.

They are not sticky bits and updated by arithmetic and round
insns at the same time.

Comparison insns update only FPCC sub-field of FPRF.

For other insns, these field are left untouched.

Also, for single-precision insns, exception bits should be set by
the first fpu_implode(), which rounds the value to float.

Make fpu_explode() and fpu_implode() take uint64_t and uint64_t *,
instead of register number, respectively. NFC.

Set FPSCR[FPRF] for calculated result, for all instructions
that are documented to update this field.

Exceptions are fcti{w,d}{,z}; FPSCR[FPRF] becomes undefined,
according to Power ISA. We do not overwrite this field for
these insns at the moment.

Fix fcti{w,d}{,z}.

- Treat 64-bit integer correctly for fctid{,z}.
- Respect round mode specified by FPSCR[RN].

XXX
- Set FPSCR[FR] and [FI] appropriately.
- Also set FPSCR[FPRF]?
- fctid{,z} traps on powerpc32 (confirmed on 603e and G4).

Move FTYPE_* definitions from instr.h to fpu_emu.h.

They are not defined by architecture, and used only for FPU emulation.

sync with head

Add support for PPC FP emulation to BookE.
Pass a ksiginfo_t to fpu_emulation so it can give more detailed
info on signals.

merge ktrace-lwp.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
 - New pmap and revised trap handler.
 - Support on-chip timers, PCI controller, UARTs
 - Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
 - Add in-kernel PPC floating point emulation
 - New in{,4}_cksum that is between 1.5 and 5 times faster than the
   old version depending on CPU type.
General changes:
 - Kernel support for generic dbsym-style symbols.

file fpu_emu.h was added on branch nathanw_sa on 2001-06-13 06:01:48 +0000

Add a port to IBM's PPC405GP Reference Board (the "walnut")
by Eduardo Horvath and Simon Burge of Wasabi Systems.

IBM 4xx series CPU features:
 - New pmap and revised trap handler.
 - Support on-chip timers, PCI controller, UARTs
 - Framework for on-chip ethernet and watchdog timer.
General PowerPC features:
 - Add in-kernel PPC floating point emulation
 - New in{,4}_cksum that is between 1.5 and 5 times faster than the
   old version depending on CPU type.
General changes:
 - Kernel support for generic dbsym-style symbols.