Annotation of src/sys/arch/pmax/tc/scc.c, Revision 1.80
1.80 ! simonb 1: /* $NetBSD: scc.c,v 1.79 2003/03/21 17:23:23 drochner Exp $ */
1.1 jonathan 2:
1.36 jonathan 3: /*
1.18 jonathan 4: * Copyright (c) 1991,1990,1989,1994,1995,1996 Carnegie Mellon University
1.36 jonathan 5: * All Rights Reserved.
6: *
1.1 jonathan 7: * Author: Chris G. Demetriou and Jonathan Stone
8: *
9: * Permission to use, copy, modify and distribute this software and its
10: * documentation is hereby granted, provided that both the copyright
11: * notice and this permission notice appear in all copies of the
12: * software, derivative works or modified versions, and any portions
13: * thereof, and that both notices appear in supporting documentation.
1.36 jonathan 14: *
1.49 pk 15: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
1.1 jonathan 16: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
17: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
1.36 jonathan 18: *
1.1 jonathan 19: * Carnegie Mellon requests users of this software to return to
1.36 jonathan 20: *
1.1 jonathan 21: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
22: * School of Computer Science
23: * Carnegie Mellon University
24: * Pittsburgh PA 15213-3890
1.36 jonathan 25: *
1.1 jonathan 26: * any improvements or extensions that they make and grant Carnegie the
27: * rights to redistribute these changes.
28: */
29:
30: /*-
31: * Copyright (c) 1992, 1993
32: * The Regents of the University of California. All rights reserved.
33: *
34: * This code is derived from software contributed to Berkeley by
35: * Ralph Campbell and Rick Macklem.
36: *
37: * Redistribution and use in source and binary forms, with or without
38: * modification, are permitted provided that the following conditions
39: * are met:
40: * 1. Redistributions of source code must retain the above copyright
41: * notice, this list of conditions and the following disclaimer.
42: * 2. Redistributions in binary form must reproduce the above copyright
43: * notice, this list of conditions and the following disclaimer in the
44: * documentation and/or other materials provided with the distribution.
45: * 3. All advertising materials mentioning features or use of this software
46: * must display the following acknowledgement:
47: * This product includes software developed by the University of
48: * California, Berkeley and its contributors.
49: * 4. Neither the name of the University nor the names of its contributors
50: * may be used to endorse or promote products derived from this software
51: * without specific prior written permission.
52: *
53: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
54: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
57: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63: * SUCH DAMAGE.
64: *
1.18 jonathan 65: * @(#)scc.c 8.2 (Berkeley) 11/30/93
1.1 jonathan 66: */
67:
1.29 jonathan 68: #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
1.80 ! simonb 69: __KERNEL_RCSID(0, "$NetBSD: scc.c,v 1.79 2003/03/21 17:23:23 drochner Exp $");
1.34 jonathan 70:
1.1 jonathan 71: /*
72: * Intel 82530 dual usart chip driver. Supports the serial port(s) on the
73: * Personal DECstation 5000/xx and DECstation 5000/1xx, plus the keyboard
74: * and mouse on the 5000/1xx. (Don't ask me where the A channel signals
75: * are on the 5000/xx.)
76: *
77: * See: Intel MicroCommunications Handbook, Section 2, pg. 155-173, 1992.
78: */
1.64 nisimura 79:
80: #include "opt_ddb.h"
81: #include "rasterconsole.h"
82:
1.1 jonathan 83: #include <sys/param.h>
84: #include <sys/systm.h>
85: #include <sys/ioctl.h>
86: #include <sys/tty.h>
87: #include <sys/proc.h>
88: #include <sys/conf.h>
89: #include <sys/file.h>
90: #include <sys/kernel.h>
91: #include <sys/syslog.h>
92: #include <sys/device.h>
93:
1.72 gehenna 94: #include <dev/cons.h>
1.40 jonathan 95: #include <dev/dec/lk201.h>
1.37 jonathan 96: #include <dev/ic/z8530reg.h>
97:
1.61 simonb 98: #include <machine/pmioctl.h> /* XXX for pmEventQueue typedef */
1.1 jonathan 99:
100: #include <pmax/pmax/pmaxtype.h>
101: #include <pmax/pmax/maxine.h>
102: #include <pmax/dev/sccreg.h>
1.38 jonathan 103: #include <pmax/dev/rconsvar.h>
1.61 simonb 104: #include <pmax/dev/pdma.h> /* XXXXXX */
1.40 jonathan 105: #include <pmax/dev/lk201var.h>
1.56 simonb 106: #include <pmax/dev/qvssvar.h> /* XXX mouseInput() */
1.61 simonb 107: #include <pmax/tc/sccvar.h>
1.24 jonathan 108:
1.6 jonathan 109: #include <dev/tc/tcvar.h>
110: #include <dev/tc/ioasicvar.h>
111:
1.59 simonb 112: void ttrstrt __P((void *));
1.1 jonathan 113:
1.2 jonathan 114:
115: /*
1.77 wiz 116: * True iff the console unit is diverted through this SCC device.
1.2 jonathan 117: * (used to just test if cn_tab->cn_getc was sccGetc, but that
118: * breaks with the new-style glass-tty framebuffer console input.
119: */
120:
121: #define CONSOLE_ON_UNIT(unit) \
1.72 gehenna 122: (major(cn_tab->cn_dev) == cdevsw_lookup_major(&scc_cdevsw) && \
123: SCCUNIT(cn_tab->cn_dev) == (unit))
1.1 jonathan 124:
1.39 jonathan 125:
1.2 jonathan 126: /*
1.39 jonathan 127: * Extract unit (scc chip), channel on chip, and dialin/dialout unit.
1.2 jonathan 128: */
1.39 jonathan 129: #define SCCUNIT(dev) ((minor(dev) & 0x7ffff) >> 1)
130: #define SCCLINE(dev) (minor(dev) & 0x1)
131: #define SCCDIALOUT(x) (minor(x) & 0x80000)
1.2 jonathan 132:
1.1 jonathan 133: #ifdef DEBUG
134: int debugChar;
135: #endif
136:
137: struct scc_softc {
138: struct device sc_dv;
139: struct pdma scc_pdma[2];
140: struct {
141: u_char wr1;
142: u_char wr3;
143: u_char wr4;
144: u_char wr5;
145: u_char wr14;
146: } scc_wreg[2];
1.18 jonathan 147: struct tty *scc_tty[2];
1.1 jonathan 148: int scc_softCAR;
1.34 jonathan 149:
1.18 jonathan 150: int scc_flags[2];
1.36 jonathan 151: #define SCC_CHAN_NEEDSDELAY 0x01 /* sw must delay 1.6us between output*/
152: #define SCC_CHAN_NOMODEM 0x02 /* don't touch modem ctl lines (may
1.18 jonathan 153: be left floating or x-wired */
1.36 jonathan 154: #define SCC_CHAN_MODEM_CROSSED 0x04 /* modem lines wired to other channel*/
155: #define SCC_CHAN_KBDLINE 0x08 /* XXX special-case keyboard lines */
1.18 jonathan 156: int scc_unitflags; /* flags for both channels, e.g. */
157: #define SCC_PREFERRED_CONSOLE 0x01
1.1 jonathan 158: };
159:
160: /*
161: * BRG formula is:
162: * ClockFrequency
1.36 jonathan 163: * BRGconstant = --------------------------- - 2
1.1 jonathan 164: * 2 * BaudRate * ClockDivider
165: *
166: * Speed selections with Pclk=7.3728Mhz, clock x16
167: */
168: struct speedtab sccspeedtab[] = {
169: { 0, 0, },
170: { 50, 4606, },
171: { 75, 3070, },
172: { 110, 2093, },
173: { 134.5, 1711, },
174: { 150, 1534, },
175: { 200, 1150, },
176: { 300, 766, },
177: { 600, 382, },
178: { 1200, 190, },
179: { 1800, 126, },
180: { 2400, 94, },
181: { 4800, 46, },
1.36 jonathan 182: { 7200, 30, }, /* non-POSIX */
1.1 jonathan 183: { 9600, 22, },
1.5 jonathan 184: { 14400, 14, }, /* non-POSIX */
1.1 jonathan 185: { 19200, 10, },
1.5 jonathan 186: { 28800, 6, }, /* non-POSIX */
1.46 kleink 187: { 38400, 4, },
1.18 jonathan 188: { 57600, 2, }, /* non-POSIX */
1.45 jonathan 189: #ifndef SCC_NO_HIGHSPEED
1.18 jonathan 190: { 76800, 1, }, /* non-POSIX, doesn't work reliably */
1.45 jonathan 191: { 115200, 0 }, /* non-POSIX, doesn't work reliably */
1.34 jonathan 192: #endif
1.1 jonathan 193: { -1, -1, },
194: };
195:
196: #ifndef PORTSELECTOR
197: #define ISPEED TTYDEF_SPEED
198: #define LFLAG TTYDEF_LFLAG
199: #else
200: #define ISPEED B4800
201: #define LFLAG (TTYDEF_LFLAG & ~ECHO)
202: #endif
203:
204: /* Definition of the driver for autoconfig. */
1.28 jonathan 205: static int sccmatch __P((struct device *parent, struct cfdata *cf,
1.36 jonathan 206: void *aux));
1.18 jonathan 207: static void sccattach __P((struct device *parent, struct device *self,
1.36 jonathan 208: void *aux));
1.10 thorpej 209:
1.75 thorpej 210: CFATTACH_DECL(scc, sizeof (struct scc_softc),
211: sccmatch, sccattach, NULL, NULL);
1.10 thorpej 212:
1.31 thorpej 213: extern struct cfdriver scc_cd;
1.1 jonathan 214:
1.72 gehenna 215: dev_type_open(sccopen);
216: dev_type_close(sccclose);
217: dev_type_read(sccread);
218: dev_type_write(sccwrite);
219: dev_type_ioctl(sccioctl);
220: dev_type_stop(sccstop);
221: dev_type_tty(scctty);
222: dev_type_poll(sccpoll);
223:
224: const struct cdevsw scc_cdevsw = {
225: sccopen, sccclose, sccread, sccwrite, sccioctl,
1.76 jdolecek 226: sccstop, scctty, sccpoll, nommap, ttykqfilter, D_TTY
1.72 gehenna 227: };
228:
1.60 simonb 229: /* QVSS-compatible in-kernel X input event parser, pointer tracker */
230: void (*sccDivertXInput) __P((int));
231: void (*sccMouseEvent) __P((void *));
232: void (*sccMouseButtons) __P((void *));
233:
234: static void sccPollc __P((dev_t, int));
235: static int sccparam __P((struct tty *, struct termios *));
236: static void sccstart __P((struct tty *));
237: static int sccmctl __P((dev_t, int, int));
1.18 jonathan 238: static int cold_sccparam __P((struct tty *, struct termios *,
1.36 jonathan 239: struct scc_softc *sc));
1.1 jonathan 240:
1.18 jonathan 241: #ifdef SCC_DEBUG
242: static void rr __P((char *, scc_regmap_t *));
243: #endif
1.1 jonathan 244: static void scc_modem_intr __P((dev_t));
245: static void sccreset __P((struct scc_softc *));
246:
1.62 simonb 247: #if NRASTERCONSOLE > 0
1.60 simonb 248: static void scc_kbd_init __P((struct scc_softc *sc, dev_t dev));
249: static void scc_mouse_init __P((struct scc_softc *sc, dev_t dev));
1.62 simonb 250: #endif
1.60 simonb 251: static void scc_tty_init __P((struct scc_softc *sc, dev_t dev));
1.38 jonathan 252:
1.39 jonathan 253: static void scc_txintr __P((struct scc_softc *, int, scc_regmap_t *));
254: static void scc_rxintr __P((struct scc_softc *, int, scc_regmap_t *, int));
255: static void scc_stintr __P((struct scc_softc *, int, scc_regmap_t *, int));
1.60 simonb 256: static int sccintr __P((void *));
1.39 jonathan 257:
1.18 jonathan 258: /*
259: * console variables, for using serial console while still cold and
260: * autoconfig has not attached the scc device.
1.36 jonathan 261: */
1.18 jonathan 262: scc_regmap_t *scc_cons_addr = 0;
263: static struct scc_softc coldcons_softc;
264: static struct consdev scccons = {
1.79 drochner 265: NULL, NULL, sccGetc, sccPutc, sccPollc, NULL, NULL, NULL,
266: NODEV, 0
1.18 jonathan 267: };
268:
269: void
1.63 nisimura 270: scc_cnattach(base, offset)
271: u_int32_t base;
272: u_int32_t offset;
273: {
1.18 jonathan 274: scc_regmap_t *sccaddr;
275: struct scc_softc *sc;
1.63 nisimura 276: int dev;
277:
278: /* XXX XXX XXX */
279: dev = 0;
280: if (systype == DS_3MIN || systype == DS_3MAXPLUS)
281: dev = SCCCOMM3_PORT;
282: else if (systype == DS_MAXINE)
283: dev = SCCCOMM2_PORT;
284: /* XXX XXX XXX */
1.18 jonathan 285:
1.63 nisimura 286: sccaddr = (void *)(base + offset);
1.18 jonathan 287: /* Save address in case we're cold. */
288: if (cold && scc_cons_addr == 0) {
289: scc_cons_addr = sccaddr;
290: sc = &coldcons_softc;
291: coldcons_softc.scc_pdma[0].p_addr = sccaddr;
292: coldcons_softc.scc_pdma[1].p_addr = sccaddr;
293: } else {
294: /* being called from sccattach() to reset console */
295: sc = scc_cd.cd_devs[SCCUNIT(dev)];
296: }
1.36 jonathan 297:
1.18 jonathan 298: /* Reset chip. */
1.44 jonathan 299: /* XXX make sure sccreset() called only once for this chip? */
1.18 jonathan 300: sccreset(sc);
1.9 jonathan 301:
1.63 nisimura 302: cn_tab = &scccons;
1.72 gehenna 303: cn_tab->cn_dev = makedev(cdevsw_lookup_major(&scc_cdevsw), dev);
1.63 nisimura 304: cn_tab->cn_pri = CN_NORMAL;
1.44 jonathan 305: sc->scc_softCAR |= 1 << SCCLINE(cn_tab->cn_dev);
306: scc_tty_init(sc, cn_tab->cn_dev);
1.18 jonathan 307: }
308:
1.64 nisimura 309: #if NRASTERCONSOLE > 0
1.63 nisimura 310: void
311: scc_lk201_cnattach(base, offset)
312: u_int32_t base;
313: u_int32_t offset;
314: {
315: dev_t dev;
316:
1.72 gehenna 317: dev = makedev(cdevsw_lookup_major(&scc_cdevsw), SCCKBD_PORT);
1.63 nisimura 318: lk_divert(sccGetc, dev);
319:
320: cn_tab = &scccons;
321: cn_tab->cn_pri = CN_NORMAL;
322: cn_tab->cn_getc = lk_getc;
323: rcons_indev(cn_tab); /* cn_dev & cn_putc */
324: }
1.64 nisimura 325: #endif
1.1 jonathan 326:
327: /*
328: * Test to see if device is present.
329: * Return true if found.
330: */
1.60 simonb 331: static int
1.28 jonathan 332: sccmatch(parent, cf, aux)
1.1 jonathan 333: struct device *parent;
1.28 jonathan 334: struct cfdata *cf;
1.1 jonathan 335: void *aux;
336: {
1.12 mhitch 337: struct ioasicdev_attach_args *d = aux;
1.1 jonathan 338: void *sccaddr;
339:
1.18 jonathan 340: /* Make sure that we're looking for this type of device. */
341: if ((strncmp(d->iada_modname, "z8530 ", TC_ROM_LLEN) != 0) &&
342: (strncmp(d->iada_modname, "scc", TC_ROM_LLEN)!= 0))
343: return (0);
1.51 simonb 344:
1.20 jonathan 345: /*
346: * Check user-specified offset against the ioasic offset.
347: * Allow it to be wildcarded.
348: */
1.27 jtk 349: if (cf->cf_loc[IOASICCF_OFFSET] != IOASICCF_OFFSET_DEFAULT &&
350: cf->cf_loc[IOASICCF_OFFSET] != d->iada_offset)
1.1 jonathan 351: return (0);
352:
353: /* Get the address, and check it for validity. */
1.18 jonathan 354: sccaddr = (void *)d->iada_addr;
355: #ifdef SPARSE
356: sccaddr = (void *)TC_DENSE_TO_SPARSE((tc_addr_t)sccaddr);
357: #endif
1.1 jonathan 358: if (badaddr(sccaddr, 2))
359: return (0);
360:
361: return (1);
362: }
363:
1.60 simonb 364: static void
1.1 jonathan 365: sccattach(parent, self, aux)
366: struct device *parent;
367: struct device *self;
368: void *aux;
369: {
370: struct scc_softc *sc = (struct scc_softc *)self;
1.12 mhitch 371: struct ioasicdev_attach_args *d = aux;
1.1 jonathan 372: struct pdma *pdp;
373: struct tty *tp;
374: void *sccaddr;
375: int cntr;
1.38 jonathan 376: #if 0
1.1 jonathan 377: struct termios cterm;
378: struct tty ctty;
379: int s;
1.38 jonathan 380: #endif
1.34 jonathan 381: int unit;
1.1 jonathan 382:
383: unit = sc->sc_dv.dv_unit;
384:
1.25 jonathan 385: sccaddr = (void*)MIPS_PHYS_TO_KSEG1(d->iada_addr);
1.1 jonathan 386:
387: /* Register the interrupt handler. */
1.12 mhitch 388: ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_TTY,
1.6 jonathan 389: sccintr, (void *)sc);
390:
1.1 jonathan 391: /*
1.39 jonathan 392: * If this is the console, wait a while for any previous
393: * output to complete.
1.1 jonathan 394: */
1.39 jonathan 395: if (CONSOLE_ON_UNIT(unit))
1.1 jonathan 396: DELAY(10000);
1.21 mellon 397:
1.1 jonathan 398: pdp = &sc->scc_pdma[0];
399:
400: /* init pseudo DMA structures */
401: for (cntr = 0; cntr < 2; cntr++) {
402: pdp->p_addr = (void *)sccaddr;
1.18 jonathan 403: tp = sc->scc_tty[cntr] = ttymalloc();
1.40 jonathan 404: if (systype == DS_MAXINE || cntr == 0)
1.13 mhitch 405: tty_attach(tp); /* XXX */
1.1 jonathan 406: pdp->p_arg = (long)tp;
1.60 simonb 407: pdp->p_fcn = NULL;
1.1 jonathan 408: tp->t_dev = (dev_t)((unit << 1) | cntr);
409: pdp++;
410: }
411: /* What's the warning here? Defaulting to softCAR on line 2? */
1.39 jonathan 412: sc->scc_softCAR = sc->sc_dv.dv_cfdata->cf_flags;
1.1 jonathan 413:
1.39 jonathan 414: /*
415: * Reset chip, initialize register-copies in softc.
416: * XXX if this was console, no more printf()s until after
417: * scc_tty_init()!
418: */
1.1 jonathan 419: sccreset(sc);
420:
1.39 jonathan 421:
1.1 jonathan 422: /*
423: * Special handling for consoles.
424: */
1.39 jonathan 425: if (CONSOLE_ON_UNIT(unit)) {
1.9 jonathan 426: /*
427: * We were using PROM callbacks for console I/O,
428: * and we just reset the chip under the console.
1.39 jonathan 429: * Re-wire this unit up as console ASAP.
1.9 jonathan 430: */
1.42 mhitch 431: sc->scc_softCAR |= 1 << SCCLINE(cn_tab->cn_dev);
1.38 jonathan 432: scc_tty_init(sc, cn_tab->cn_dev);
1.18 jonathan 433:
1.39 jonathan 434: DELAY(20000);
435:
1.38 jonathan 436: printf(": console");
1.9 jonathan 437: }
1.39 jonathan 438: printf("\n");
439:
440:
441: /* Wire up any childre, like keyboards or mice. */
1.58 simonb 442: #if NRASTERCONSOLE > 0
1.40 jonathan 443: if (systype != DS_MAXINE) {
1.72 gehenna 444: int maj;
445: maj = cdevsw_lookup_major(&scc_cdevsw);
1.38 jonathan 446: if (unit == 1) {
1.72 gehenna 447: scc_kbd_init(sc, makedev(maj, SCCKBD_PORT));
1.38 jonathan 448: } else if (unit == 0) {
1.72 gehenna 449: scc_mouse_init(sc, makedev(maj, SCCMOUSE_PORT));
1.1 jonathan 450: }
1.38 jonathan 451: }
1.58 simonb 452: #endif /* NRASTERCONSOLE > 0 */
1.38 jonathan 453:
454: }
455:
456:
457: /*
458: * Initialize line parameters for a serial console.
459: */
1.60 simonb 460: static void
1.38 jonathan 461: scc_tty_init(sc, dev)
462: struct scc_softc *sc;
463: dev_t dev;
464: {
465: struct termios cterm;
466: struct tty ctty;
467: int s;
468:
469: s = spltty();
470: ctty.t_dev = dev;
471: cterm.c_cflag = (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8;
472: /* XXX -- why on pmax, not on Alpha? */
473: cterm.c_cflag |= CLOCAL;
474: cterm.c_ospeed = cterm.c_ispeed = 9600;
1.44 jonathan 475: /* scc_tty_init() may be called when very cold */
476: (void) cold_sccparam(&ctty, &cterm, sc);
1.38 jonathan 477: DELAY(1000);
478: splx(s);
479: }
480:
1.62 simonb 481: #if NRASTERCONSOLE > 0
1.60 simonb 482: static void
1.38 jonathan 483: scc_kbd_init(sc, dev)
484: struct scc_softc *sc;
485: dev_t dev;
486: {
487: struct termios cterm;
488: struct tty ctty;
489: int s;
490:
491: s = spltty();
492: ctty.t_dev = dev;
493: cterm.c_cflag = CS8;
494: /* XXX -- why on pmax, not on Alpha? */
495: cterm.c_cflag |= CLOCAL;
496: cterm.c_ospeed = cterm.c_ispeed = 4800;
497: (void) sccparam(&ctty, &cterm);
498: DELAY(10000);
499: #ifdef notyet
500: /*
501: * For some reason doing this hangs the 3min
502: * during booting. Fortunately the keyboard
503: * works ok without it.
504: */
1.55 ad 505: lk_reset(ctty.t_dev, sccPutc);
1.38 jonathan 506: #endif /* notyet */
507: DELAY(10000);
508: splx(s);
509:
510: }
511:
1.60 simonb 512: static void
1.38 jonathan 513: scc_mouse_init(sc, dev)
514: struct scc_softc *sc;
515: dev_t dev;
516: {
517: struct termios cterm;
518: struct tty ctty;
519: int s;
1.72 gehenna 520: #if NRASTERCONSOLE > 0
521: extern const struct cdevsw rcons_cdevsw;
522: #endif
1.38 jonathan 523:
524: s = spltty();
525: ctty.t_dev = dev;
526: cterm.c_cflag = CS8 | PARENB | PARODD;
527: cterm.c_ospeed = cterm.c_ispeed = 4800;
528: (void) sccparam(&ctty, &cterm);
1.58 simonb 529: #if NRASTERCONSOLE > 0
1.40 jonathan 530: /*
531: * This is a hack. As Ted Lemon observed, we want bstreams,
532: * or failing that, a line discipline to do the inkernel DEC
533: * mouse tracking required by Xservers.
534: */
1.72 gehenna 535: if (cdevsw_lookup(cn_tab->cn_dev) != &rcons_cdevsw)
1.40 jonathan 536: goto done;
537:
1.38 jonathan 538: DELAY(10000);
1.55 ad 539: lk_mouseinit(ctty.t_dev, sccPutc, sccGetc);
1.38 jonathan 540: DELAY(10000);
1.40 jonathan 541:
542: done:
1.58 simonb 543: #endif /* NRASTERCONSOLE > 0 */
1.40 jonathan 544:
1.38 jonathan 545: splx(s);
1.9 jonathan 546: }
1.62 simonb 547: #endif
1.9 jonathan 548:
1.1 jonathan 549:
550: /*
1.18 jonathan 551: * Reset the chip and the softc state.
552: * Resetting clobbers chip state and copies of registers for both channels.
553: * The driver assumes this is only ever called once per unit.
1.1 jonathan 554: */
555: static void
556: sccreset(sc)
1.51 simonb 557: struct scc_softc *sc;
1.1 jonathan 558: {
1.51 simonb 559: scc_regmap_t *regs;
560: u_char val;
1.1 jonathan 561:
562: regs = (scc_regmap_t *)sc->scc_pdma[0].p_addr;
563: /*
564: * Chip once-only initialization
565: *
566: * NOTE: The wiring we assume is the one on the 3min:
567: *
568: * out A-TxD --> TxD keybd or mouse
569: * in A-RxD --> RxD keybd or mouse
570: * out A-DTR~ --> DTR comm
571: * out A-RTS~ --> RTS comm
572: * in A-CTS~ --> SI comm
573: * in A-DCD~ --> RI comm
574: * in A-SYNCH~--> DSR comm
575: * out B-TxD --> TxD comm
576: * in B-RxD --> RxD comm
577: * in B-RxC --> TRxCB comm
578: * in B-TxC --> RTxCB comm
579: * out B-RTS~ --> SS comm
580: * in B-CTS~ --> CTS comm
581: * in B-DCD~ --> CD comm
582: */
583: SCC_INIT_REG(regs, SCC_CHANNEL_A);
584: SCC_INIT_REG(regs, SCC_CHANNEL_B);
585:
586: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, ZSWR9_HARD_RESET);
587: DELAY(50000); /*enough ? */
588: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, 0);
589:
590: /* program the interrupt vector */
591: SCC_WRITE_REG(regs, SCC_CHANNEL_A, ZSWR_IVEC, 0xf0);
592: SCC_WRITE_REG(regs, SCC_CHANNEL_B, ZSWR_IVEC, 0xf0);
593: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, ZSWR9_VECTOR_INCL_STAT);
594:
595: /* receive parameters and control */
596: sc->scc_wreg[SCC_CHANNEL_A].wr3 = 0;
597: sc->scc_wreg[SCC_CHANNEL_B].wr3 = 0;
598:
599: /* timing base defaults */
600: sc->scc_wreg[SCC_CHANNEL_A].wr4 = ZSWR4_CLK_X16;
1.36 jonathan 601: sc->scc_wreg[SCC_CHANNEL_B].wr4 = ZSWR4_CLK_X16;
1.1 jonathan 602:
603: /* enable DTR, RTS and SS */
604: sc->scc_wreg[SCC_CHANNEL_B].wr5 = ZSWR5_RTS;
605: sc->scc_wreg[SCC_CHANNEL_A].wr5 = ZSWR5_RTS | ZSWR5_DTR;
606:
607: /* baud rates */
608: val = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
609: sc->scc_wreg[SCC_CHANNEL_B].wr14 = val;
610: sc->scc_wreg[SCC_CHANNEL_A].wr14 = val;
611:
612: /* interrupt conditions */
613: val = ZSWR1_RIE | ZSWR1_PE_SC | ZSWR1_SIE | ZSWR1_TIE;
614: sc->scc_wreg[SCC_CHANNEL_A].wr1 = val;
615: sc->scc_wreg[SCC_CHANNEL_B].wr1 = val;
616: }
617:
618: int
1.80 ! simonb 619: sccopen(dev, flag, mode, l)
1.1 jonathan 620: dev_t dev;
621: int flag, mode;
1.80 ! simonb 622: struct lwp *l;
1.1 jonathan 623: {
1.51 simonb 624: struct scc_softc *sc;
625: struct tty *tp;
626: int unit, line;
1.1 jonathan 627: int s, error = 0;
628:
629: unit = SCCUNIT(dev);
1.10 thorpej 630: if (unit >= scc_cd.cd_ndevs)
1.1 jonathan 631: return (ENXIO);
1.10 thorpej 632: sc = scc_cd.cd_devs[unit];
1.1 jonathan 633: if (!sc)
634: return (ENXIO);
635:
636: line = SCCLINE(dev);
637: if (sc->scc_pdma[line].p_addr == NULL)
638: return (ENXIO);
1.18 jonathan 639: tp = sc->scc_tty[line];
1.13 mhitch 640: if (tp == NULL) {
1.18 jonathan 641: tp = sc->scc_tty[line] = ttymalloc();
1.13 mhitch 642: tty_attach(tp);
643: }
1.1 jonathan 644: tp->t_oproc = sccstart;
645: tp->t_param = sccparam;
646: tp->t_dev = dev;
1.39 jonathan 647:
648: /*
649: * Do the following only for first opens.
650: */
651: s = spltty();
1.33 jonathan 652: if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
653: ttychars(tp);
1.1 jonathan 654: #ifndef PORTSELECTOR
655: if (tp->t_ispeed == 0) {
656: #endif
657: tp->t_iflag = TTYDEF_IFLAG;
658: tp->t_oflag = TTYDEF_OFLAG;
659: tp->t_cflag = TTYDEF_CFLAG;
660: tp->t_lflag = LFLAG;
661: tp->t_ispeed = tp->t_ospeed = ISPEED;
662: #ifdef PORTSELECTOR
663: tp->t_cflag |= HUPCL;
664: #else
665: }
666: #endif
667: (void) sccparam(tp, &tp->t_termios);
668: ttsetwater(tp);
1.39 jonathan 669: }
670: else if ((tp->t_state & TS_XCLUDE) && curproc->p_ucred->cr_uid != 0) {
671: error = EBUSY;
672: splx(s);
673: goto bad;
674: }
1.1 jonathan 675: (void) sccmctl(dev, DML_DTR, DMSET);
1.39 jonathan 676:
1.1 jonathan 677: while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
1.36 jonathan 678: !(tp->t_state & TS_CARR_ON)) {
1.33 jonathan 679: tp->t_wopen++;
1.70 simonb 680: error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, ttopen, 0);
1.33 jonathan 681: tp->t_wopen--;
682: if (error != 0)
1.1 jonathan 683: break;
684: }
685: splx(s);
1.39 jonathan 686:
1.1 jonathan 687: if (error)
1.39 jonathan 688: goto bad;
689:
1.66 eeh 690: error = (*tp->t_linesw->l_open)(dev, tp);
1.29 jonathan 691:
1.39 jonathan 692: if (error)
693: goto bad;
694: bad:
1.29 jonathan 695: return (error);
1.1 jonathan 696: }
697:
698: /*ARGSUSED*/
699: int
1.80 ! simonb 700: sccclose(dev, flag, mode, l)
1.1 jonathan 701: dev_t dev;
702: int flag, mode;
1.80 ! simonb 703: struct lwp *l;
1.1 jonathan 704: {
1.51 simonb 705: struct scc_softc *sc = scc_cd.cd_devs[SCCUNIT(dev)];
706: struct tty *tp;
707: int line;
1.1 jonathan 708:
709: line = SCCLINE(dev);
1.18 jonathan 710: tp = sc->scc_tty[line];
1.1 jonathan 711: if (sc->scc_wreg[line].wr5 & ZSWR5_BREAK) {
712: sc->scc_wreg[line].wr5 &= ~ZSWR5_BREAK;
713: ttyoutput(0, tp);
714: }
1.66 eeh 715: (*tp->t_linesw->l_close)(tp, flag);
1.33 jonathan 716: if ((tp->t_cflag & HUPCL) || tp->t_wopen ||
1.1 jonathan 717: !(tp->t_state & TS_ISOPEN))
718: (void) sccmctl(dev, 0, DMSET);
719: return (ttyclose(tp));
720: }
721:
722: int
723: sccread(dev, uio, flag)
724: dev_t dev;
725: struct uio *uio;
726: int flag;
727: {
1.51 simonb 728: struct scc_softc *sc;
729: struct tty *tp;
1.1 jonathan 730:
1.18 jonathan 731: sc = scc_cd.cd_devs[SCCUNIT(dev)]; /* XXX*/
732: tp = sc->scc_tty[SCCLINE(dev)];
1.66 eeh 733: return ((*tp->t_linesw->l_read)(tp, uio, flag));
1.1 jonathan 734: }
735:
736: int
737: sccwrite(dev, uio, flag)
738: dev_t dev;
739: struct uio *uio;
740: int flag;
741: {
1.51 simonb 742: struct scc_softc *sc;
743: struct tty *tp;
1.1 jonathan 744:
1.18 jonathan 745: sc = scc_cd.cd_devs[SCCUNIT(dev)]; /* XXX*/
746: tp = sc->scc_tty[SCCLINE(dev)];
1.66 eeh 747: return ((*tp->t_linesw->l_write)(tp, uio, flag));
1.69 scw 748: }
749:
750: int
1.80 ! simonb 751: sccpoll(dev, events, l)
1.69 scw 752: dev_t dev;
753: int events;
1.80 ! simonb 754: struct lwp *l;
1.69 scw 755: {
756: struct scc_softc *sc;
757: struct tty *tp;
758:
759: sc = scc_cd.cd_devs[SCCUNIT(dev)]; /* XXX*/
760: tp = sc->scc_tty[SCCLINE(dev)];
1.80 ! simonb 761: return ((*tp->t_linesw->l_poll)(tp, events, l));
1.1 jonathan 762: }
763:
764: struct tty *
765: scctty(dev)
1.36 jonathan 766: dev_t dev;
1.1 jonathan 767: {
1.51 simonb 768: struct scc_softc *sc;
769: struct tty *tp;
770: int unit = SCCUNIT(dev);
1.1 jonathan 771:
1.18 jonathan 772: if ((unit >= scc_cd.cd_ndevs) || (sc = scc_cd.cd_devs[unit]) == 0)
773: return (0);
774: tp = sc->scc_tty[SCCLINE(dev)];
1.36 jonathan 775: return (tp);
1.1 jonathan 776: }
777:
778: /*ARGSUSED*/
779: int
1.80 ! simonb 780: sccioctl(dev, cmd, data, flag, l)
1.1 jonathan 781: dev_t dev;
782: u_long cmd;
783: caddr_t data;
784: int flag;
1.80 ! simonb 785: struct lwp *l;
1.1 jonathan 786: {
1.51 simonb 787: struct scc_softc *sc;
788: struct tty *tp;
1.1 jonathan 789: int error, line;
790:
1.18 jonathan 791: line = SCCLINE(dev);
792: sc = scc_cd.cd_devs[SCCUNIT(dev)];
793: tp = sc->scc_tty[line];
1.71 atatat 794:
1.80 ! simonb 795: error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
1.71 atatat 796: if (error != EPASSTHROUGH)
1.1 jonathan 797: return (error);
1.71 atatat 798:
1.80 ! simonb 799: error = ttioctl(tp, cmd, data, flag, l);
1.71 atatat 800: if (error != EPASSTHROUGH)
1.1 jonathan 801: return (error);
802:
803: switch (cmd) {
804:
805: case TIOCSBRK:
806: sc->scc_wreg[line].wr5 |= ZSWR5_BREAK;
807: ttyoutput(0, tp);
808: break;
809:
810: case TIOCCBRK:
811: sc->scc_wreg[line].wr5 &= ~ZSWR5_BREAK;
812: ttyoutput(0, tp);
813: break;
814:
815: case TIOCSDTR:
816: (void) sccmctl(dev, DML_DTR|DML_RTS, DMBIS);
817: break;
818:
819: case TIOCCDTR:
820: (void) sccmctl(dev, DML_DTR|DML_RTS, DMBIC);
821: break;
822:
823: case TIOCMSET:
824: (void) sccmctl(dev, *(int *)data, DMSET);
825: break;
826:
827: case TIOCMBIS:
828: (void) sccmctl(dev, *(int *)data, DMBIS);
829: break;
830:
831: case TIOCMBIC:
832: (void) sccmctl(dev, *(int *)data, DMBIC);
833: break;
834:
835: case TIOCMGET:
836: *(int *)data = sccmctl(dev, 0, DMGET);
837: break;
838:
839: default:
1.71 atatat 840: return (EPASSTHROUGH);
1.1 jonathan 841: }
842: return (0);
843: }
844:
1.34 jonathan 845:
1.36 jonathan 846:
1.18 jonathan 847: /*
848: * Set line parameters -- tty t_param entry point.
849: */
1.60 simonb 850: static int
1.1 jonathan 851: sccparam(tp, t)
1.51 simonb 852: struct tty *tp;
853: struct termios *t;
1.1 jonathan 854: {
1.51 simonb 855: struct scc_softc *sc;
1.18 jonathan 856:
857: /* Extract the softc and call cold_sccparam to do all the work. */
858: sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
859: return cold_sccparam(tp, t, sc);
860: }
861:
862:
1.36 jonathan 863: /*
864: * Do what sccparam() (t_param entry point) does, but callable when cold.
1.18 jonathan 865: */
866: static int
867: cold_sccparam(tp, t, sc)
1.51 simonb 868: struct tty *tp;
869: struct termios *t;
870: struct scc_softc *sc;
871: {
872: scc_regmap_t *regs;
873: int line;
874: u_char value, wvalue;
875: int cflag = t->c_cflag;
1.1 jonathan 876: int ospeed;
877:
1.36 jonathan 878: /* Check arguments */
1.18 jonathan 879: if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1.36 jonathan 880: return (EINVAL);
1.1 jonathan 881: ospeed = ttspeedtab(t->c_ospeed, sccspeedtab);
1.36 jonathan 882: if (ospeed < 0)
883: return (EINVAL);
884: /* and copy to tty */
885: tp->t_ispeed = t->c_ispeed;
886: tp->t_ospeed = t->c_ospeed;
887: tp->t_cflag = cflag;
1.1 jonathan 888:
1.45 jonathan 889: if (t->c_ospeed == 0) {
1.1 jonathan 890: (void) sccmctl(tp->t_dev, 0, DMSET); /* hang up line */
891: return (0);
892: }
893:
894: line = SCCLINE(tp->t_dev);
895: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
896:
897: /*
898: * pmax driver used to reset the SCC here. That reset causes the
1.38 jonathan 899: * other channel on the SCC to drop output chars: at least that's
1.1 jonathan 900: * what CGD reports for the Alpha. It's a bug.
901: */
902: #if 0
903: /* reset line */
904: if (line == SCC_CHANNEL_A)
905: value = ZSWR9_A_RESET;
906: else
907: value = ZSWR9_B_RESET;
908: SCC_WRITE_REG(regs, line, SCC_WR9, value);
909: DELAY(25);
910: #endif
911:
912: /* stop bits, normally 1 */
913: value = sc->scc_wreg[line].wr4 & 0xf0;
914: if (cflag & CSTOPB)
915: value |= ZSWR4_TWOSB;
916: else
917: value |= ZSWR4_ONESB;
918: if ((cflag & PARODD) == 0)
919: value |= ZSWR4_EVENP;
920: if (cflag & PARENB)
921: value |= ZSWR4_PARENB;
922:
923: /* set it now, remember it must be first after reset */
924: sc->scc_wreg[line].wr4 = value;
925: SCC_WRITE_REG(regs, line, SCC_WR4, value);
926:
927: /* vector again */
928: SCC_WRITE_REG(regs, line, ZSWR_IVEC, 0xf0);
929:
930: /* clear break, keep rts dtr */
931: wvalue = sc->scc_wreg[line].wr5 & (ZSWR5_DTR|ZSWR5_RTS);
932: switch (cflag & CSIZE) {
933: case CS5:
934: value = ZSWR3_RX_5;
935: wvalue |= ZSWR5_TX_5;
936: break;
937: case CS6:
938: value = ZSWR3_RX_6;
939: wvalue |= ZSWR5_TX_6;
940: break;
941: case CS7:
942: value = ZSWR3_RX_7;
943: wvalue |= ZSWR5_TX_7;
944: break;
945: case CS8:
946: default:
947: value = ZSWR3_RX_8;
948: wvalue |= ZSWR5_TX_8;
949: };
950: sc->scc_wreg[line].wr3 = value;
951: SCC_WRITE_REG(regs, line, SCC_WR3, value);
952:
953: sc->scc_wreg[line].wr5 = wvalue;
954: SCC_WRITE_REG(regs, line, SCC_WR5, wvalue);
955:
956: /*
957: * XXX Does the SCC chip require us to refresh the WR5 register
958: * for the other channel after writing the other, or not?
959: */
960: #ifdef notdef
961: /* XXX */
962: {
963: int otherline = (line + 1) & 1;
964: SCC_WRITE_REG(regs, otherline, SCC_WR5, sc->scc_wreg[otherline].wr5);
965: }
966: #endif
967:
968: SCC_WRITE_REG(regs, line, ZSWR_SYNCLO, 0);
969: SCC_WRITE_REG(regs, line, ZSWR_SYNCHI, 0);
970: SCC_WRITE_REG(regs, line, SCC_WR9, ZSWR9_VECTOR_INCL_STAT);
971: SCC_WRITE_REG(regs, line, SCC_WR10, 0);
972: value = ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD |
973: ZSWR11_TRXC_OUT_ENA | ZSWR11_TRXC_BAUD;
974: SCC_WRITE_REG(regs, line, SCC_WR11, value);
975: SCC_SET_TIMING_BASE(regs, line, ospeed);
976: value = sc->scc_wreg[line].wr14;
977: SCC_WRITE_REG(regs, line, SCC_WR14, value);
978:
1.58 simonb 979: value = ZSWR15_BREAK_IE | ZSWR15_CTS_IE | ZSWR15_DCD_IE;
1.1 jonathan 980: SCC_WRITE_REG(regs, line, SCC_WR15, value);
981:
982: /* and now the enables */
983: value = sc->scc_wreg[line].wr3 | ZSWR3_RX_ENABLE;
984: SCC_WRITE_REG(regs, line, SCC_WR3, value);
985: value = sc->scc_wreg[line].wr5 | ZSWR5_TX_ENABLE;
986: sc->scc_wreg[line].wr5 = value;
987: SCC_WRITE_REG(regs, line, SCC_WR5, value);
988:
989: /* master inter enable */
990: value = ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT;
991: SCC_WRITE_REG(regs, line, SCC_WR9, value);
992: SCC_WRITE_REG(regs, line, SCC_WR1, sc->scc_wreg[line].wr1);
1.18 jonathan 993: tc_mb();
1.1 jonathan 994:
995: return (0);
996: }
997:
1.18 jonathan 998:
1.1 jonathan 999: /*
1.51 simonb 1000: * transmission done interrupts
1.1 jonathan 1001: */
1.39 jonathan 1002: static void
1003: scc_txintr(sc, chan, regs)
1004: struct scc_softc *sc;
1005: int chan;
1006: scc_regmap_t *regs;
1.1 jonathan 1007: {
1.51 simonb 1008: struct tty *tp = sc->scc_tty[chan];
1009: struct pdma *dp = &sc->scc_pdma[chan];
1010: int cc;
1.1 jonathan 1011:
1.39 jonathan 1012: tp = sc->scc_tty[chan];
1013: dp = &sc->scc_pdma[chan];
1014: if (dp->p_mem < dp->p_end) {
1015: SCC_WRITE_DATA(regs, chan, *dp->p_mem++);
1.58 simonb 1016: /* Alpha handles the 1.6 msec settle time in hardware */
1.39 jonathan 1017: DELAY(2);
1018: tc_mb();
1019: } else {
1020: tp->t_state &= ~TS_BUSY;
1021: if (tp->t_state & TS_FLUSH)
1022: tp->t_state &= ~TS_FLUSH;
1023: else {
1024: ndflush(&tp->t_outq, dp->p_mem -
1025: (caddr_t) tp->t_outq.c_cf);
1026: dp->p_end = dp->p_mem = tp->t_outq.c_cf;
1027: }
1.68 enami 1028: (*tp->t_linesw->l_start)(tp);
1.39 jonathan 1029: if (tp->t_outq.c_cc == 0 || !(tp->t_state & TS_BUSY)) {
1030: SCC_READ_REG(regs, chan, SCC_RR15, cc);
1031: cc &= ~ZSWR15_TXUEOM_IE;
1032: SCC_WRITE_REG(regs, chan, SCC_WR15, cc);
1033: cc = sc->scc_wreg[chan].wr1 & ~ZSWR1_TIE;
1034: SCC_WRITE_REG(regs, chan, SCC_WR1, cc);
1035: sc->scc_wreg[chan].wr1 = cc;
1.18 jonathan 1036: tc_mb();
1.1 jonathan 1037: }
1.39 jonathan 1038: }
1039: }
1040:
1.51 simonb 1041: /*
1042: * receive interrupts
1.39 jonathan 1043: */
1044: static void
1045: scc_rxintr(sc, chan, regs, unit)
1046: struct scc_softc *sc;
1047: int chan;
1048: scc_regmap_t *regs;
1049: int unit;
1050: {
1.51 simonb 1051: struct tty *tp = sc->scc_tty[chan];
1.39 jonathan 1052: int cc, rr1 = 0, rr2 = 0; /* XXX */
1.58 simonb 1053: #if NRASTERCONSOLE > 0
1.47 ad 1054: char *cp;
1.53 ad 1055: int cl;
1.50 mrg 1056: #endif
1.39 jonathan 1057:
1058: SCC_READ_DATA(regs, chan, cc);
1059: if (rr2 == SCC_RR2_A_RECV_SPECIAL ||
1.1 jonathan 1060: rr2 == SCC_RR2_B_RECV_SPECIAL) {
1.39 jonathan 1061: SCC_READ_REG(regs, chan, SCC_RR1, rr1);
1062: SCC_WRITE_REG(regs, chan, SCC_RR0, ZSWR0_RESET_ERRORS);
1063: if (rr1 & ZSRR1_DO) {
1064: log(LOG_WARNING, "scc%d,%d: silo overflow\n",
1065: unit >> 1, chan);
1.1 jonathan 1066: }
1.39 jonathan 1067: }
1.1 jonathan 1068:
1.39 jonathan 1069: /*
1070: * Keyboard needs special treatment.
1071: */
1.72 gehenna 1072: if (tp == scctty(makedev(cdevsw_lookup_major(&scc_cdevsw),
1073: SCCKBD_PORT))) {
1.37 jonathan 1074: #if defined(DDB) && defined(LK_DO)
1.1 jonathan 1075: if (cc == LK_DO) {
1076: spl0();
1.43 jonathan 1077: console_debugger();
1.39 jonathan 1078: return;
1.1 jonathan 1079: }
1080: #endif
1081: #ifdef DEBUG
1.39 jonathan 1082: debugChar = cc;
1.1 jonathan 1083: #endif
1.39 jonathan 1084: if (sccDivertXInput) {
1085: (*sccDivertXInput)(cc);
1086: return;
1087: }
1.58 simonb 1088: #if NRASTERCONSOLE > 0
1.55 ad 1089: if ((cp = lk_mapchar(cc, &cl)) == NULL)
1.39 jonathan 1090: return;
1.51 simonb 1091:
1.53 ad 1092: while (cl--)
1.47 ad 1093: rcons_input(0, *cp++);
1.1 jonathan 1094: #endif
1.39 jonathan 1095: /*
1096: * Now for mousey
1097: */
1.72 gehenna 1098: } else if (tp == scctty(makedev(cdevsw_lookup_major(&scc_cdevsw),
1099: SCCMOUSE_PORT)) &&
1.39 jonathan 1100: sccMouseButtons) {
1.58 simonb 1101: #if NRASTERCONSOLE > 0
1.39 jonathan 1102: /*XXX*/
1103: mouseInput(cc);
1.34 jonathan 1104: #endif
1.39 jonathan 1105: return;
1106: }
1107: if (!(tp->t_state & TS_ISOPEN)) {
1.70 simonb 1108: wakeup(&tp->t_rawq);
1.1 jonathan 1109: #ifdef PORTSELECTOR
1.39 jonathan 1110: if (!(tp->t_state & TS_WOPEN))
1.1 jonathan 1111: #endif
1.39 jonathan 1112: return;
1113: }
1114: if (rr2 == SCC_RR2_A_RECV_SPECIAL ||
1115: rr2 == SCC_RR2_B_RECV_SPECIAL) {
1116: if (rr1 & ZSRR1_PE)
1117: cc |= TTY_PE;
1118: if (rr1 & ZSRR1_FE)
1119: cc |= TTY_FE;
1120: }
1.66 eeh 1121: (*tp->t_linesw->l_rint)(cc, tp);
1.39 jonathan 1122: }
1123:
1124: /*
1125: * Modem status interrupts
1126: */
1.60 simonb 1127: static void
1.39 jonathan 1128: scc_stintr(sc, chan, regs, unit)
1129: struct scc_softc *sc;
1130: int chan;
1131: scc_regmap_t *regs;
1132: int unit;
1133: {
1134:
1135: SCC_WRITE_REG(regs, chan, SCC_RR0, ZSWR0_RESET_STATUS);
1136: scc_modem_intr(unit | chan);
1137: }
1138:
1139:
1140: /*
1141: * Check for interrupts from all devices.
1142: */
1.60 simonb 1143: static int
1.39 jonathan 1144: sccintr(xxxsc)
1145: void *xxxsc;
1146: {
1.51 simonb 1147: struct scc_softc *sc = (struct scc_softc *)xxxsc;
1148: int unit = (long)sc->sc_dv.dv_unit;
1149: scc_regmap_t *regs;
1150: int rr3;
1.39 jonathan 1151:
1152: regs = (scc_regmap_t *)sc->scc_pdma[0].p_addr;
1153: unit <<= 1;
1154:
1155: /* Note: only channel A has an RR3 */
1156: SCC_READ_REG(regs, SCC_CHANNEL_A, ZSRR_IPEND, rr3);
1.51 simonb 1157:
1.39 jonathan 1158: /*
1159: * Clear interrupt first to avoid a race condition.
1160: * If a new interrupt condition happens while we are
1161: * servicing this one, we will get another interrupt
1162: * shortly. We can NOT just sit here in a loop, or
1163: * we will cause horrible latency for other devices
1164: * on this interrupt level (i.e. sun3x floppy disk).
1165: */
1166:
1167: /*
1.78 simonb 1168: * At least some, maybe all DECstation chips have modem
1.39 jonathan 1169: * leads crosswired: the data comes in one channel and the
1170: * bulkead modem signals for that port are wired to the
1171: * _other_ channel of the chip. Yes, really.
1172: * This code cannot get that right.
1173: */
1174:
1175: /* First look at channel A. */
1176: if (rr3 & (ZSRR3_IP_A_RX | ZSRR3_IP_A_TX | ZSRR3_IP_A_STAT)) {
1177: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_RR0, ZSWR0_CLR_INTR);
1178: if (rr3 & ZSRR3_IP_A_RX)
1179: scc_rxintr(sc, SCC_CHANNEL_A, regs, unit);
1180:
1181: if (rr3 & ZSRR3_IP_A_STAT) {
1182: /* XXX swapped channels */
1183: scc_stintr(sc, SCC_CHANNEL_A, regs, unit);
1.1 jonathan 1184: }
1.39 jonathan 1185:
1186: if (rr3 & ZSRR3_IP_A_TX)
1187: scc_txintr(sc, SCC_CHANNEL_A, regs);
1188: }
1189:
1190: /* Now look at channel B. */
1191: if (rr3 & (ZSRR3_IP_B_RX | ZSRR3_IP_B_TX | ZSRR3_IP_B_STAT)) {
1192: SCC_WRITE_REG(regs, SCC_CHANNEL_B, SCC_RR0, ZSWR0_CLR_INTR);
1193: if (rr3 & ZSRR3_IP_B_RX)
1194: scc_rxintr(sc, SCC_CHANNEL_B, regs, unit);
1195: if (rr3 & ZSRR3_IP_B_STAT) {
1196: /* XXX swapped channels */
1197: scc_stintr(sc, SCC_CHANNEL_B, regs, unit);
1.1 jonathan 1198: }
1.39 jonathan 1199: if (rr3 & ZSRR3_IP_B_TX)
1200: scc_txintr(sc, SCC_CHANNEL_B, regs);
1.1 jonathan 1201: }
1.39 jonathan 1202:
1203: return 1;
1.1 jonathan 1204: }
1205:
1.60 simonb 1206: static void
1.1 jonathan 1207: sccstart(tp)
1.51 simonb 1208: struct tty *tp;
1.1 jonathan 1209: {
1.51 simonb 1210: struct pdma *dp;
1211: scc_regmap_t *regs;
1212: struct scc_softc *sc;
1213: int cc, chan;
1.1 jonathan 1214: u_char temp;
1215: int s, sendone;
1216:
1.10 thorpej 1217: sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
1.1 jonathan 1218: dp = &sc->scc_pdma[SCCLINE(tp->t_dev)];
1219: regs = (scc_regmap_t *)dp->p_addr;
1220: s = spltty();
1221: if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
1222: goto out;
1223: if (tp->t_outq.c_cc <= tp->t_lowat) {
1224: if (tp->t_state & TS_ASLEEP) {
1225: tp->t_state &= ~TS_ASLEEP;
1.70 simonb 1226: wakeup(&tp->t_outq);
1.1 jonathan 1227: }
1228: selwakeup(&tp->t_wsel);
1229: }
1230: if (tp->t_outq.c_cc == 0)
1231: goto out;
1.38 jonathan 1232:
1.4 jonathan 1233: cc = ndqb(&tp->t_outq, 0);
1234:
1.1 jonathan 1235: tp->t_state |= TS_BUSY;
1236: dp->p_end = dp->p_mem = tp->t_outq.c_cf;
1237: dp->p_end += cc;
1238:
1239: /*
1240: * Enable transmission and send the first char, as required.
1241: */
1242: chan = SCCLINE(tp->t_dev);
1243: SCC_READ_REG(regs, chan, SCC_RR0, temp);
1244: sendone = (temp & ZSRR0_TX_READY);
1245: SCC_READ_REG(regs, chan, SCC_RR15, temp);
1246: temp |= ZSWR15_TXUEOM_IE;
1247: SCC_WRITE_REG(regs, chan, SCC_WR15, temp);
1248: temp = sc->scc_wreg[chan].wr1 | ZSWR1_TIE;
1249: SCC_WRITE_REG(regs, chan, SCC_WR1, temp);
1250: sc->scc_wreg[chan].wr1 = temp;
1251: if (sendone) {
1252: #ifdef DIAGNOSTIC
1253: if (cc == 0)
1254: panic("sccstart: No chars");
1.36 jonathan 1255: #endif
1.1 jonathan 1256: SCC_WRITE_DATA(regs, chan, *dp->p_mem++);
1.58 simonb 1257: /* Alpha handles the 1.6 msec settle time in hardware */
1.3 jonathan 1258: DELAY(2);
1.1 jonathan 1259: }
1.18 jonathan 1260: tc_mb();
1.1 jonathan 1261: out:
1262: splx(s);
1263: }
1264:
1265: /*
1266: * Stop output on a line.
1267: */
1268: /*ARGSUSED*/
1.14 mycroft 1269: void
1.1 jonathan 1270: sccstop(tp, flag)
1.51 simonb 1271: struct tty *tp;
1.1 jonathan 1272: int flag;
1273: {
1.51 simonb 1274: struct pdma *dp;
1275: struct scc_softc *sc;
1276: int s;
1.1 jonathan 1277:
1.10 thorpej 1278: sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
1.1 jonathan 1279: dp = &sc->scc_pdma[SCCLINE(tp->t_dev)];
1280: s = spltty();
1281: if (tp->t_state & TS_BUSY) {
1282: dp->p_end = dp->p_mem;
1283: if (!(tp->t_state & TS_TTSTOP))
1284: tp->t_state |= TS_FLUSH;
1285: }
1286: splx(s);
1287: }
1288:
1.60 simonb 1289: static int
1.1 jonathan 1290: sccmctl(dev, bits, how)
1291: dev_t dev;
1292: int bits, how;
1293: {
1.51 simonb 1294: struct scc_softc *sc;
1295: scc_regmap_t *regs;
1296: int line, mbits;
1297: u_char value;
1.1 jonathan 1298: int s;
1299:
1.10 thorpej 1300: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1.1 jonathan 1301: line = SCCLINE(dev);
1302: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
1303: s = spltty();
1304: /*
1305: * only channel B has modem control, however the DTR and RTS
1306: * pins on the comm port are wired to the DTR and RTS A channel
1307: * signals.
1308: */
1309: mbits = DML_DTR | DML_DSR | DML_CAR;
1310: if (line == SCC_CHANNEL_B) {
1311: if (sc->scc_wreg[SCC_CHANNEL_A].wr5 & ZSWR5_DTR)
1312: mbits = DML_DTR | DML_DSR;
1313: else
1314: mbits = 0;
1315: SCC_READ_REG_ZERO(regs, SCC_CHANNEL_B, value);
1316: if (value & ZSRR0_DCD)
1317: mbits |= DML_CAR;
1318: }
1319: switch (how) {
1320: case DMSET:
1321: mbits = bits;
1322: break;
1323:
1324: case DMBIS:
1325: mbits |= bits;
1326: break;
1327:
1328: case DMBIC:
1329: mbits &= ~bits;
1330: break;
1331:
1332: case DMGET:
1333: (void) splx(s);
1334: return (mbits);
1335: }
1336: if (line == SCC_CHANNEL_B) {
1337: if (mbits & DML_DTR)
1338: sc->scc_wreg[SCC_CHANNEL_A].wr5 |= ZSWR5_DTR;
1339: else
1340: sc->scc_wreg[SCC_CHANNEL_A].wr5 &= ~ZSWR5_DTR;
1341: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR5,
1342: sc->scc_wreg[SCC_CHANNEL_A].wr5);
1343: }
1344: if ((mbits & DML_DTR) || (sc->scc_softCAR & (1 << line)))
1.18 jonathan 1345: sc->scc_tty[line]->t_state |= TS_CARR_ON;
1.1 jonathan 1346: (void) splx(s);
1347: return (mbits);
1348: }
1349:
1350: /*
1351: * Check for carrier transition.
1352: */
1353: static void
1354: scc_modem_intr(dev)
1355: dev_t dev;
1356: {
1.51 simonb 1357: scc_regmap_t *regs;
1358: struct scc_softc *sc;
1359: struct tty *tp;
1360: int car, chan;
1361: u_char value;
1.1 jonathan 1362: int s;
1363:
1.18 jonathan 1364: chan = SCCLINE(dev);
1.10 thorpej 1365: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1.18 jonathan 1366: tp = sc->scc_tty[chan];
1.1 jonathan 1367: regs = (scc_regmap_t *)sc->scc_pdma[chan].p_addr;
1.39 jonathan 1368:
1369: if (chan == SCC_CHANNEL_A) {
1.1 jonathan 1370: return;
1.39 jonathan 1371: }
1372:
1.1 jonathan 1373: s = spltty();
1.39 jonathan 1374: SCC_READ_REG_ZERO(regs, chan, value);
1.26 jonathan 1375:
1.1 jonathan 1376: if (sc->scc_softCAR & (1 << chan))
1377: car = 1;
1378: else {
1379: car = value & ZSRR0_DCD;
1380: }
1381:
1.34 jonathan 1382: /* Break on serial console drops into the debugger */
1.26 jonathan 1383: if ((value & ZSRR0_BREAK) && CONSOLE_ON_UNIT(sc->sc_dv.dv_unit)) {
1384: #ifdef DDB
1385: splx(s); /* spl0()? */
1.43 jonathan 1386: console_debugger();
1.26 jonathan 1387: return;
1388: #else
1389: /* XXX maybe fall back to PROM? */
1390: #endif
1391: }
1392:
1.1 jonathan 1393: /*
1.18 jonathan 1394: * The pmax driver follows carrier-detect. The Alpha does not.
1.34 jonathan 1395: * On pmax, ignore hups on a console tty.
1.39 jonathan 1396: * On alpha, a no-op, for historical reasons.
1.1 jonathan 1397: */
1.39 jonathan 1398: if (!CONSOLE_ON_UNIT(sc->sc_dv.dv_unit)) {
1.26 jonathan 1399: if (car) {
1400: /* carrier present */
1401: if (!(tp->t_state & TS_CARR_ON))
1.66 eeh 1402: (void)(*tp->t_linesw->l_modem)(tp, 1);
1.26 jonathan 1403: } else if (tp->t_state & TS_CARR_ON)
1.66 eeh 1404: (void)(*tp->t_linesw->l_modem)(tp, 0);
1.26 jonathan 1405: }
1.1 jonathan 1406: splx(s);
1407: }
1408:
1409: /*
1410: * Get a char off the appropriate line via. a busy wait loop.
1411: */
1412: int
1413: sccGetc(dev)
1414: dev_t dev;
1415: {
1.51 simonb 1416: scc_regmap_t *regs;
1417: int c, line;
1418: u_char value;
1.1 jonathan 1419: int s;
1420:
1421: line = SCCLINE(dev);
1.18 jonathan 1422: if (cold && scc_cons_addr) {
1423: regs = scc_cons_addr;
1424: } else {
1.51 simonb 1425: struct scc_softc *sc;
1.18 jonathan 1426: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1427: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
1428: }
1429:
1.1 jonathan 1430: if (!regs)
1431: return (0);
1.2 jonathan 1432: /*s = spltty(); */ /* XXX why different spls? */
1433: s = splhigh();
1.1 jonathan 1434: for (;;) {
1435: SCC_READ_REG(regs, line, SCC_RR0, value);
1436: if (value & ZSRR0_RX_READY) {
1437: SCC_READ_REG(regs, line, SCC_RR1, value);
1438: SCC_READ_DATA(regs, line, c);
1439: if (value & (ZSRR1_PE | ZSRR1_DO | ZSRR1_FE)) {
1440: SCC_WRITE_REG(regs, line, SCC_WR0,
1.36 jonathan 1441: ZSWR0_RESET_ERRORS);
1.1 jonathan 1442: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR0,
1.36 jonathan 1443: ZSWR0_CLR_INTR);
1.1 jonathan 1444: } else {
1445: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR0,
1.36 jonathan 1446: ZSWR0_CLR_INTR);
1.1 jonathan 1447: splx(s);
1448: return (c & 0xff);
1449: }
1450: } else
1451: DELAY(10);
1452: }
1453: }
1454:
1455: /*
1456: * Send a char on a port, via a busy wait loop.
1457: */
1458: void
1459: sccPutc(dev, c)
1460: dev_t dev;
1461: int c;
1462: {
1.51 simonb 1463: scc_regmap_t *regs;
1464: int line;
1465: u_char value;
1.1 jonathan 1466: int s;
1467:
1468: s = spltty(); /* XXX why different spls? */
1469: line = SCCLINE(dev);
1.18 jonathan 1470: if (cold && scc_cons_addr) {
1471: regs = scc_cons_addr;
1472: } else {
1.51 simonb 1473: struct scc_softc *sc;
1.18 jonathan 1474: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1475: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
1476: }
1.1 jonathan 1477:
1478: /*
1479: * Wait for transmitter to be not busy.
1480: */
1481: do {
1482: SCC_READ_REG(regs, line, SCC_RR0, value);
1483: if (value & ZSRR0_TX_READY)
1484: break;
1485: DELAY(100);
1486: } while (1);
1487:
1488: /*
1489: * Send the char.
1490: */
1491: SCC_WRITE_DATA(regs, line, c);
1.18 jonathan 1492: tc_mb();
1.1 jonathan 1493: splx(s);
1494:
1495: return;
1496: }
1497:
1498: /*
1499: * Enable/disable polling mode
1500: */
1.60 simonb 1501: static void
1.1 jonathan 1502: sccPollc(dev, on)
1503: dev_t dev;
1504: int on;
1505: {
1506: }
1507:
1508: #ifdef SCC_DEBUG
1509: static void
1510: rr(msg, regs)
1511: char *msg;
1512: scc_regmap_t *regs;
1513: {
1514: u_char value;
1515: int r0, r1, r2, r3, r10, r15;
1516:
1.17 christos 1517: printf("%s: register: %lx\n", msg, regs);
1.1 jonathan 1518: #define L(reg, r) { \
1519: SCC_READ_REG(regs, SCC_CHANNEL_A, reg, value); \
1520: r = value; \
1521: }
1522: L(SCC_RR0, r0);
1523: L(SCC_RR1, r1);
1524: L(ZSRR_IVEC, r2);
1525: L(ZSRR_IPEND, r3);
1526: L(SCC_RR10, r10);
1527: L(SCC_RR15, r15);
1.17 christos 1528: printf("A: 0: %x 1: %x 2(vec): %x 3: %x 10: %x 15: %x\n",
1.1 jonathan 1529: r0, r1, r2, r3, r10, r15);
1530: #undef L
1531: #define L(reg, r) { \
1532: SCC_READ_REG(regs, SCC_CHANNEL_B, reg, value); \
1533: r = value; \
1534: }
1535: L(SCC_RR0, r0);
1536: L(SCC_RR1, r1);
1537: L(ZSRR_IVEC, r2);
1538: L(SCC_RR10, r10);
1539: L(SCC_RR15, r15);
1.17 christos 1540: printf("B: 0: %x 1: %x 2(state): %x 10: %x 15: %x\n",
1.1 jonathan 1541: r0, r1, r2, r10, r15);
1542: }
1.2 jonathan 1543: #endif /* SCC_DEBUG */
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