Annotation of src/sys/arch/pmax/tc/scc.c, Revision 1.65
1.65 ! thorpej 1: /* $NetBSD: scc.c,v 1.64 2000/02/09 08:29:40 nisimura Exp $ */
1.1 jonathan 2:
1.36 jonathan 3: /*
1.18 jonathan 4: * Copyright (c) 1991,1990,1989,1994,1995,1996 Carnegie Mellon University
1.36 jonathan 5: * All Rights Reserved.
6: *
1.1 jonathan 7: * Author: Chris G. Demetriou and Jonathan Stone
8: *
9: * Permission to use, copy, modify and distribute this software and its
10: * documentation is hereby granted, provided that both the copyright
11: * notice and this permission notice appear in all copies of the
12: * software, derivative works or modified versions, and any portions
13: * thereof, and that both notices appear in supporting documentation.
1.36 jonathan 14: *
1.49 pk 15: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
1.1 jonathan 16: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
17: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
1.36 jonathan 18: *
1.1 jonathan 19: * Carnegie Mellon requests users of this software to return to
1.36 jonathan 20: *
1.1 jonathan 21: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
22: * School of Computer Science
23: * Carnegie Mellon University
24: * Pittsburgh PA 15213-3890
1.36 jonathan 25: *
1.1 jonathan 26: * any improvements or extensions that they make and grant Carnegie the
27: * rights to redistribute these changes.
28: */
29:
30: /*-
31: * Copyright (c) 1992, 1993
32: * The Regents of the University of California. All rights reserved.
33: *
34: * This code is derived from software contributed to Berkeley by
35: * Ralph Campbell and Rick Macklem.
36: *
37: * Redistribution and use in source and binary forms, with or without
38: * modification, are permitted provided that the following conditions
39: * are met:
40: * 1. Redistributions of source code must retain the above copyright
41: * notice, this list of conditions and the following disclaimer.
42: * 2. Redistributions in binary form must reproduce the above copyright
43: * notice, this list of conditions and the following disclaimer in the
44: * documentation and/or other materials provided with the distribution.
45: * 3. All advertising materials mentioning features or use of this software
46: * must display the following acknowledgement:
47: * This product includes software developed by the University of
48: * California, Berkeley and its contributors.
49: * 4. Neither the name of the University nor the names of its contributors
50: * may be used to endorse or promote products derived from this software
51: * without specific prior written permission.
52: *
53: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
54: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
57: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63: * SUCH DAMAGE.
64: *
1.18 jonathan 65: * @(#)scc.c 8.2 (Berkeley) 11/30/93
1.1 jonathan 66: */
67:
1.29 jonathan 68: #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
1.65 ! thorpej 69: __KERNEL_RCSID(0, "$NetBSD: scc.c,v 1.64 2000/02/09 08:29:40 nisimura Exp $");
1.34 jonathan 70:
1.1 jonathan 71: /*
72: * Intel 82530 dual usart chip driver. Supports the serial port(s) on the
73: * Personal DECstation 5000/xx and DECstation 5000/1xx, plus the keyboard
74: * and mouse on the 5000/1xx. (Don't ask me where the A channel signals
75: * are on the 5000/xx.)
76: *
77: * See: Intel MicroCommunications Handbook, Section 2, pg. 155-173, 1992.
78: */
1.64 nisimura 79:
80: #include "opt_ddb.h"
81: #include "rasterconsole.h"
82:
1.1 jonathan 83: #include <sys/param.h>
84: #include <sys/systm.h>
85: #include <sys/ioctl.h>
86: #include <sys/tty.h>
87: #include <sys/proc.h>
88: #include <sys/conf.h>
89: #include <sys/file.h>
90: #include <sys/kernel.h>
91: #include <sys/syslog.h>
92: #include <sys/device.h>
93:
1.40 jonathan 94: #include <dev/dec/lk201.h>
1.37 jonathan 95: #include <dev/ic/z8530reg.h>
96:
1.61 simonb 97: #include <machine/conf.h>
98: #include <machine/pmioctl.h> /* XXX for pmEventQueue typedef */
1.1 jonathan 99:
1.54 simonb 100: #include <pmax/pmax/cons.h>
1.1 jonathan 101: #include <pmax/pmax/pmaxtype.h>
102: #include <pmax/pmax/maxine.h>
103: #include <pmax/dev/sccreg.h>
1.38 jonathan 104: #include <pmax/dev/rconsvar.h>
1.61 simonb 105: #include <pmax/dev/pdma.h> /* XXXXXX */
1.40 jonathan 106: #include <pmax/dev/lk201var.h>
1.56 simonb 107: #include <pmax/dev/qvssvar.h> /* XXX mouseInput() */
1.61 simonb 108: #include <pmax/tc/sccvar.h>
1.24 jonathan 109:
1.6 jonathan 110: #include <dev/tc/tcvar.h>
111: #include <dev/tc/ioasicvar.h>
112:
1.59 simonb 113: void ttrstrt __P((void *));
1.1 jonathan 114:
1.2 jonathan 115:
116: /*
117: * True iff the console unit is diverted throught this SCC device.
118: * (used to just test if cn_tab->cn_getc was sccGetc, but that
119: * breaks with the new-style glass-tty framebuffer console input.
120: */
121:
122: #define CONSOLE_ON_UNIT(unit) \
123: (major(cn_tab->cn_dev) == SCCDEV && SCCUNIT(cn_tab->cn_dev) == (unit))
1.1 jonathan 124:
1.39 jonathan 125:
1.2 jonathan 126: /*
1.39 jonathan 127: * Extract unit (scc chip), channel on chip, and dialin/dialout unit.
1.2 jonathan 128: */
1.39 jonathan 129: #define SCCUNIT(dev) ((minor(dev) & 0x7ffff) >> 1)
130: #define SCCLINE(dev) (minor(dev) & 0x1)
131: #define SCCDIALOUT(x) (minor(x) & 0x80000)
1.2 jonathan 132:
1.1 jonathan 133: #ifdef DEBUG
134: int debugChar;
135: #endif
136:
137: struct scc_softc {
138: struct device sc_dv;
139: struct pdma scc_pdma[2];
140: struct {
141: u_char wr1;
142: u_char wr3;
143: u_char wr4;
144: u_char wr5;
145: u_char wr14;
146: } scc_wreg[2];
1.18 jonathan 147: struct tty *scc_tty[2];
1.1 jonathan 148: int scc_softCAR;
1.34 jonathan 149:
1.18 jonathan 150: int scc_flags[2];
1.36 jonathan 151: #define SCC_CHAN_NEEDSDELAY 0x01 /* sw must delay 1.6us between output*/
152: #define SCC_CHAN_NOMODEM 0x02 /* don't touch modem ctl lines (may
1.18 jonathan 153: be left floating or x-wired */
1.36 jonathan 154: #define SCC_CHAN_MODEM_CROSSED 0x04 /* modem lines wired to other channel*/
155: #define SCC_CHAN_KBDLINE 0x08 /* XXX special-case keyboard lines */
1.18 jonathan 156: int scc_unitflags; /* flags for both channels, e.g. */
157: #define SCC_PREFERRED_CONSOLE 0x01
1.1 jonathan 158: };
159:
160: /*
161: * BRG formula is:
162: * ClockFrequency
1.36 jonathan 163: * BRGconstant = --------------------------- - 2
1.1 jonathan 164: * 2 * BaudRate * ClockDivider
165: *
166: * Speed selections with Pclk=7.3728Mhz, clock x16
167: */
168: struct speedtab sccspeedtab[] = {
169: { 0, 0, },
170: { 50, 4606, },
171: { 75, 3070, },
172: { 110, 2093, },
173: { 134.5, 1711, },
174: { 150, 1534, },
175: { 200, 1150, },
176: { 300, 766, },
177: { 600, 382, },
178: { 1200, 190, },
179: { 1800, 126, },
180: { 2400, 94, },
181: { 4800, 46, },
1.36 jonathan 182: { 7200, 30, }, /* non-POSIX */
1.1 jonathan 183: { 9600, 22, },
1.5 jonathan 184: { 14400, 14, }, /* non-POSIX */
1.1 jonathan 185: { 19200, 10, },
1.5 jonathan 186: { 28800, 6, }, /* non-POSIX */
1.46 kleink 187: { 38400, 4, },
1.18 jonathan 188: { 57600, 2, }, /* non-POSIX */
1.45 jonathan 189: #ifndef SCC_NO_HIGHSPEED
1.18 jonathan 190: { 76800, 1, }, /* non-POSIX, doesn't work reliably */
1.45 jonathan 191: { 115200, 0 }, /* non-POSIX, doesn't work reliably */
1.34 jonathan 192: #endif
1.1 jonathan 193: { -1, -1, },
194: };
195:
196: #ifndef PORTSELECTOR
197: #define ISPEED TTYDEF_SPEED
198: #define LFLAG TTYDEF_LFLAG
199: #else
200: #define ISPEED B4800
201: #define LFLAG (TTYDEF_LFLAG & ~ECHO)
202: #endif
203:
204: /* Definition of the driver for autoconfig. */
1.28 jonathan 205: static int sccmatch __P((struct device *parent, struct cfdata *cf,
1.36 jonathan 206: void *aux));
1.18 jonathan 207: static void sccattach __P((struct device *parent, struct device *self,
1.36 jonathan 208: void *aux));
1.10 thorpej 209:
210: struct cfattach scc_ca = {
1.18 jonathan 211: sizeof (struct scc_softc), sccmatch, sccattach,
1.10 thorpej 212: };
213:
1.31 thorpej 214: extern struct cfdriver scc_cd;
1.1 jonathan 215:
1.60 simonb 216: /* QVSS-compatible in-kernel X input event parser, pointer tracker */
217: void (*sccDivertXInput) __P((int));
218: void (*sccMouseEvent) __P((void *));
219: void (*sccMouseButtons) __P((void *));
220:
221: static void sccPollc __P((dev_t, int));
222: static int sccparam __P((struct tty *, struct termios *));
223: static void sccstart __P((struct tty *));
224: static int sccmctl __P((dev_t, int, int));
1.18 jonathan 225: static int cold_sccparam __P((struct tty *, struct termios *,
1.36 jonathan 226: struct scc_softc *sc));
1.1 jonathan 227:
1.18 jonathan 228: #ifdef SCC_DEBUG
229: static void rr __P((char *, scc_regmap_t *));
230: #endif
1.1 jonathan 231: static void scc_modem_intr __P((dev_t));
232: static void sccreset __P((struct scc_softc *));
233:
1.62 simonb 234: #if NRASTERCONSOLE > 0
1.60 simonb 235: static void scc_kbd_init __P((struct scc_softc *sc, dev_t dev));
236: static void scc_mouse_init __P((struct scc_softc *sc, dev_t dev));
1.62 simonb 237: #endif
1.60 simonb 238: static void scc_tty_init __P((struct scc_softc *sc, dev_t dev));
1.38 jonathan 239:
1.39 jonathan 240: static void scc_txintr __P((struct scc_softc *, int, scc_regmap_t *));
241: static void scc_rxintr __P((struct scc_softc *, int, scc_regmap_t *, int));
242: static void scc_stintr __P((struct scc_softc *, int, scc_regmap_t *, int));
1.60 simonb 243: static int sccintr __P((void *));
1.39 jonathan 244:
1.18 jonathan 245: /*
246: * console variables, for using serial console while still cold and
247: * autoconfig has not attached the scc device.
1.36 jonathan 248: */
1.18 jonathan 249: scc_regmap_t *scc_cons_addr = 0;
250: static struct scc_softc coldcons_softc;
251: static struct consdev scccons = {
1.65 ! thorpej 252: NULL, NULL, sccGetc, sccPutc, sccPollc, NULL, NODEV, 0
1.18 jonathan 253: };
254:
255: void
1.63 nisimura 256: scc_cnattach(base, offset)
257: u_int32_t base;
258: u_int32_t offset;
259: {
1.18 jonathan 260: scc_regmap_t *sccaddr;
261: struct scc_softc *sc;
1.63 nisimura 262: int dev;
263:
264: /* XXX XXX XXX */
265: dev = 0;
266: if (systype == DS_3MIN || systype == DS_3MAXPLUS)
267: dev = SCCCOMM3_PORT;
268: else if (systype == DS_MAXINE)
269: dev = SCCCOMM2_PORT;
270: /* XXX XXX XXX */
1.18 jonathan 271:
1.63 nisimura 272: sccaddr = (void *)(base + offset);
1.18 jonathan 273: /* Save address in case we're cold. */
274: if (cold && scc_cons_addr == 0) {
275: scc_cons_addr = sccaddr;
276: sc = &coldcons_softc;
277: coldcons_softc.scc_pdma[0].p_addr = sccaddr;
278: coldcons_softc.scc_pdma[1].p_addr = sccaddr;
279: } else {
280: /* being called from sccattach() to reset console */
281: sc = scc_cd.cd_devs[SCCUNIT(dev)];
282: }
1.36 jonathan 283:
1.18 jonathan 284: /* Reset chip. */
1.44 jonathan 285: /* XXX make sure sccreset() called only once for this chip? */
1.18 jonathan 286: sccreset(sc);
1.9 jonathan 287:
1.63 nisimura 288: cn_tab = &scccons;
289: cn_tab->cn_dev = makedev(SCCDEV, dev);
290: cn_tab->cn_pri = CN_NORMAL;
1.44 jonathan 291: sc->scc_softCAR |= 1 << SCCLINE(cn_tab->cn_dev);
292: scc_tty_init(sc, cn_tab->cn_dev);
1.18 jonathan 293: }
294:
1.64 nisimura 295: #if NRASTERCONSOLE > 0
1.63 nisimura 296: void
297: scc_lk201_cnattach(base, offset)
298: u_int32_t base;
299: u_int32_t offset;
300: {
301: dev_t dev;
302:
303: dev = makedev(SCCDEV, SCCKBD_PORT);
304: lk_divert(sccGetc, dev);
305:
306: cn_tab = &scccons;
307: cn_tab->cn_pri = CN_NORMAL;
308: cn_tab->cn_getc = lk_getc;
309: rcons_indev(cn_tab); /* cn_dev & cn_putc */
310: }
1.64 nisimura 311: #endif
1.1 jonathan 312:
313: /*
314: * Test to see if device is present.
315: * Return true if found.
316: */
1.60 simonb 317: static int
1.28 jonathan 318: sccmatch(parent, cf, aux)
1.1 jonathan 319: struct device *parent;
1.28 jonathan 320: struct cfdata *cf;
1.1 jonathan 321: void *aux;
322: {
1.32 jonathan 323: extern struct cfdriver ioasic_cd; /* XXX */
1.12 mhitch 324: struct ioasicdev_attach_args *d = aux;
1.1 jonathan 325: void *sccaddr;
326:
1.18 jonathan 327: if (parent->dv_cfdata->cf_driver != &ioasic_cd) {
1.1 jonathan 328: #ifdef DIAGNOSTIC
1.17 christos 329: printf("Cannot attach scc on %s\n", parent->dv_xname);
1.1 jonathan 330: #endif
1.18 jonathan 331: return (0);
1.1 jonathan 332: }
333:
1.18 jonathan 334: /* Make sure that we're looking for this type of device. */
335: if ((strncmp(d->iada_modname, "z8530 ", TC_ROM_LLEN) != 0) &&
336: (strncmp(d->iada_modname, "scc", TC_ROM_LLEN)!= 0))
337: return (0);
1.51 simonb 338:
1.20 jonathan 339: /*
340: * Check user-specified offset against the ioasic offset.
341: * Allow it to be wildcarded.
342: */
1.27 jtk 343: if (cf->cf_loc[IOASICCF_OFFSET] != IOASICCF_OFFSET_DEFAULT &&
344: cf->cf_loc[IOASICCF_OFFSET] != d->iada_offset)
1.1 jonathan 345: return (0);
346:
347: /* Get the address, and check it for validity. */
1.18 jonathan 348: sccaddr = (void *)d->iada_addr;
349: #ifdef SPARSE
350: sccaddr = (void *)TC_DENSE_TO_SPARSE((tc_addr_t)sccaddr);
351: #endif
1.1 jonathan 352: if (badaddr(sccaddr, 2))
353: return (0);
354:
355: return (1);
356: }
357:
1.60 simonb 358: static void
1.1 jonathan 359: sccattach(parent, self, aux)
360: struct device *parent;
361: struct device *self;
362: void *aux;
363: {
364: struct scc_softc *sc = (struct scc_softc *)self;
1.12 mhitch 365: struct ioasicdev_attach_args *d = aux;
1.1 jonathan 366: struct pdma *pdp;
367: struct tty *tp;
368: void *sccaddr;
369: int cntr;
1.38 jonathan 370: #if 0
1.1 jonathan 371: struct termios cterm;
372: struct tty ctty;
373: int s;
1.38 jonathan 374: #endif
1.34 jonathan 375: int unit;
1.1 jonathan 376:
377: unit = sc->sc_dv.dv_unit;
378:
1.25 jonathan 379: sccaddr = (void*)MIPS_PHYS_TO_KSEG1(d->iada_addr);
1.1 jonathan 380:
381: /* Register the interrupt handler. */
1.12 mhitch 382: ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_TTY,
1.6 jonathan 383: sccintr, (void *)sc);
384:
1.1 jonathan 385: /*
1.39 jonathan 386: * If this is the console, wait a while for any previous
387: * output to complete.
1.1 jonathan 388: */
1.39 jonathan 389: if (CONSOLE_ON_UNIT(unit))
1.1 jonathan 390: DELAY(10000);
1.21 mellon 391:
1.1 jonathan 392: pdp = &sc->scc_pdma[0];
393:
394: /* init pseudo DMA structures */
395: for (cntr = 0; cntr < 2; cntr++) {
396: pdp->p_addr = (void *)sccaddr;
1.18 jonathan 397: tp = sc->scc_tty[cntr] = ttymalloc();
1.40 jonathan 398: if (systype == DS_MAXINE || cntr == 0)
1.13 mhitch 399: tty_attach(tp); /* XXX */
1.1 jonathan 400: pdp->p_arg = (long)tp;
1.60 simonb 401: pdp->p_fcn = NULL;
1.1 jonathan 402: tp->t_dev = (dev_t)((unit << 1) | cntr);
403: pdp++;
404: }
405: /* What's the warning here? Defaulting to softCAR on line 2? */
1.39 jonathan 406: sc->scc_softCAR = sc->sc_dv.dv_cfdata->cf_flags;
1.1 jonathan 407:
1.39 jonathan 408: /*
409: * Reset chip, initialize register-copies in softc.
410: * XXX if this was console, no more printf()s until after
411: * scc_tty_init()!
412: */
1.1 jonathan 413: sccreset(sc);
414:
1.39 jonathan 415:
1.1 jonathan 416: /*
417: * Special handling for consoles.
418: */
1.39 jonathan 419: if (CONSOLE_ON_UNIT(unit)) {
1.9 jonathan 420: /*
421: * We were using PROM callbacks for console I/O,
422: * and we just reset the chip under the console.
1.39 jonathan 423: * Re-wire this unit up as console ASAP.
1.9 jonathan 424: */
1.42 mhitch 425: sc->scc_softCAR |= 1 << SCCLINE(cn_tab->cn_dev);
1.38 jonathan 426: scc_tty_init(sc, cn_tab->cn_dev);
1.18 jonathan 427:
1.39 jonathan 428: DELAY(20000);
429:
1.38 jonathan 430: printf(": console");
1.9 jonathan 431: }
1.39 jonathan 432: printf("\n");
433:
434:
435: /* Wire up any childre, like keyboards or mice. */
1.58 simonb 436: #if NRASTERCONSOLE > 0
1.40 jonathan 437: if (systype != DS_MAXINE) {
1.38 jonathan 438: if (unit == 1) {
439: scc_kbd_init(sc, makedev(SCCDEV, SCCKBD_PORT));
440: } else if (unit == 0) {
441: scc_mouse_init(sc, makedev(SCCDEV, SCCMOUSE_PORT));
1.1 jonathan 442: }
1.38 jonathan 443: }
1.58 simonb 444: #endif /* NRASTERCONSOLE > 0 */
1.38 jonathan 445:
446: }
447:
448:
449: /*
450: * Initialize line parameters for a serial console.
451: */
1.60 simonb 452: static void
1.38 jonathan 453: scc_tty_init(sc, dev)
454: struct scc_softc *sc;
455: dev_t dev;
456: {
457: struct termios cterm;
458: struct tty ctty;
459: int s;
460:
461: s = spltty();
462: ctty.t_dev = dev;
463: cterm.c_cflag = (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8;
464: /* XXX -- why on pmax, not on Alpha? */
465: cterm.c_cflag |= CLOCAL;
466: cterm.c_ospeed = cterm.c_ispeed = 9600;
1.44 jonathan 467: /* scc_tty_init() may be called when very cold */
468: (void) cold_sccparam(&ctty, &cterm, sc);
1.38 jonathan 469: DELAY(1000);
470: splx(s);
471: }
472:
1.62 simonb 473: #if NRASTERCONSOLE > 0
1.60 simonb 474: static void
1.38 jonathan 475: scc_kbd_init(sc, dev)
476: struct scc_softc *sc;
477: dev_t dev;
478: {
479: struct termios cterm;
480: struct tty ctty;
481: int s;
482:
483: s = spltty();
484: ctty.t_dev = dev;
485: cterm.c_cflag = CS8;
486: /* XXX -- why on pmax, not on Alpha? */
487: cterm.c_cflag |= CLOCAL;
488: cterm.c_ospeed = cterm.c_ispeed = 4800;
489: (void) sccparam(&ctty, &cterm);
490: DELAY(10000);
491: #ifdef notyet
492: /*
493: * For some reason doing this hangs the 3min
494: * during booting. Fortunately the keyboard
495: * works ok without it.
496: */
1.55 ad 497: lk_reset(ctty.t_dev, sccPutc);
1.38 jonathan 498: #endif /* notyet */
499: DELAY(10000);
500: splx(s);
501:
502: }
503:
1.60 simonb 504: static void
1.38 jonathan 505: scc_mouse_init(sc, dev)
506: struct scc_softc *sc;
507: dev_t dev;
508: {
509: struct termios cterm;
510: struct tty ctty;
511: int s;
512:
513: s = spltty();
514: ctty.t_dev = dev;
515: cterm.c_cflag = CS8 | PARENB | PARODD;
516: cterm.c_ospeed = cterm.c_ispeed = 4800;
517: (void) sccparam(&ctty, &cterm);
1.58 simonb 518: #if NRASTERCONSOLE > 0
1.40 jonathan 519: /*
520: * This is a hack. As Ted Lemon observed, we want bstreams,
521: * or failing that, a line discipline to do the inkernel DEC
522: * mouse tracking required by Xservers.
523: */
524: if (major(cn_tab->cn_dev) != RCONSDEV)
525: goto done;
526:
1.38 jonathan 527: DELAY(10000);
1.55 ad 528: lk_mouseinit(ctty.t_dev, sccPutc, sccGetc);
1.38 jonathan 529: DELAY(10000);
1.40 jonathan 530:
531: done:
1.58 simonb 532: #endif /* NRASTERCONSOLE > 0 */
1.40 jonathan 533:
1.38 jonathan 534: splx(s);
1.9 jonathan 535: }
1.62 simonb 536: #endif
1.9 jonathan 537:
1.1 jonathan 538:
539: /*
1.18 jonathan 540: * Reset the chip and the softc state.
541: * Resetting clobbers chip state and copies of registers for both channels.
542: * The driver assumes this is only ever called once per unit.
1.1 jonathan 543: */
544: static void
545: sccreset(sc)
1.51 simonb 546: struct scc_softc *sc;
1.1 jonathan 547: {
1.51 simonb 548: scc_regmap_t *regs;
549: u_char val;
1.1 jonathan 550:
551: regs = (scc_regmap_t *)sc->scc_pdma[0].p_addr;
552: /*
553: * Chip once-only initialization
554: *
555: * NOTE: The wiring we assume is the one on the 3min:
556: *
557: * out A-TxD --> TxD keybd or mouse
558: * in A-RxD --> RxD keybd or mouse
559: * out A-DTR~ --> DTR comm
560: * out A-RTS~ --> RTS comm
561: * in A-CTS~ --> SI comm
562: * in A-DCD~ --> RI comm
563: * in A-SYNCH~--> DSR comm
564: * out B-TxD --> TxD comm
565: * in B-RxD --> RxD comm
566: * in B-RxC --> TRxCB comm
567: * in B-TxC --> RTxCB comm
568: * out B-RTS~ --> SS comm
569: * in B-CTS~ --> CTS comm
570: * in B-DCD~ --> CD comm
571: */
572: SCC_INIT_REG(regs, SCC_CHANNEL_A);
573: SCC_INIT_REG(regs, SCC_CHANNEL_B);
574:
575: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, ZSWR9_HARD_RESET);
576: DELAY(50000); /*enough ? */
577: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, 0);
578:
579: /* program the interrupt vector */
580: SCC_WRITE_REG(regs, SCC_CHANNEL_A, ZSWR_IVEC, 0xf0);
581: SCC_WRITE_REG(regs, SCC_CHANNEL_B, ZSWR_IVEC, 0xf0);
582: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, ZSWR9_VECTOR_INCL_STAT);
583:
584: /* receive parameters and control */
585: sc->scc_wreg[SCC_CHANNEL_A].wr3 = 0;
586: sc->scc_wreg[SCC_CHANNEL_B].wr3 = 0;
587:
588: /* timing base defaults */
589: sc->scc_wreg[SCC_CHANNEL_A].wr4 = ZSWR4_CLK_X16;
1.36 jonathan 590: sc->scc_wreg[SCC_CHANNEL_B].wr4 = ZSWR4_CLK_X16;
1.1 jonathan 591:
592: /* enable DTR, RTS and SS */
593: sc->scc_wreg[SCC_CHANNEL_B].wr5 = ZSWR5_RTS;
594: sc->scc_wreg[SCC_CHANNEL_A].wr5 = ZSWR5_RTS | ZSWR5_DTR;
595:
596: /* baud rates */
597: val = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
598: sc->scc_wreg[SCC_CHANNEL_B].wr14 = val;
599: sc->scc_wreg[SCC_CHANNEL_A].wr14 = val;
600:
601: /* interrupt conditions */
602: val = ZSWR1_RIE | ZSWR1_PE_SC | ZSWR1_SIE | ZSWR1_TIE;
603: sc->scc_wreg[SCC_CHANNEL_A].wr1 = val;
604: sc->scc_wreg[SCC_CHANNEL_B].wr1 = val;
605: }
606:
607: int
608: sccopen(dev, flag, mode, p)
609: dev_t dev;
610: int flag, mode;
611: struct proc *p;
612: {
1.51 simonb 613: struct scc_softc *sc;
614: struct tty *tp;
615: int unit, line;
1.1 jonathan 616: int s, error = 0;
617:
618: unit = SCCUNIT(dev);
1.10 thorpej 619: if (unit >= scc_cd.cd_ndevs)
1.1 jonathan 620: return (ENXIO);
1.10 thorpej 621: sc = scc_cd.cd_devs[unit];
1.1 jonathan 622: if (!sc)
623: return (ENXIO);
624:
625: line = SCCLINE(dev);
626: if (sc->scc_pdma[line].p_addr == NULL)
627: return (ENXIO);
1.18 jonathan 628: tp = sc->scc_tty[line];
1.13 mhitch 629: if (tp == NULL) {
1.18 jonathan 630: tp = sc->scc_tty[line] = ttymalloc();
1.13 mhitch 631: tty_attach(tp);
632: }
1.1 jonathan 633: tp->t_oproc = sccstart;
634: tp->t_param = sccparam;
635: tp->t_dev = dev;
1.39 jonathan 636:
637: /*
638: * Do the following only for first opens.
639: */
640: s = spltty();
1.33 jonathan 641: if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
642: ttychars(tp);
1.1 jonathan 643: #ifndef PORTSELECTOR
644: if (tp->t_ispeed == 0) {
645: #endif
646: tp->t_iflag = TTYDEF_IFLAG;
647: tp->t_oflag = TTYDEF_OFLAG;
648: tp->t_cflag = TTYDEF_CFLAG;
649: tp->t_lflag = LFLAG;
650: tp->t_ispeed = tp->t_ospeed = ISPEED;
651: #ifdef PORTSELECTOR
652: tp->t_cflag |= HUPCL;
653: #else
654: }
655: #endif
656: (void) sccparam(tp, &tp->t_termios);
657: ttsetwater(tp);
1.39 jonathan 658: }
659: else if ((tp->t_state & TS_XCLUDE) && curproc->p_ucred->cr_uid != 0) {
660: error = EBUSY;
661: splx(s);
662: goto bad;
663: }
1.1 jonathan 664: (void) sccmctl(dev, DML_DTR, DMSET);
1.39 jonathan 665:
1.1 jonathan 666: while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
1.36 jonathan 667: !(tp->t_state & TS_CARR_ON)) {
1.33 jonathan 668: tp->t_wopen++;
669: error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
670: ttopen, 0);
671: tp->t_wopen--;
672: if (error != 0)
1.1 jonathan 673: break;
674: }
675: splx(s);
1.39 jonathan 676:
1.1 jonathan 677: if (error)
1.39 jonathan 678: goto bad;
679:
1.29 jonathan 680: error = (*linesw[tp->t_line].l_open)(dev, tp);
681:
1.39 jonathan 682: if (error)
683: goto bad;
684: bad:
1.29 jonathan 685: return (error);
1.1 jonathan 686: }
687:
688: /*ARGSUSED*/
689: int
690: sccclose(dev, flag, mode, p)
691: dev_t dev;
692: int flag, mode;
693: struct proc *p;
694: {
1.51 simonb 695: struct scc_softc *sc = scc_cd.cd_devs[SCCUNIT(dev)];
696: struct tty *tp;
697: int line;
1.1 jonathan 698:
699: line = SCCLINE(dev);
1.18 jonathan 700: tp = sc->scc_tty[line];
1.1 jonathan 701: if (sc->scc_wreg[line].wr5 & ZSWR5_BREAK) {
702: sc->scc_wreg[line].wr5 &= ~ZSWR5_BREAK;
703: ttyoutput(0, tp);
704: }
705: (*linesw[tp->t_line].l_close)(tp, flag);
1.33 jonathan 706: if ((tp->t_cflag & HUPCL) || tp->t_wopen ||
1.1 jonathan 707: !(tp->t_state & TS_ISOPEN))
708: (void) sccmctl(dev, 0, DMSET);
709: return (ttyclose(tp));
710: }
711:
712: int
713: sccread(dev, uio, flag)
714: dev_t dev;
715: struct uio *uio;
716: int flag;
717: {
1.51 simonb 718: struct scc_softc *sc;
719: struct tty *tp;
1.1 jonathan 720:
1.18 jonathan 721: sc = scc_cd.cd_devs[SCCUNIT(dev)]; /* XXX*/
722: tp = sc->scc_tty[SCCLINE(dev)];
1.1 jonathan 723: return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
724: }
725:
726: int
727: sccwrite(dev, uio, flag)
728: dev_t dev;
729: struct uio *uio;
730: int flag;
731: {
1.51 simonb 732: struct scc_softc *sc;
733: struct tty *tp;
1.1 jonathan 734:
1.18 jonathan 735: sc = scc_cd.cd_devs[SCCUNIT(dev)]; /* XXX*/
736: tp = sc->scc_tty[SCCLINE(dev)];
1.1 jonathan 737: return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
738: }
739:
740: struct tty *
741: scctty(dev)
1.36 jonathan 742: dev_t dev;
1.1 jonathan 743: {
1.51 simonb 744: struct scc_softc *sc;
745: struct tty *tp;
746: int unit = SCCUNIT(dev);
1.1 jonathan 747:
1.18 jonathan 748: if ((unit >= scc_cd.cd_ndevs) || (sc = scc_cd.cd_devs[unit]) == 0)
749: return (0);
750: tp = sc->scc_tty[SCCLINE(dev)];
1.36 jonathan 751: return (tp);
1.1 jonathan 752: }
753:
754: /*ARGSUSED*/
755: int
756: sccioctl(dev, cmd, data, flag, p)
757: dev_t dev;
758: u_long cmd;
759: caddr_t data;
760: int flag;
761: struct proc *p;
762: {
1.51 simonb 763: struct scc_softc *sc;
764: struct tty *tp;
1.1 jonathan 765: int error, line;
766:
1.18 jonathan 767: line = SCCLINE(dev);
768: sc = scc_cd.cd_devs[SCCUNIT(dev)];
769: tp = sc->scc_tty[line];
1.1 jonathan 770: error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
771: if (error >= 0)
772: return (error);
773: error = ttioctl(tp, cmd, data, flag, p);
774: if (error >= 0)
775: return (error);
776:
777: switch (cmd) {
778:
779: case TIOCSBRK:
780: sc->scc_wreg[line].wr5 |= ZSWR5_BREAK;
781: ttyoutput(0, tp);
782: break;
783:
784: case TIOCCBRK:
785: sc->scc_wreg[line].wr5 &= ~ZSWR5_BREAK;
786: ttyoutput(0, tp);
787: break;
788:
789: case TIOCSDTR:
790: (void) sccmctl(dev, DML_DTR|DML_RTS, DMBIS);
791: break;
792:
793: case TIOCCDTR:
794: (void) sccmctl(dev, DML_DTR|DML_RTS, DMBIC);
795: break;
796:
797: case TIOCMSET:
798: (void) sccmctl(dev, *(int *)data, DMSET);
799: break;
800:
801: case TIOCMBIS:
802: (void) sccmctl(dev, *(int *)data, DMBIS);
803: break;
804:
805: case TIOCMBIC:
806: (void) sccmctl(dev, *(int *)data, DMBIC);
807: break;
808:
809: case TIOCMGET:
810: *(int *)data = sccmctl(dev, 0, DMGET);
811: break;
812:
813: default:
814: return (ENOTTY);
815: }
816: return (0);
817: }
818:
1.34 jonathan 819:
1.36 jonathan 820:
1.18 jonathan 821: /*
822: * Set line parameters -- tty t_param entry point.
823: */
1.60 simonb 824: static int
1.1 jonathan 825: sccparam(tp, t)
1.51 simonb 826: struct tty *tp;
827: struct termios *t;
1.1 jonathan 828: {
1.51 simonb 829: struct scc_softc *sc;
1.18 jonathan 830:
831: /* Extract the softc and call cold_sccparam to do all the work. */
832: sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
833: return cold_sccparam(tp, t, sc);
834: }
835:
836:
1.36 jonathan 837: /*
838: * Do what sccparam() (t_param entry point) does, but callable when cold.
1.18 jonathan 839: */
840: static int
841: cold_sccparam(tp, t, sc)
1.51 simonb 842: struct tty *tp;
843: struct termios *t;
844: struct scc_softc *sc;
845: {
846: scc_regmap_t *regs;
847: int line;
848: u_char value, wvalue;
849: int cflag = t->c_cflag;
1.1 jonathan 850: int ospeed;
851:
1.36 jonathan 852: /* Check arguments */
1.18 jonathan 853: if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1.36 jonathan 854: return (EINVAL);
1.1 jonathan 855: ospeed = ttspeedtab(t->c_ospeed, sccspeedtab);
1.36 jonathan 856: if (ospeed < 0)
857: return (EINVAL);
858: /* and copy to tty */
859: tp->t_ispeed = t->c_ispeed;
860: tp->t_ospeed = t->c_ospeed;
861: tp->t_cflag = cflag;
1.1 jonathan 862:
1.45 jonathan 863: if (t->c_ospeed == 0) {
1.1 jonathan 864: (void) sccmctl(tp->t_dev, 0, DMSET); /* hang up line */
865: return (0);
866: }
867:
868: line = SCCLINE(tp->t_dev);
869: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
870:
871: /*
872: * pmax driver used to reset the SCC here. That reset causes the
1.38 jonathan 873: * other channel on the SCC to drop output chars: at least that's
1.1 jonathan 874: * what CGD reports for the Alpha. It's a bug.
875: */
876: #if 0
877: /* reset line */
878: if (line == SCC_CHANNEL_A)
879: value = ZSWR9_A_RESET;
880: else
881: value = ZSWR9_B_RESET;
882: SCC_WRITE_REG(regs, line, SCC_WR9, value);
883: DELAY(25);
884: #endif
885:
886: /* stop bits, normally 1 */
887: value = sc->scc_wreg[line].wr4 & 0xf0;
888: if (cflag & CSTOPB)
889: value |= ZSWR4_TWOSB;
890: else
891: value |= ZSWR4_ONESB;
892: if ((cflag & PARODD) == 0)
893: value |= ZSWR4_EVENP;
894: if (cflag & PARENB)
895: value |= ZSWR4_PARENB;
896:
897: /* set it now, remember it must be first after reset */
898: sc->scc_wreg[line].wr4 = value;
899: SCC_WRITE_REG(regs, line, SCC_WR4, value);
900:
901: /* vector again */
902: SCC_WRITE_REG(regs, line, ZSWR_IVEC, 0xf0);
903:
904: /* clear break, keep rts dtr */
905: wvalue = sc->scc_wreg[line].wr5 & (ZSWR5_DTR|ZSWR5_RTS);
906: switch (cflag & CSIZE) {
907: case CS5:
908: value = ZSWR3_RX_5;
909: wvalue |= ZSWR5_TX_5;
910: break;
911: case CS6:
912: value = ZSWR3_RX_6;
913: wvalue |= ZSWR5_TX_6;
914: break;
915: case CS7:
916: value = ZSWR3_RX_7;
917: wvalue |= ZSWR5_TX_7;
918: break;
919: case CS8:
920: default:
921: value = ZSWR3_RX_8;
922: wvalue |= ZSWR5_TX_8;
923: };
924: sc->scc_wreg[line].wr3 = value;
925: SCC_WRITE_REG(regs, line, SCC_WR3, value);
926:
927: sc->scc_wreg[line].wr5 = wvalue;
928: SCC_WRITE_REG(regs, line, SCC_WR5, wvalue);
929:
930: /*
931: * XXX Does the SCC chip require us to refresh the WR5 register
932: * for the other channel after writing the other, or not?
933: */
934: #ifdef notdef
935: /* XXX */
936: {
937: int otherline = (line + 1) & 1;
938: SCC_WRITE_REG(regs, otherline, SCC_WR5, sc->scc_wreg[otherline].wr5);
939: }
940: #endif
941:
942: SCC_WRITE_REG(regs, line, ZSWR_SYNCLO, 0);
943: SCC_WRITE_REG(regs, line, ZSWR_SYNCHI, 0);
944: SCC_WRITE_REG(regs, line, SCC_WR9, ZSWR9_VECTOR_INCL_STAT);
945: SCC_WRITE_REG(regs, line, SCC_WR10, 0);
946: value = ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD |
947: ZSWR11_TRXC_OUT_ENA | ZSWR11_TRXC_BAUD;
948: SCC_WRITE_REG(regs, line, SCC_WR11, value);
949: SCC_SET_TIMING_BASE(regs, line, ospeed);
950: value = sc->scc_wreg[line].wr14;
951: SCC_WRITE_REG(regs, line, SCC_WR14, value);
952:
1.58 simonb 953: value = ZSWR15_BREAK_IE | ZSWR15_CTS_IE | ZSWR15_DCD_IE;
1.1 jonathan 954: SCC_WRITE_REG(regs, line, SCC_WR15, value);
955:
956: /* and now the enables */
957: value = sc->scc_wreg[line].wr3 | ZSWR3_RX_ENABLE;
958: SCC_WRITE_REG(regs, line, SCC_WR3, value);
959: value = sc->scc_wreg[line].wr5 | ZSWR5_TX_ENABLE;
960: sc->scc_wreg[line].wr5 = value;
961: SCC_WRITE_REG(regs, line, SCC_WR5, value);
962:
963: /* master inter enable */
964: value = ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT;
965: SCC_WRITE_REG(regs, line, SCC_WR9, value);
966: SCC_WRITE_REG(regs, line, SCC_WR1, sc->scc_wreg[line].wr1);
1.18 jonathan 967: tc_mb();
1.1 jonathan 968:
969: return (0);
970: }
971:
1.18 jonathan 972:
1.1 jonathan 973: /*
1.51 simonb 974: * transmission done interrupts
1.1 jonathan 975: */
1.39 jonathan 976: static void
977: scc_txintr(sc, chan, regs)
978: struct scc_softc *sc;
979: int chan;
980: scc_regmap_t *regs;
1.1 jonathan 981: {
1.51 simonb 982: struct tty *tp = sc->scc_tty[chan];
983: struct pdma *dp = &sc->scc_pdma[chan];
984: int cc;
1.1 jonathan 985:
1.39 jonathan 986: tp = sc->scc_tty[chan];
987: dp = &sc->scc_pdma[chan];
988: if (dp->p_mem < dp->p_end) {
989: SCC_WRITE_DATA(regs, chan, *dp->p_mem++);
1.58 simonb 990: /* Alpha handles the 1.6 msec settle time in hardware */
1.39 jonathan 991: DELAY(2);
992: tc_mb();
993: } else {
994: tp->t_state &= ~TS_BUSY;
995: if (tp->t_state & TS_FLUSH)
996: tp->t_state &= ~TS_FLUSH;
997: else {
998: ndflush(&tp->t_outq, dp->p_mem -
999: (caddr_t) tp->t_outq.c_cf);
1000: dp->p_end = dp->p_mem = tp->t_outq.c_cf;
1001: }
1002: if (tp->t_line)
1003: (*linesw[tp->t_line].l_start)(tp);
1004: else
1005: sccstart(tp);
1006: if (tp->t_outq.c_cc == 0 || !(tp->t_state & TS_BUSY)) {
1007: SCC_READ_REG(regs, chan, SCC_RR15, cc);
1008: cc &= ~ZSWR15_TXUEOM_IE;
1009: SCC_WRITE_REG(regs, chan, SCC_WR15, cc);
1010: cc = sc->scc_wreg[chan].wr1 & ~ZSWR1_TIE;
1011: SCC_WRITE_REG(regs, chan, SCC_WR1, cc);
1012: sc->scc_wreg[chan].wr1 = cc;
1.18 jonathan 1013: tc_mb();
1.1 jonathan 1014: }
1.39 jonathan 1015: }
1016: }
1017:
1.51 simonb 1018: /*
1019: * receive interrupts
1.39 jonathan 1020: */
1021: static void
1022: scc_rxintr(sc, chan, regs, unit)
1023: struct scc_softc *sc;
1024: int chan;
1025: scc_regmap_t *regs;
1026: int unit;
1027: {
1.51 simonb 1028: struct tty *tp = sc->scc_tty[chan];
1.39 jonathan 1029: int cc, rr1 = 0, rr2 = 0; /* XXX */
1.58 simonb 1030: #if NRASTERCONSOLE > 0
1.47 ad 1031: char *cp;
1.53 ad 1032: int cl;
1.50 mrg 1033: #endif
1.39 jonathan 1034:
1035: SCC_READ_DATA(regs, chan, cc);
1036: if (rr2 == SCC_RR2_A_RECV_SPECIAL ||
1.1 jonathan 1037: rr2 == SCC_RR2_B_RECV_SPECIAL) {
1.39 jonathan 1038: SCC_READ_REG(regs, chan, SCC_RR1, rr1);
1039: SCC_WRITE_REG(regs, chan, SCC_RR0, ZSWR0_RESET_ERRORS);
1040: if (rr1 & ZSRR1_DO) {
1041: log(LOG_WARNING, "scc%d,%d: silo overflow\n",
1042: unit >> 1, chan);
1.1 jonathan 1043: }
1.39 jonathan 1044: }
1.1 jonathan 1045:
1.39 jonathan 1046: /*
1047: * Keyboard needs special treatment.
1048: */
1049: if (tp == scctty(makedev(SCCDEV, SCCKBD_PORT))) {
1.37 jonathan 1050: #if defined(DDB) && defined(LK_DO)
1.1 jonathan 1051: if (cc == LK_DO) {
1052: spl0();
1.43 jonathan 1053: console_debugger();
1.39 jonathan 1054: return;
1.1 jonathan 1055: }
1056: #endif
1057: #ifdef DEBUG
1.39 jonathan 1058: debugChar = cc;
1.1 jonathan 1059: #endif
1.39 jonathan 1060: if (sccDivertXInput) {
1061: (*sccDivertXInput)(cc);
1062: return;
1063: }
1.58 simonb 1064: #if NRASTERCONSOLE > 0
1.55 ad 1065: if ((cp = lk_mapchar(cc, &cl)) == NULL)
1.39 jonathan 1066: return;
1.51 simonb 1067:
1.53 ad 1068: while (cl--)
1.47 ad 1069: rcons_input(0, *cp++);
1.1 jonathan 1070: #endif
1.39 jonathan 1071: /*
1072: * Now for mousey
1073: */
1074: } else if (tp == scctty(makedev(SCCDEV, SCCMOUSE_PORT)) &&
1075: sccMouseButtons) {
1.58 simonb 1076: #if NRASTERCONSOLE > 0
1.39 jonathan 1077: /*XXX*/
1078: mouseInput(cc);
1.34 jonathan 1079: #endif
1.39 jonathan 1080: return;
1081: }
1082: if (!(tp->t_state & TS_ISOPEN)) {
1083: wakeup((caddr_t)&tp->t_rawq);
1.1 jonathan 1084: #ifdef PORTSELECTOR
1.39 jonathan 1085: if (!(tp->t_state & TS_WOPEN))
1.1 jonathan 1086: #endif
1.39 jonathan 1087: return;
1088: }
1089: if (rr2 == SCC_RR2_A_RECV_SPECIAL ||
1090: rr2 == SCC_RR2_B_RECV_SPECIAL) {
1091: if (rr1 & ZSRR1_PE)
1092: cc |= TTY_PE;
1093: if (rr1 & ZSRR1_FE)
1094: cc |= TTY_FE;
1095: }
1096: (*linesw[tp->t_line].l_rint)(cc, tp);
1097: }
1098:
1099: /*
1100: * Modem status interrupts
1101: */
1.60 simonb 1102: static void
1.39 jonathan 1103: scc_stintr(sc, chan, regs, unit)
1104: struct scc_softc *sc;
1105: int chan;
1106: scc_regmap_t *regs;
1107: int unit;
1108: {
1109:
1110: SCC_WRITE_REG(regs, chan, SCC_RR0, ZSWR0_RESET_STATUS);
1111: scc_modem_intr(unit | chan);
1112: }
1113:
1114:
1115: /*
1116: * Check for interrupts from all devices.
1117: */
1.60 simonb 1118: static int
1.39 jonathan 1119: sccintr(xxxsc)
1120: void *xxxsc;
1121: {
1.51 simonb 1122: struct scc_softc *sc = (struct scc_softc *)xxxsc;
1123: int unit = (long)sc->sc_dv.dv_unit;
1124: scc_regmap_t *regs;
1125: int rr3;
1.39 jonathan 1126:
1127: regs = (scc_regmap_t *)sc->scc_pdma[0].p_addr;
1128: unit <<= 1;
1129:
1130: /* Note: only channel A has an RR3 */
1131: SCC_READ_REG(regs, SCC_CHANNEL_A, ZSRR_IPEND, rr3);
1.51 simonb 1132:
1.39 jonathan 1133: /*
1134: * Clear interrupt first to avoid a race condition.
1135: * If a new interrupt condition happens while we are
1136: * servicing this one, we will get another interrupt
1137: * shortly. We can NOT just sit here in a loop, or
1138: * we will cause horrible latency for other devices
1139: * on this interrupt level (i.e. sun3x floppy disk).
1140: */
1141:
1142: /*
1143: * At elast some, maybe all DECstation chips have modem
1144: * leads crosswired: the data comes in one channel and the
1145: * bulkead modem signals for that port are wired to the
1146: * _other_ channel of the chip. Yes, really.
1147: * This code cannot get that right.
1148: */
1149:
1150: /* First look at channel A. */
1151: if (rr3 & (ZSRR3_IP_A_RX | ZSRR3_IP_A_TX | ZSRR3_IP_A_STAT)) {
1152: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_RR0, ZSWR0_CLR_INTR);
1153: if (rr3 & ZSRR3_IP_A_RX)
1154: scc_rxintr(sc, SCC_CHANNEL_A, regs, unit);
1155:
1156: if (rr3 & ZSRR3_IP_A_STAT) {
1157: /* XXX swapped channels */
1158: scc_stintr(sc, SCC_CHANNEL_A, regs, unit);
1.1 jonathan 1159: }
1.39 jonathan 1160:
1161: if (rr3 & ZSRR3_IP_A_TX)
1162: scc_txintr(sc, SCC_CHANNEL_A, regs);
1163: }
1164:
1165: /* Now look at channel B. */
1166: if (rr3 & (ZSRR3_IP_B_RX | ZSRR3_IP_B_TX | ZSRR3_IP_B_STAT)) {
1167: SCC_WRITE_REG(regs, SCC_CHANNEL_B, SCC_RR0, ZSWR0_CLR_INTR);
1168: if (rr3 & ZSRR3_IP_B_RX)
1169: scc_rxintr(sc, SCC_CHANNEL_B, regs, unit);
1170: if (rr3 & ZSRR3_IP_B_STAT) {
1171: /* XXX swapped channels */
1172: scc_stintr(sc, SCC_CHANNEL_B, regs, unit);
1.1 jonathan 1173: }
1.39 jonathan 1174: if (rr3 & ZSRR3_IP_B_TX)
1175: scc_txintr(sc, SCC_CHANNEL_B, regs);
1.1 jonathan 1176: }
1.39 jonathan 1177:
1178: return 1;
1.1 jonathan 1179: }
1180:
1.60 simonb 1181: static void
1.1 jonathan 1182: sccstart(tp)
1.51 simonb 1183: struct tty *tp;
1.1 jonathan 1184: {
1.51 simonb 1185: struct pdma *dp;
1186: scc_regmap_t *regs;
1187: struct scc_softc *sc;
1188: int cc, chan;
1.1 jonathan 1189: u_char temp;
1190: int s, sendone;
1191:
1.10 thorpej 1192: sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
1.1 jonathan 1193: dp = &sc->scc_pdma[SCCLINE(tp->t_dev)];
1194: regs = (scc_regmap_t *)dp->p_addr;
1195: s = spltty();
1196: if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
1197: goto out;
1198: if (tp->t_outq.c_cc <= tp->t_lowat) {
1199: if (tp->t_state & TS_ASLEEP) {
1200: tp->t_state &= ~TS_ASLEEP;
1201: wakeup((caddr_t)&tp->t_outq);
1202: }
1203: selwakeup(&tp->t_wsel);
1204: }
1205: if (tp->t_outq.c_cc == 0)
1206: goto out;
1.38 jonathan 1207:
1.4 jonathan 1208: cc = ndqb(&tp->t_outq, 0);
1209:
1.1 jonathan 1210: tp->t_state |= TS_BUSY;
1211: dp->p_end = dp->p_mem = tp->t_outq.c_cf;
1212: dp->p_end += cc;
1213:
1214: /*
1215: * Enable transmission and send the first char, as required.
1216: */
1217: chan = SCCLINE(tp->t_dev);
1218: SCC_READ_REG(regs, chan, SCC_RR0, temp);
1219: sendone = (temp & ZSRR0_TX_READY);
1220: SCC_READ_REG(regs, chan, SCC_RR15, temp);
1221: temp |= ZSWR15_TXUEOM_IE;
1222: SCC_WRITE_REG(regs, chan, SCC_WR15, temp);
1223: temp = sc->scc_wreg[chan].wr1 | ZSWR1_TIE;
1224: SCC_WRITE_REG(regs, chan, SCC_WR1, temp);
1225: sc->scc_wreg[chan].wr1 = temp;
1226: if (sendone) {
1227: #ifdef DIAGNOSTIC
1228: if (cc == 0)
1229: panic("sccstart: No chars");
1.36 jonathan 1230: #endif
1.1 jonathan 1231: SCC_WRITE_DATA(regs, chan, *dp->p_mem++);
1.58 simonb 1232: /* Alpha handles the 1.6 msec settle time in hardware */
1.3 jonathan 1233: DELAY(2);
1.1 jonathan 1234: }
1.18 jonathan 1235: tc_mb();
1.1 jonathan 1236: out:
1237: splx(s);
1238: }
1239:
1240: /*
1241: * Stop output on a line.
1242: */
1243: /*ARGSUSED*/
1.14 mycroft 1244: void
1.1 jonathan 1245: sccstop(tp, flag)
1.51 simonb 1246: struct tty *tp;
1.1 jonathan 1247: int flag;
1248: {
1.51 simonb 1249: struct pdma *dp;
1250: struct scc_softc *sc;
1251: int s;
1.1 jonathan 1252:
1.10 thorpej 1253: sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
1.1 jonathan 1254: dp = &sc->scc_pdma[SCCLINE(tp->t_dev)];
1255: s = spltty();
1256: if (tp->t_state & TS_BUSY) {
1257: dp->p_end = dp->p_mem;
1258: if (!(tp->t_state & TS_TTSTOP))
1259: tp->t_state |= TS_FLUSH;
1260: }
1261: splx(s);
1262: }
1263:
1.60 simonb 1264: static int
1.1 jonathan 1265: sccmctl(dev, bits, how)
1266: dev_t dev;
1267: int bits, how;
1268: {
1.51 simonb 1269: struct scc_softc *sc;
1270: scc_regmap_t *regs;
1271: int line, mbits;
1272: u_char value;
1.1 jonathan 1273: int s;
1274:
1.10 thorpej 1275: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1.1 jonathan 1276: line = SCCLINE(dev);
1277: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
1278: s = spltty();
1279: /*
1280: * only channel B has modem control, however the DTR and RTS
1281: * pins on the comm port are wired to the DTR and RTS A channel
1282: * signals.
1283: */
1284: mbits = DML_DTR | DML_DSR | DML_CAR;
1285: if (line == SCC_CHANNEL_B) {
1286: if (sc->scc_wreg[SCC_CHANNEL_A].wr5 & ZSWR5_DTR)
1287: mbits = DML_DTR | DML_DSR;
1288: else
1289: mbits = 0;
1290: SCC_READ_REG_ZERO(regs, SCC_CHANNEL_B, value);
1291: if (value & ZSRR0_DCD)
1292: mbits |= DML_CAR;
1293: }
1294: switch (how) {
1295: case DMSET:
1296: mbits = bits;
1297: break;
1298:
1299: case DMBIS:
1300: mbits |= bits;
1301: break;
1302:
1303: case DMBIC:
1304: mbits &= ~bits;
1305: break;
1306:
1307: case DMGET:
1308: (void) splx(s);
1309: return (mbits);
1310: }
1311: if (line == SCC_CHANNEL_B) {
1312: if (mbits & DML_DTR)
1313: sc->scc_wreg[SCC_CHANNEL_A].wr5 |= ZSWR5_DTR;
1314: else
1315: sc->scc_wreg[SCC_CHANNEL_A].wr5 &= ~ZSWR5_DTR;
1316: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR5,
1317: sc->scc_wreg[SCC_CHANNEL_A].wr5);
1318: }
1319: if ((mbits & DML_DTR) || (sc->scc_softCAR & (1 << line)))
1.18 jonathan 1320: sc->scc_tty[line]->t_state |= TS_CARR_ON;
1.1 jonathan 1321: (void) splx(s);
1322: return (mbits);
1323: }
1324:
1325: /*
1326: * Check for carrier transition.
1327: */
1328: static void
1329: scc_modem_intr(dev)
1330: dev_t dev;
1331: {
1.51 simonb 1332: scc_regmap_t *regs;
1333: struct scc_softc *sc;
1334: struct tty *tp;
1335: int car, chan;
1336: u_char value;
1.1 jonathan 1337: int s;
1338:
1.18 jonathan 1339: chan = SCCLINE(dev);
1.10 thorpej 1340: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1.18 jonathan 1341: tp = sc->scc_tty[chan];
1.1 jonathan 1342: regs = (scc_regmap_t *)sc->scc_pdma[chan].p_addr;
1.39 jonathan 1343:
1344: if (chan == SCC_CHANNEL_A) {
1.1 jonathan 1345: return;
1.39 jonathan 1346: }
1347:
1.1 jonathan 1348: s = spltty();
1.39 jonathan 1349: SCC_READ_REG_ZERO(regs, chan, value);
1.26 jonathan 1350:
1.1 jonathan 1351: if (sc->scc_softCAR & (1 << chan))
1352: car = 1;
1353: else {
1354: car = value & ZSRR0_DCD;
1355: }
1356:
1.34 jonathan 1357: /* Break on serial console drops into the debugger */
1.26 jonathan 1358: if ((value & ZSRR0_BREAK) && CONSOLE_ON_UNIT(sc->sc_dv.dv_unit)) {
1359: #ifdef DDB
1360: splx(s); /* spl0()? */
1.43 jonathan 1361: console_debugger();
1.26 jonathan 1362: return;
1363: #else
1364: /* XXX maybe fall back to PROM? */
1365: #endif
1366: }
1367:
1.1 jonathan 1368: /*
1.18 jonathan 1369: * The pmax driver follows carrier-detect. The Alpha does not.
1.34 jonathan 1370: * On pmax, ignore hups on a console tty.
1.39 jonathan 1371: * On alpha, a no-op, for historical reasons.
1.1 jonathan 1372: */
1.39 jonathan 1373: if (!CONSOLE_ON_UNIT(sc->sc_dv.dv_unit)) {
1.26 jonathan 1374: if (car) {
1375: /* carrier present */
1376: if (!(tp->t_state & TS_CARR_ON))
1377: (void)(*linesw[tp->t_line].l_modem)(tp, 1);
1378: } else if (tp->t_state & TS_CARR_ON)
1.36 jonathan 1379: (void)(*linesw[tp->t_line].l_modem)(tp, 0);
1.26 jonathan 1380: }
1.1 jonathan 1381: splx(s);
1382: }
1383:
1384: /*
1385: * Get a char off the appropriate line via. a busy wait loop.
1386: */
1387: int
1388: sccGetc(dev)
1389: dev_t dev;
1390: {
1.51 simonb 1391: scc_regmap_t *regs;
1392: int c, line;
1393: u_char value;
1.1 jonathan 1394: int s;
1395:
1396: line = SCCLINE(dev);
1.18 jonathan 1397: if (cold && scc_cons_addr) {
1398: regs = scc_cons_addr;
1399: } else {
1.51 simonb 1400: struct scc_softc *sc;
1.18 jonathan 1401: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1402: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
1403: }
1404:
1.1 jonathan 1405: if (!regs)
1406: return (0);
1.2 jonathan 1407: /*s = spltty(); */ /* XXX why different spls? */
1408: s = splhigh();
1.1 jonathan 1409: for (;;) {
1410: SCC_READ_REG(regs, line, SCC_RR0, value);
1411: if (value & ZSRR0_RX_READY) {
1412: SCC_READ_REG(regs, line, SCC_RR1, value);
1413: SCC_READ_DATA(regs, line, c);
1414: if (value & (ZSRR1_PE | ZSRR1_DO | ZSRR1_FE)) {
1415: SCC_WRITE_REG(regs, line, SCC_WR0,
1.36 jonathan 1416: ZSWR0_RESET_ERRORS);
1.1 jonathan 1417: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR0,
1.36 jonathan 1418: ZSWR0_CLR_INTR);
1.1 jonathan 1419: } else {
1420: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR0,
1.36 jonathan 1421: ZSWR0_CLR_INTR);
1.1 jonathan 1422: splx(s);
1423: return (c & 0xff);
1424: }
1425: } else
1426: DELAY(10);
1427: }
1428: }
1429:
1430: /*
1431: * Send a char on a port, via a busy wait loop.
1432: */
1433: void
1434: sccPutc(dev, c)
1435: dev_t dev;
1436: int c;
1437: {
1.51 simonb 1438: scc_regmap_t *regs;
1439: int line;
1440: u_char value;
1.1 jonathan 1441: int s;
1442:
1443: s = spltty(); /* XXX why different spls? */
1444: line = SCCLINE(dev);
1.18 jonathan 1445: if (cold && scc_cons_addr) {
1446: regs = scc_cons_addr;
1447: } else {
1.51 simonb 1448: struct scc_softc *sc;
1.18 jonathan 1449: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1450: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
1451: }
1.1 jonathan 1452:
1453: /*
1454: * Wait for transmitter to be not busy.
1455: */
1456: do {
1457: SCC_READ_REG(regs, line, SCC_RR0, value);
1458: if (value & ZSRR0_TX_READY)
1459: break;
1460: DELAY(100);
1461: } while (1);
1462:
1463: /*
1464: * Send the char.
1465: */
1466: SCC_WRITE_DATA(regs, line, c);
1.18 jonathan 1467: tc_mb();
1.1 jonathan 1468: splx(s);
1469:
1470: return;
1471: }
1472:
1473: /*
1474: * Enable/disable polling mode
1475: */
1.60 simonb 1476: static void
1.1 jonathan 1477: sccPollc(dev, on)
1478: dev_t dev;
1479: int on;
1480: {
1481: }
1482:
1483: #ifdef SCC_DEBUG
1484: static void
1485: rr(msg, regs)
1486: char *msg;
1487: scc_regmap_t *regs;
1488: {
1489: u_char value;
1490: int r0, r1, r2, r3, r10, r15;
1491:
1.17 christos 1492: printf("%s: register: %lx\n", msg, regs);
1.1 jonathan 1493: #define L(reg, r) { \
1494: SCC_READ_REG(regs, SCC_CHANNEL_A, reg, value); \
1495: r = value; \
1496: }
1497: L(SCC_RR0, r0);
1498: L(SCC_RR1, r1);
1499: L(ZSRR_IVEC, r2);
1500: L(ZSRR_IPEND, r3);
1501: L(SCC_RR10, r10);
1502: L(SCC_RR15, r15);
1.17 christos 1503: printf("A: 0: %x 1: %x 2(vec): %x 3: %x 10: %x 15: %x\n",
1.1 jonathan 1504: r0, r1, r2, r3, r10, r15);
1505: #undef L
1506: #define L(reg, r) { \
1507: SCC_READ_REG(regs, SCC_CHANNEL_B, reg, value); \
1508: r = value; \
1509: }
1510: L(SCC_RR0, r0);
1511: L(SCC_RR1, r1);
1512: L(ZSRR_IVEC, r2);
1513: L(SCC_RR10, r10);
1514: L(SCC_RR15, r15);
1.17 christos 1515: printf("B: 0: %x 1: %x 2(state): %x 10: %x 15: %x\n",
1.1 jonathan 1516: r0, r1, r2, r10, r15);
1517: }
1.2 jonathan 1518: #endif /* SCC_DEBUG */
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