Annotation of src/sys/arch/pmax/tc/scc.c, Revision 1.57
1.57 ! simonb 1: /* $NetBSD: scc.c,v 1.56 1999/12/30 01:01:48 simonb Exp $ */
1.1 jonathan 2:
1.36 jonathan 3: /*
1.18 jonathan 4: * Copyright (c) 1991,1990,1989,1994,1995,1996 Carnegie Mellon University
1.36 jonathan 5: * All Rights Reserved.
6: *
1.1 jonathan 7: * Author: Chris G. Demetriou and Jonathan Stone
8: *
9: * Permission to use, copy, modify and distribute this software and its
10: * documentation is hereby granted, provided that both the copyright
11: * notice and this permission notice appear in all copies of the
12: * software, derivative works or modified versions, and any portions
13: * thereof, and that both notices appear in supporting documentation.
1.36 jonathan 14: *
1.49 pk 15: * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
1.1 jonathan 16: * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
17: * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
1.36 jonathan 18: *
1.1 jonathan 19: * Carnegie Mellon requests users of this software to return to
1.36 jonathan 20: *
1.1 jonathan 21: * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
22: * School of Computer Science
23: * Carnegie Mellon University
24: * Pittsburgh PA 15213-3890
1.36 jonathan 25: *
1.1 jonathan 26: * any improvements or extensions that they make and grant Carnegie the
27: * rights to redistribute these changes.
28: */
29:
30: /*-
31: * Copyright (c) 1992, 1993
32: * The Regents of the University of California. All rights reserved.
33: *
34: * This code is derived from software contributed to Berkeley by
35: * Ralph Campbell and Rick Macklem.
36: *
37: * Redistribution and use in source and binary forms, with or without
38: * modification, are permitted provided that the following conditions
39: * are met:
40: * 1. Redistributions of source code must retain the above copyright
41: * notice, this list of conditions and the following disclaimer.
42: * 2. Redistributions in binary form must reproduce the above copyright
43: * notice, this list of conditions and the following disclaimer in the
44: * documentation and/or other materials provided with the distribution.
45: * 3. All advertising materials mentioning features or use of this software
46: * must display the following acknowledgement:
47: * This product includes software developed by the University of
48: * California, Berkeley and its contributors.
49: * 4. Neither the name of the University nor the names of its contributors
50: * may be used to endorse or promote products derived from this software
51: * without specific prior written permission.
52: *
53: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
54: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
55: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
56: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
57: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
58: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
59: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
60: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
61: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
62: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
63: * SUCH DAMAGE.
64: *
1.18 jonathan 65: * @(#)scc.c 8.2 (Berkeley) 11/30/93
1.1 jonathan 66: */
67:
1.29 jonathan 68: #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
1.57 ! simonb 69: __KERNEL_RCSID(0, "$NetBSD: scc.c,v 1.56 1999/12/30 01:01:48 simonb Exp $");
1.41 jonathan 70:
71: #include "opt_ddb.h"
1.34 jonathan 72:
73: #ifdef alpha
74: #include "opt_dec_3000_300.h"
75: #endif
1.1 jonathan 76:
77: /*
78: * Intel 82530 dual usart chip driver. Supports the serial port(s) on the
79: * Personal DECstation 5000/xx and DECstation 5000/1xx, plus the keyboard
80: * and mouse on the 5000/1xx. (Don't ask me where the A channel signals
81: * are on the 5000/xx.)
82: *
83: * See: Intel MicroCommunications Handbook, Section 2, pg. 155-173, 1992.
84: */
85: #include <sys/param.h>
86: #include <sys/systm.h>
87: #include <sys/ioctl.h>
88: #include <sys/tty.h>
89: #include <sys/proc.h>
90: #include <sys/map.h>
91: #include <sys/buf.h>
92: #include <sys/conf.h>
93: #include <sys/file.h>
94: #include <sys/uio.h>
95: #include <sys/kernel.h>
96: #include <sys/syslog.h>
97: #include <sys/device.h>
98:
99: #include <dev/cons.h>
100:
1.40 jonathan 101: #include <dev/dec/lk201.h>
1.37 jonathan 102: #include <dev/ic/z8530reg.h>
1.40 jonathan 103: #include <pmax/dev/pdma.h> /* XXXXXX */
1.37 jonathan 104:
1.1 jonathan 105:
106: #ifdef pmax
1.18 jonathan 107: #include <mips/cpuregs.h> /* phys to uncached */
1.54 simonb 108: #include <pmax/pmax/cons.h>
1.1 jonathan 109: #include <pmax/pmax/pmaxtype.h>
110: #include <pmax/pmax/maxine.h>
111: #include <pmax/pmax/asic.h>
112: #include <pmax/dev/sccreg.h>
1.38 jonathan 113: #include <pmax/dev/rconsvar.h>
1.12 mhitch 114: #include <pmax/tc/sccvar.h> /* XXX */
1.40 jonathan 115: #include <pmax/dev/lk201var.h>
1.57 ! simonb 116: #include <machine/pmioctl.h> /* XXX for pmEventQueue typedef */
1.56 simonb 117: #include <pmax/dev/qvssvar.h> /* XXX mouseInput() */
1.1 jonathan 118: #endif
119:
120: #ifdef alpha
121: #include <alpha/tc/sccreg.h>
122: #include <alpha/tc/sccvar.h>
123: #include <machine/rpb.h>
1.6 jonathan 124: #include <alpha/tc/ioasicreg.h>
1.1 jonathan 125: #endif
126:
1.6 jonathan 127: #include <machine/autoconf.h>
1.24 jonathan 128: #include <machine/bus.h>
129: #include <machine/conf.h>
130:
1.6 jonathan 131: #include <dev/tc/tcvar.h>
132: #include <dev/tc/ioasicvar.h>
133:
1.18 jonathan 134:
1.21 mellon 135: #include "rasterconsole.h"
136:
1.1 jonathan 137: extern void ttrstrt __P((void *));
138:
139: #ifdef alpha
140: #define SCCDEV 15 /* XXX */
1.40 jonathan 141: #endif
142:
1.1 jonathan 143: /*
1.18 jonathan 144: * rcons glass-tty console (as used on pmax) needs lk-201 ASCII input
145: * support from the tty drivers. This is ugly and broken and won't
1.36 jonathan 146: * compile on Alphas.
1.1 jonathan 147: */
1.34 jonathan 148: #ifdef pmax
1.21 mellon 149: #if NRASTERCONSOLE > 0
1.6 jonathan 150: #define HAVE_RCONS
1.21 mellon 151: #endif
1.6 jonathan 152: #endif
1.2 jonathan 153:
154: /*
155: * True iff the console unit is diverted throught this SCC device.
156: * (used to just test if cn_tab->cn_getc was sccGetc, but that
157: * breaks with the new-style glass-tty framebuffer console input.
158: */
159:
160: #define CONSOLE_ON_UNIT(unit) \
161: (major(cn_tab->cn_dev) == SCCDEV && SCCUNIT(cn_tab->cn_dev) == (unit))
1.1 jonathan 162:
1.39 jonathan 163:
1.2 jonathan 164: /*
1.39 jonathan 165: * Extract unit (scc chip), channel on chip, and dialin/dialout unit.
1.2 jonathan 166: */
1.39 jonathan 167: #define SCCUNIT(dev) ((minor(dev) & 0x7ffff) >> 1)
168: #define SCCLINE(dev) (minor(dev) & 0x1)
169: #define SCCDIALOUT(x) (minor(x) & 0x80000)
1.2 jonathan 170:
1.1 jonathan 171:
1.18 jonathan 172: /* QVSS-compatible in-kernel X input event parser, pointer tracker */
173: void (*sccDivertXInput) __P((int cc)); /* X windows keyboard input routine */
174: void (*sccMouseEvent) __P((int)); /* X windows mouse motion event routine */
175: void (*sccMouseButtons) __P((int)); /* X windows mouse buttons event routine */
176:
1.1 jonathan 177: #ifdef DEBUG
178: int debugChar;
179: #endif
180:
181: struct scc_softc {
182: struct device sc_dv;
183: struct pdma scc_pdma[2];
184: struct {
185: u_char wr1;
186: u_char wr3;
187: u_char wr4;
188: u_char wr5;
189: u_char wr14;
190: } scc_wreg[2];
1.18 jonathan 191: struct tty *scc_tty[2];
1.1 jonathan 192: int scc_softCAR;
1.34 jonathan 193:
1.18 jonathan 194: int scc_flags[2];
1.36 jonathan 195: #define SCC_CHAN_NEEDSDELAY 0x01 /* sw must delay 1.6us between output*/
196: #define SCC_CHAN_NOMODEM 0x02 /* don't touch modem ctl lines (may
1.18 jonathan 197: be left floating or x-wired */
1.36 jonathan 198: #define SCC_CHAN_MODEM_CROSSED 0x04 /* modem lines wired to other channel*/
199: #define SCC_CHAN_KBDLINE 0x08 /* XXX special-case keyboard lines */
1.18 jonathan 200: int scc_unitflags; /* flags for both channels, e.g. */
201: #define SCC_PREFERRED_CONSOLE 0x01
1.1 jonathan 202: };
203:
204: /*
205: * BRG formula is:
206: * ClockFrequency
1.36 jonathan 207: * BRGconstant = --------------------------- - 2
1.1 jonathan 208: * 2 * BaudRate * ClockDivider
209: *
210: * Speed selections with Pclk=7.3728Mhz, clock x16
211: */
212: struct speedtab sccspeedtab[] = {
213: { 0, 0, },
214: { 50, 4606, },
215: { 75, 3070, },
216: { 110, 2093, },
217: { 134.5, 1711, },
218: { 150, 1534, },
219: { 200, 1150, },
220: { 300, 766, },
221: { 600, 382, },
222: { 1200, 190, },
223: { 1800, 126, },
224: { 2400, 94, },
225: { 4800, 46, },
1.36 jonathan 226: { 7200, 30, }, /* non-POSIX */
1.1 jonathan 227: { 9600, 22, },
1.5 jonathan 228: { 14400, 14, }, /* non-POSIX */
1.1 jonathan 229: { 19200, 10, },
1.5 jonathan 230: { 28800, 6, }, /* non-POSIX */
1.46 kleink 231: { 38400, 4, },
1.18 jonathan 232: { 57600, 2, }, /* non-POSIX */
1.45 jonathan 233: #ifndef SCC_NO_HIGHSPEED
1.18 jonathan 234: { 76800, 1, }, /* non-POSIX, doesn't work reliably */
1.45 jonathan 235: { 115200, 0 }, /* non-POSIX, doesn't work reliably */
1.34 jonathan 236: #endif
1.1 jonathan 237: { -1, -1, },
238: };
239:
240: #ifndef PORTSELECTOR
241: #define ISPEED TTYDEF_SPEED
242: #define LFLAG TTYDEF_LFLAG
243: #else
244: #define ISPEED B4800
245: #define LFLAG (TTYDEF_LFLAG & ~ECHO)
246: #endif
247:
248: /* Definition of the driver for autoconfig. */
1.28 jonathan 249: static int sccmatch __P((struct device *parent, struct cfdata *cf,
1.36 jonathan 250: void *aux));
1.18 jonathan 251: static void sccattach __P((struct device *parent, struct device *self,
1.36 jonathan 252: void *aux));
1.10 thorpej 253:
254: struct cfattach scc_ca = {
1.18 jonathan 255: sizeof (struct scc_softc), sccmatch, sccattach,
1.10 thorpej 256: };
257:
1.31 thorpej 258: extern struct cfdriver scc_cd;
1.1 jonathan 259:
260: int sccGetc __P((dev_t));
261: void sccPutc __P((dev_t, int));
262: void sccPollc __P((dev_t, int));
263: int sccparam __P((struct tty *, struct termios *));
264: void sccstart __P((struct tty *));
265: int sccmctl __P((dev_t, int, int));
1.18 jonathan 266: static int cold_sccparam __P((struct tty *, struct termios *,
1.36 jonathan 267: struct scc_softc *sc));
1.1 jonathan 268:
1.18 jonathan 269: #ifdef SCC_DEBUG
270: static void rr __P((char *, scc_regmap_t *));
271: #endif
1.1 jonathan 272: static void scc_modem_intr __P((dev_t));
273: static void sccreset __P((struct scc_softc *));
274:
1.38 jonathan 275: void scc_kbd_init __P((struct scc_softc *sc, dev_t dev));
276: void scc_mouse_init __P((struct scc_softc *sc, dev_t dev));
277: void scc_tty_init __P((struct scc_softc *sc, dev_t dev));
278:
1.39 jonathan 279: static void scc_txintr __P((struct scc_softc *, int, scc_regmap_t *));
280: static void scc_rxintr __P((struct scc_softc *, int, scc_regmap_t *, int));
281: inline
282: static void scc_stintr __P((struct scc_softc *, int, scc_regmap_t *, int));
1.36 jonathan 283: int sccintr __P((void *));
1.39 jonathan 284:
1.18 jonathan 285: #ifdef alpha
286: void scc_alphaintr __P((int));
287: #endif
1.9 jonathan 288:
1.18 jonathan 289: /*
290: * console variables, for using serial console while still cold and
291: * autoconfig has not attached the scc device.
1.36 jonathan 292: */
1.18 jonathan 293: scc_regmap_t *scc_cons_addr = 0;
294: static struct scc_softc coldcons_softc;
295: static struct consdev scccons = {
296: NULL, NULL, sccGetc, sccPutc, sccPollc, NODEV, 0
297: };
1.44 jonathan 298: void scc_consinit __P((dev_t dev, struct scc_regmap *sccaddr));
1.18 jonathan 299:
300:
301: /*
302: * Set up a given unit as a serial console device.
1.36 jonathan 303: * We need console output when cold, and before any device is configured.
1.18 jonathan 304: * Should be callable when cold, to reset the chip and set parameters
305: * for a remote (serial) console or kgdb line.
306: * XXX
307: * As most DECstations only bring out one rs-232 lead from an SCC
308: * to the bulkhead, and use the other for mouse and keyboard, we
309: * only allow one unit per SCC to be console.
310: */
311: void
312: scc_consinit(dev, sccaddr)
313: dev_t dev;
314: scc_regmap_t *sccaddr;
315: {
316: struct scc_softc *sc;
317:
318: /* Save address in case we're cold. */
319: if (cold && scc_cons_addr == 0) {
320: scc_cons_addr = sccaddr;
321: sc = &coldcons_softc;
322: coldcons_softc.scc_pdma[0].p_addr = sccaddr;
323: coldcons_softc.scc_pdma[1].p_addr = sccaddr;
324: } else {
325: /* being called from sccattach() to reset console */
326: sc = scc_cd.cd_devs[SCCUNIT(dev)];
327: }
1.36 jonathan 328:
1.18 jonathan 329: /* Reset chip. */
1.44 jonathan 330: /* XXX make sure sccreset() called only once for this chip? */
1.18 jonathan 331: sccreset(sc);
1.9 jonathan 332:
1.18 jonathan 333: scccons.cn_dev = dev;
334: *cn_tab = scccons;
1.44 jonathan 335: sc->scc_softCAR |= 1 << SCCLINE(cn_tab->cn_dev);
336: scc_tty_init(sc, cn_tab->cn_dev);
1.18 jonathan 337: }
338:
1.1 jonathan 339:
340: /*
341: * Test to see if device is present.
342: * Return true if found.
343: */
344: int
1.28 jonathan 345: sccmatch(parent, cf, aux)
1.1 jonathan 346: struct device *parent;
1.28 jonathan 347: struct cfdata *cf;
1.1 jonathan 348: void *aux;
349: {
1.32 jonathan 350: extern struct cfdriver ioasic_cd; /* XXX */
1.12 mhitch 351: struct ioasicdev_attach_args *d = aux;
1.1 jonathan 352: void *sccaddr;
353:
1.18 jonathan 354: if (parent->dv_cfdata->cf_driver != &ioasic_cd) {
1.1 jonathan 355: #ifdef DIAGNOSTIC
1.17 christos 356: printf("Cannot attach scc on %s\n", parent->dv_xname);
1.1 jonathan 357: #endif
1.18 jonathan 358: return (0);
1.1 jonathan 359: }
360:
1.18 jonathan 361: /* Make sure that we're looking for this type of device. */
362: if ((strncmp(d->iada_modname, "z8530 ", TC_ROM_LLEN) != 0) &&
363: (strncmp(d->iada_modname, "scc", TC_ROM_LLEN)!= 0))
364: return (0);
1.51 simonb 365:
1.20 jonathan 366: /*
367: * Check user-specified offset against the ioasic offset.
368: * Allow it to be wildcarded.
369: */
1.27 jtk 370: if (cf->cf_loc[IOASICCF_OFFSET] != IOASICCF_OFFSET_DEFAULT &&
371: cf->cf_loc[IOASICCF_OFFSET] != d->iada_offset)
1.1 jonathan 372: return (0);
373:
374: /* Get the address, and check it for validity. */
1.18 jonathan 375: sccaddr = (void *)d->iada_addr;
376: #ifdef SPARSE
377: sccaddr = (void *)TC_DENSE_TO_SPARSE((tc_addr_t)sccaddr);
378: #endif
1.1 jonathan 379: if (badaddr(sccaddr, 2))
380: return (0);
381:
382: return (1);
383: }
384:
385: #ifdef alpha
1.18 jonathan 386: /*
387: * Enable ioasic SCC interrupts and scc DMA engine interrupts.
388: * XXX does not really belong here.
389: */
1.1 jonathan 390: void
391: scc_alphaintr(onoff)
392: int onoff;
393: {
394: if (onoff) {
1.6 jonathan 395: *(volatile u_int *)IOASIC_REG_IMSK(ioasic_base) |=
396: IOASIC_INTR_SCC_1 | IOASIC_INTR_SCC_0;
1.1 jonathan 397: #if !defined(DEC_3000_300) && defined(SCC_DMA)
1.6 jonathan 398: *(volatile u_int *)IOASIC_REG_CSR(ioasic_base) |=
399: IOASIC_CSR_DMAEN_T1 | IOASIC_CSR_DMAEN_R1 |
400: IOASIC_CSR_DMAEN_T2 | IOASIC_CSR_DMAEN_R2;
1.1 jonathan 401: #endif
402: } else {
1.6 jonathan 403: *(volatile u_int *)IOASIC_REG_IMSK(ioasic_base) &=
404: ~(IOASIC_INTR_SCC_1 | IOASIC_INTR_SCC_0);
1.1 jonathan 405: #if !defined(DEC_3000_300) && defined(SCC_DMA)
1.6 jonathan 406: *(volatile u_int *)IOASIC_REG_CSR(ioasic_base) &=
407: ~(IOASIC_CSR_DMAEN_T1 | IOASIC_CSR_DMAEN_R1 |
408: IOASIC_CSR_DMAEN_T2 | IOASIC_CSR_DMAEN_R2);
1.1 jonathan 409: #endif
410: }
1.35 jonathan 411: tc_mb();
1.1 jonathan 412: }
413: #endif /*alpha*/
414:
415: void
416: sccattach(parent, self, aux)
417: struct device *parent;
418: struct device *self;
419: void *aux;
420: {
421: struct scc_softc *sc = (struct scc_softc *)self;
1.12 mhitch 422: struct ioasicdev_attach_args *d = aux;
1.1 jonathan 423: struct pdma *pdp;
424: struct tty *tp;
425: void *sccaddr;
426: int cntr;
1.38 jonathan 427: #if 0
1.1 jonathan 428: struct termios cterm;
429: struct tty ctty;
430: int s;
1.38 jonathan 431: #endif
1.40 jonathan 432: #ifdef pmax
433: extern int systype;
434: #else
1.1 jonathan 435: extern int cputype;
1.40 jonathan 436: #endif
1.34 jonathan 437: int unit;
1.1 jonathan 438:
439: unit = sc->sc_dv.dv_unit;
440:
1.39 jonathan 441: #ifdef pmax
1.25 jonathan 442: sccaddr = (void*)MIPS_PHYS_TO_KSEG1(d->iada_addr);
1.39 jonathan 443: #endif
444:
1.18 jonathan 445: #ifdef SPARSE
446: sccaddr = (void *)TC_DENSE_TO_SPARSE((tc_addr_t)sccaddr);
447: #endif
1.1 jonathan 448:
449: /* Register the interrupt handler. */
1.12 mhitch 450: ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_TTY,
1.6 jonathan 451: sccintr, (void *)sc);
452:
1.39 jonathan 453: #ifdef alpha
454: /*
455: * XXX
456: * If is the mandated remote console, point cn_tab at it now,
457: * to make later tests for console-ness MI.
458: */
459: if ((cputype == ST_DEC_3000_500 && sc->sc_dv.dv_unit == 1) ||
460: (cputype == ST_DEC_3000_300 && sc->sc_dv.dv_unit == 0)) {
461: cn_tab->cn_dev = makedev(SCCDEV, sc->sc_dv.dv_unit * 2);
1.6 jonathan 462: }
1.39 jonathan 463: #endif
1.1 jonathan 464:
465: /*
1.39 jonathan 466: * If this is the console, wait a while for any previous
467: * output to complete.
1.1 jonathan 468: */
1.39 jonathan 469: if (CONSOLE_ON_UNIT(unit))
1.1 jonathan 470: DELAY(10000);
1.21 mellon 471:
1.1 jonathan 472: pdp = &sc->scc_pdma[0];
473:
474: /* init pseudo DMA structures */
475: for (cntr = 0; cntr < 2; cntr++) {
476: pdp->p_addr = (void *)sccaddr;
1.18 jonathan 477: tp = sc->scc_tty[cntr] = ttymalloc();
1.40 jonathan 478: #ifdef pmax
479: if (systype == DS_MAXINE || cntr == 0)
1.13 mhitch 480: tty_attach(tp); /* XXX */
1.40 jonathan 481: #endif
1.1 jonathan 482: pdp->p_arg = (long)tp;
1.18 jonathan 483: pdp->p_fcn = (void (*)__P((struct tty*)))0;
1.1 jonathan 484: tp->t_dev = (dev_t)((unit << 1) | cntr);
485: pdp++;
486: }
487: /* What's the warning here? Defaulting to softCAR on line 2? */
1.39 jonathan 488: sc->scc_softCAR = sc->sc_dv.dv_cfdata->cf_flags;
1.1 jonathan 489:
1.39 jonathan 490: /*
491: * Reset chip, initialize register-copies in softc.
492: * XXX if this was console, no more printf()s until after
493: * scc_tty_init()!
494: */
1.1 jonathan 495: sccreset(sc);
496:
1.39 jonathan 497:
1.1 jonathan 498: /*
499: * Special handling for consoles.
500: */
1.39 jonathan 501: if (CONSOLE_ON_UNIT(unit)) {
1.9 jonathan 502: /*
503: * We were using PROM callbacks for console I/O,
504: * and we just reset the chip under the console.
1.39 jonathan 505: * Re-wire this unit up as console ASAP.
1.9 jonathan 506: */
1.44 jonathan 507: #ifdef alpha
1.9 jonathan 508: cn_tab = &scccons;
509: cn_tab->cn_dev = makedev(SCCDEV,
510: sc->sc_dv.dv_unit == 0 ? SCCCOMM2_PORT : SCCCOMM3_PORT);
1.39 jonathan 511:
512: /* Wire carrier for console. */
1.44 jonathan 513: #endif
1.42 mhitch 514: sc->scc_softCAR |= 1 << SCCLINE(cn_tab->cn_dev);
1.38 jonathan 515: scc_tty_init(sc, cn_tab->cn_dev);
1.18 jonathan 516:
1.39 jonathan 517: DELAY(20000);
518:
1.38 jonathan 519: printf(": console");
1.9 jonathan 520: }
1.39 jonathan 521: printf("\n");
522:
523:
524: /* Wire up any childre, like keyboards or mice. */
1.6 jonathan 525: #ifdef HAVE_RCONS
1.40 jonathan 526: if (systype != DS_MAXINE) {
1.38 jonathan 527: if (unit == 1) {
528: scc_kbd_init(sc, makedev(SCCDEV, SCCKBD_PORT));
529: } else if (unit == 0) {
530: scc_mouse_init(sc, makedev(SCCDEV, SCCMOUSE_PORT));
1.1 jonathan 531: }
1.38 jonathan 532: }
1.6 jonathan 533: #endif /* HAVE_RCONS */
1.38 jonathan 534:
535: }
536:
537:
538: /*
539: * Initialize line parameters for a serial console.
540: */
541: void
542: scc_tty_init(sc, dev)
543: struct scc_softc *sc;
544: dev_t dev;
545: {
546: struct termios cterm;
547: struct tty ctty;
548: int s;
549:
550: s = spltty();
551: ctty.t_dev = dev;
552: cterm.c_cflag = (TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8;
553: #ifdef pmax
554: /* XXX -- why on pmax, not on Alpha? */
555: cterm.c_cflag |= CLOCAL;
556: #endif
557: cterm.c_ospeed = cterm.c_ispeed = 9600;
1.44 jonathan 558: /* scc_tty_init() may be called when very cold */
559: (void) cold_sccparam(&ctty, &cterm, sc);
1.38 jonathan 560: DELAY(1000);
561: splx(s);
562: }
563:
564: void
565: scc_kbd_init(sc, dev)
566: struct scc_softc *sc;
567: dev_t dev;
568: {
569: struct termios cterm;
570: struct tty ctty;
571: int s;
572:
573: s = spltty();
574: ctty.t_dev = dev;
575: cterm.c_cflag = CS8;
576: #ifdef pmax
577: /* XXX -- why on pmax, not on Alpha? */
578: cterm.c_cflag |= CLOCAL;
579: #endif /* pmax */
580: cterm.c_ospeed = cterm.c_ispeed = 4800;
581: (void) sccparam(&ctty, &cterm);
582: DELAY(10000);
583: #ifdef notyet
584: /*
585: * For some reason doing this hangs the 3min
586: * during booting. Fortunately the keyboard
587: * works ok without it.
588: */
1.55 ad 589: lk_reset(ctty.t_dev, sccPutc);
1.38 jonathan 590: #endif /* notyet */
591: DELAY(10000);
592: splx(s);
593:
594: }
595:
596: void
597: scc_mouse_init(sc, dev)
598: struct scc_softc *sc;
599: dev_t dev;
600: {
601: struct termios cterm;
602: struct tty ctty;
603: int s;
604:
605: s = spltty();
606: ctty.t_dev = dev;
607: cterm.c_cflag = CS8 | PARENB | PARODD;
608: cterm.c_ospeed = cterm.c_ispeed = 4800;
609: (void) sccparam(&ctty, &cterm);
610: #ifdef HAVE_RCONS
1.40 jonathan 611: /*
612: * This is a hack. As Ted Lemon observed, we want bstreams,
613: * or failing that, a line discipline to do the inkernel DEC
614: * mouse tracking required by Xservers.
615: */
616: if (major(cn_tab->cn_dev) != RCONSDEV)
617: goto done;
618:
1.38 jonathan 619: DELAY(10000);
1.55 ad 620: lk_mouseinit(ctty.t_dev, sccPutc, sccGetc);
1.38 jonathan 621: DELAY(10000);
1.40 jonathan 622:
623: done:
624: #endif /* HAVE_RCONS */
625:
1.38 jonathan 626: splx(s);
1.9 jonathan 627: }
628:
1.1 jonathan 629:
630: /*
1.18 jonathan 631: * Reset the chip and the softc state.
632: * Resetting clobbers chip state and copies of registers for both channels.
633: * The driver assumes this is only ever called once per unit.
1.1 jonathan 634: */
635: static void
636: sccreset(sc)
1.51 simonb 637: struct scc_softc *sc;
1.1 jonathan 638: {
1.51 simonb 639: scc_regmap_t *regs;
640: u_char val;
1.1 jonathan 641:
642: regs = (scc_regmap_t *)sc->scc_pdma[0].p_addr;
643: /*
644: * Chip once-only initialization
645: *
646: * NOTE: The wiring we assume is the one on the 3min:
647: *
648: * out A-TxD --> TxD keybd or mouse
649: * in A-RxD --> RxD keybd or mouse
650: * out A-DTR~ --> DTR comm
651: * out A-RTS~ --> RTS comm
652: * in A-CTS~ --> SI comm
653: * in A-DCD~ --> RI comm
654: * in A-SYNCH~--> DSR comm
655: * out B-TxD --> TxD comm
656: * in B-RxD --> RxD comm
657: * in B-RxC --> TRxCB comm
658: * in B-TxC --> RTxCB comm
659: * out B-RTS~ --> SS comm
660: * in B-CTS~ --> CTS comm
661: * in B-DCD~ --> CD comm
662: */
663: SCC_INIT_REG(regs, SCC_CHANNEL_A);
664: SCC_INIT_REG(regs, SCC_CHANNEL_B);
665:
666: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, ZSWR9_HARD_RESET);
667: DELAY(50000); /*enough ? */
668: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, 0);
669:
670: /* program the interrupt vector */
671: SCC_WRITE_REG(regs, SCC_CHANNEL_A, ZSWR_IVEC, 0xf0);
672: SCC_WRITE_REG(regs, SCC_CHANNEL_B, ZSWR_IVEC, 0xf0);
673: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR9, ZSWR9_VECTOR_INCL_STAT);
674:
675: /* receive parameters and control */
676: sc->scc_wreg[SCC_CHANNEL_A].wr3 = 0;
677: sc->scc_wreg[SCC_CHANNEL_B].wr3 = 0;
678:
679: /* timing base defaults */
680: sc->scc_wreg[SCC_CHANNEL_A].wr4 = ZSWR4_CLK_X16;
1.36 jonathan 681: sc->scc_wreg[SCC_CHANNEL_B].wr4 = ZSWR4_CLK_X16;
1.1 jonathan 682:
683: /* enable DTR, RTS and SS */
684: #ifdef alpha
685: /* XXX -- who changed the alpha driver to do this, and why? */
686: sc->scc_wreg[SCC_CHANNEL_B].wr5 = 0;
687: #else
688: sc->scc_wreg[SCC_CHANNEL_B].wr5 = ZSWR5_RTS;
689: #endif
690: sc->scc_wreg[SCC_CHANNEL_A].wr5 = ZSWR5_RTS | ZSWR5_DTR;
691:
692: /* baud rates */
693: val = ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK;
694: sc->scc_wreg[SCC_CHANNEL_B].wr14 = val;
695: sc->scc_wreg[SCC_CHANNEL_A].wr14 = val;
696:
697: /* interrupt conditions */
698: val = ZSWR1_RIE | ZSWR1_PE_SC | ZSWR1_SIE | ZSWR1_TIE;
699: sc->scc_wreg[SCC_CHANNEL_A].wr1 = val;
700: sc->scc_wreg[SCC_CHANNEL_B].wr1 = val;
701: }
702:
703: int
704: sccopen(dev, flag, mode, p)
705: dev_t dev;
706: int flag, mode;
707: struct proc *p;
708: {
1.51 simonb 709: struct scc_softc *sc;
710: struct tty *tp;
711: int unit, line;
1.1 jonathan 712: int s, error = 0;
713:
714: unit = SCCUNIT(dev);
1.10 thorpej 715: if (unit >= scc_cd.cd_ndevs)
1.1 jonathan 716: return (ENXIO);
1.10 thorpej 717: sc = scc_cd.cd_devs[unit];
1.1 jonathan 718: if (!sc)
719: return (ENXIO);
720:
721: line = SCCLINE(dev);
722: if (sc->scc_pdma[line].p_addr == NULL)
723: return (ENXIO);
1.18 jonathan 724: tp = sc->scc_tty[line];
1.13 mhitch 725: if (tp == NULL) {
1.18 jonathan 726: tp = sc->scc_tty[line] = ttymalloc();
1.13 mhitch 727: tty_attach(tp);
728: }
1.1 jonathan 729: tp->t_oproc = sccstart;
730: tp->t_param = sccparam;
731: tp->t_dev = dev;
1.39 jonathan 732:
733: /*
734: * Do the following only for first opens.
735: */
736: s = spltty();
1.33 jonathan 737: if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
738: ttychars(tp);
1.1 jonathan 739: #ifndef PORTSELECTOR
740: if (tp->t_ispeed == 0) {
741: #endif
742: tp->t_iflag = TTYDEF_IFLAG;
743: tp->t_oflag = TTYDEF_OFLAG;
744: tp->t_cflag = TTYDEF_CFLAG;
745: tp->t_lflag = LFLAG;
746: tp->t_ispeed = tp->t_ospeed = ISPEED;
747: #ifdef PORTSELECTOR
748: tp->t_cflag |= HUPCL;
749: #else
750: }
751: #endif
752: (void) sccparam(tp, &tp->t_termios);
753: ttsetwater(tp);
1.39 jonathan 754: }
755: else if ((tp->t_state & TS_XCLUDE) && curproc->p_ucred->cr_uid != 0) {
756: error = EBUSY;
757: splx(s);
758: goto bad;
759: }
1.1 jonathan 760: (void) sccmctl(dev, DML_DTR, DMSET);
1.39 jonathan 761:
1.1 jonathan 762: while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
1.36 jonathan 763: !(tp->t_state & TS_CARR_ON)) {
1.33 jonathan 764: tp->t_wopen++;
765: error = ttysleep(tp, (caddr_t)&tp->t_rawq, TTIPRI | PCATCH,
766: ttopen, 0);
767: tp->t_wopen--;
768: if (error != 0)
1.1 jonathan 769: break;
770: }
771: splx(s);
1.39 jonathan 772:
1.1 jonathan 773: if (error)
1.39 jonathan 774: goto bad;
775:
1.29 jonathan 776: error = (*linesw[tp->t_line].l_open)(dev, tp);
777:
1.39 jonathan 778: if (error)
779: goto bad;
780: bad:
1.29 jonathan 781: return (error);
1.1 jonathan 782: }
783:
784: /*ARGSUSED*/
785: int
786: sccclose(dev, flag, mode, p)
787: dev_t dev;
788: int flag, mode;
789: struct proc *p;
790: {
1.51 simonb 791: struct scc_softc *sc = scc_cd.cd_devs[SCCUNIT(dev)];
792: struct tty *tp;
793: int line;
1.1 jonathan 794:
795: line = SCCLINE(dev);
1.18 jonathan 796: tp = sc->scc_tty[line];
1.1 jonathan 797: if (sc->scc_wreg[line].wr5 & ZSWR5_BREAK) {
798: sc->scc_wreg[line].wr5 &= ~ZSWR5_BREAK;
799: ttyoutput(0, tp);
800: }
801: (*linesw[tp->t_line].l_close)(tp, flag);
1.33 jonathan 802: if ((tp->t_cflag & HUPCL) || tp->t_wopen ||
1.1 jonathan 803: !(tp->t_state & TS_ISOPEN))
804: (void) sccmctl(dev, 0, DMSET);
805: return (ttyclose(tp));
806: }
807:
808: int
809: sccread(dev, uio, flag)
810: dev_t dev;
811: struct uio *uio;
812: int flag;
813: {
1.51 simonb 814: struct scc_softc *sc;
815: struct tty *tp;
1.1 jonathan 816:
1.18 jonathan 817: sc = scc_cd.cd_devs[SCCUNIT(dev)]; /* XXX*/
818: tp = sc->scc_tty[SCCLINE(dev)];
1.1 jonathan 819: return ((*linesw[tp->t_line].l_read)(tp, uio, flag));
820: }
821:
822: int
823: sccwrite(dev, uio, flag)
824: dev_t dev;
825: struct uio *uio;
826: int flag;
827: {
1.51 simonb 828: struct scc_softc *sc;
829: struct tty *tp;
1.1 jonathan 830:
1.18 jonathan 831: sc = scc_cd.cd_devs[SCCUNIT(dev)]; /* XXX*/
832: tp = sc->scc_tty[SCCLINE(dev)];
1.1 jonathan 833: return ((*linesw[tp->t_line].l_write)(tp, uio, flag));
834: }
835:
836: struct tty *
837: scctty(dev)
1.36 jonathan 838: dev_t dev;
1.1 jonathan 839: {
1.51 simonb 840: struct scc_softc *sc;
841: struct tty *tp;
842: int unit = SCCUNIT(dev);
1.1 jonathan 843:
1.18 jonathan 844: if ((unit >= scc_cd.cd_ndevs) || (sc = scc_cd.cd_devs[unit]) == 0)
845: return (0);
846: tp = sc->scc_tty[SCCLINE(dev)];
1.36 jonathan 847: return (tp);
1.1 jonathan 848: }
849:
850: /*ARGSUSED*/
851: int
852: sccioctl(dev, cmd, data, flag, p)
853: dev_t dev;
854: u_long cmd;
855: caddr_t data;
856: int flag;
857: struct proc *p;
858: {
1.51 simonb 859: struct scc_softc *sc;
860: struct tty *tp;
1.1 jonathan 861: int error, line;
862:
1.18 jonathan 863: line = SCCLINE(dev);
864: sc = scc_cd.cd_devs[SCCUNIT(dev)];
865: tp = sc->scc_tty[line];
1.1 jonathan 866: error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p);
867: if (error >= 0)
868: return (error);
869: error = ttioctl(tp, cmd, data, flag, p);
870: if (error >= 0)
871: return (error);
872:
873: switch (cmd) {
874:
875: case TIOCSBRK:
876: sc->scc_wreg[line].wr5 |= ZSWR5_BREAK;
877: ttyoutput(0, tp);
878: break;
879:
880: case TIOCCBRK:
881: sc->scc_wreg[line].wr5 &= ~ZSWR5_BREAK;
882: ttyoutput(0, tp);
883: break;
884:
885: case TIOCSDTR:
886: (void) sccmctl(dev, DML_DTR|DML_RTS, DMBIS);
887: break;
888:
889: case TIOCCDTR:
890: (void) sccmctl(dev, DML_DTR|DML_RTS, DMBIC);
891: break;
892:
893: case TIOCMSET:
894: (void) sccmctl(dev, *(int *)data, DMSET);
895: break;
896:
897: case TIOCMBIS:
898: (void) sccmctl(dev, *(int *)data, DMBIS);
899: break;
900:
901: case TIOCMBIC:
902: (void) sccmctl(dev, *(int *)data, DMBIC);
903: break;
904:
905: case TIOCMGET:
906: *(int *)data = sccmctl(dev, 0, DMGET);
907: break;
908:
909: default:
910: return (ENOTTY);
911: }
912: return (0);
913: }
914:
1.34 jonathan 915:
1.36 jonathan 916:
1.18 jonathan 917: /*
918: * Set line parameters -- tty t_param entry point.
919: */
1.1 jonathan 920: int
921: sccparam(tp, t)
1.51 simonb 922: struct tty *tp;
923: struct termios *t;
1.1 jonathan 924: {
1.51 simonb 925: struct scc_softc *sc;
1.18 jonathan 926:
927: /* Extract the softc and call cold_sccparam to do all the work. */
928: sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
929: return cold_sccparam(tp, t, sc);
930: }
931:
932:
1.36 jonathan 933: /*
934: * Do what sccparam() (t_param entry point) does, but callable when cold.
1.18 jonathan 935: */
936: static int
937: cold_sccparam(tp, t, sc)
1.51 simonb 938: struct tty *tp;
939: struct termios *t;
940: struct scc_softc *sc;
941: {
942: scc_regmap_t *regs;
943: int line;
944: u_char value, wvalue;
945: int cflag = t->c_cflag;
1.1 jonathan 946: int ospeed;
947:
1.36 jonathan 948: /* Check arguments */
1.18 jonathan 949: if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
1.36 jonathan 950: return (EINVAL);
1.1 jonathan 951: ospeed = ttspeedtab(t->c_ospeed, sccspeedtab);
1.36 jonathan 952: if (ospeed < 0)
953: return (EINVAL);
954: /* and copy to tty */
955: tp->t_ispeed = t->c_ispeed;
956: tp->t_ospeed = t->c_ospeed;
957: tp->t_cflag = cflag;
1.1 jonathan 958:
1.45 jonathan 959: if (t->c_ospeed == 0) {
1.1 jonathan 960: (void) sccmctl(tp->t_dev, 0, DMSET); /* hang up line */
961: return (0);
962: }
963:
964: line = SCCLINE(tp->t_dev);
965: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
966:
967: /*
968: * pmax driver used to reset the SCC here. That reset causes the
1.38 jonathan 969: * other channel on the SCC to drop output chars: at least that's
1.1 jonathan 970: * what CGD reports for the Alpha. It's a bug.
971: */
972: #if 0
973: /* reset line */
974: if (line == SCC_CHANNEL_A)
975: value = ZSWR9_A_RESET;
976: else
977: value = ZSWR9_B_RESET;
978: SCC_WRITE_REG(regs, line, SCC_WR9, value);
979: DELAY(25);
980: #endif
981:
982: /* stop bits, normally 1 */
983: value = sc->scc_wreg[line].wr4 & 0xf0;
984: if (cflag & CSTOPB)
985: value |= ZSWR4_TWOSB;
986: else
987: value |= ZSWR4_ONESB;
988: if ((cflag & PARODD) == 0)
989: value |= ZSWR4_EVENP;
990: if (cflag & PARENB)
991: value |= ZSWR4_PARENB;
992:
993: /* set it now, remember it must be first after reset */
994: sc->scc_wreg[line].wr4 = value;
995: SCC_WRITE_REG(regs, line, SCC_WR4, value);
996:
997: /* vector again */
998: SCC_WRITE_REG(regs, line, ZSWR_IVEC, 0xf0);
999:
1000: /* clear break, keep rts dtr */
1001: wvalue = sc->scc_wreg[line].wr5 & (ZSWR5_DTR|ZSWR5_RTS);
1002: switch (cflag & CSIZE) {
1003: case CS5:
1004: value = ZSWR3_RX_5;
1005: wvalue |= ZSWR5_TX_5;
1006: break;
1007: case CS6:
1008: value = ZSWR3_RX_6;
1009: wvalue |= ZSWR5_TX_6;
1010: break;
1011: case CS7:
1012: value = ZSWR3_RX_7;
1013: wvalue |= ZSWR5_TX_7;
1014: break;
1015: case CS8:
1016: default:
1017: value = ZSWR3_RX_8;
1018: wvalue |= ZSWR5_TX_8;
1019: };
1020: sc->scc_wreg[line].wr3 = value;
1021: SCC_WRITE_REG(regs, line, SCC_WR3, value);
1022:
1023: sc->scc_wreg[line].wr5 = wvalue;
1024: SCC_WRITE_REG(regs, line, SCC_WR5, wvalue);
1025:
1026: /*
1027: * XXX Does the SCC chip require us to refresh the WR5 register
1028: * for the other channel after writing the other, or not?
1029: */
1030: #ifdef notdef
1031: /* XXX */
1032: {
1033: int otherline = (line + 1) & 1;
1034: SCC_WRITE_REG(regs, otherline, SCC_WR5, sc->scc_wreg[otherline].wr5);
1035: }
1036: #endif
1037:
1038: SCC_WRITE_REG(regs, line, ZSWR_SYNCLO, 0);
1039: SCC_WRITE_REG(regs, line, ZSWR_SYNCHI, 0);
1040: SCC_WRITE_REG(regs, line, SCC_WR9, ZSWR9_VECTOR_INCL_STAT);
1041: SCC_WRITE_REG(regs, line, SCC_WR10, 0);
1042: value = ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD |
1043: ZSWR11_TRXC_OUT_ENA | ZSWR11_TRXC_BAUD;
1044: SCC_WRITE_REG(regs, line, SCC_WR11, value);
1045: SCC_SET_TIMING_BASE(regs, line, ospeed);
1046: value = sc->scc_wreg[line].wr14;
1047: SCC_WRITE_REG(regs, line, SCC_WR14, value);
1048:
1049: #ifdef alpha
1050: if (SCCUNIT(tp->t_dev) == 1) {
1051: /* On unit one, on the flamingo, modem control is floating! */
1052: value = ZSWR15_BREAK_IE;
1053: } else
1054: #endif
1055: {
1056: value = ZSWR15_BREAK_IE | ZSWR15_CTS_IE | ZSWR15_DCD_IE;
1057: }
1058: SCC_WRITE_REG(regs, line, SCC_WR15, value);
1059:
1060: /* and now the enables */
1061: value = sc->scc_wreg[line].wr3 | ZSWR3_RX_ENABLE;
1062: SCC_WRITE_REG(regs, line, SCC_WR3, value);
1063: value = sc->scc_wreg[line].wr5 | ZSWR5_TX_ENABLE;
1064: sc->scc_wreg[line].wr5 = value;
1065: SCC_WRITE_REG(regs, line, SCC_WR5, value);
1066:
1067: /* master inter enable */
1068: value = ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT;
1069: SCC_WRITE_REG(regs, line, SCC_WR9, value);
1070: SCC_WRITE_REG(regs, line, SCC_WR1, sc->scc_wreg[line].wr1);
1.18 jonathan 1071: tc_mb();
1.1 jonathan 1072:
1073: #ifdef alpha
1.18 jonathan 1074: scc_alphaintr(1); /* XXX XXX XXX */
1.1 jonathan 1075: #endif /*alpha*/
1076:
1077: return (0);
1078: }
1079:
1.18 jonathan 1080:
1.1 jonathan 1081: /*
1.51 simonb 1082: * transmission done interrupts
1.1 jonathan 1083: */
1.39 jonathan 1084: static void
1085: scc_txintr(sc, chan, regs)
1086: struct scc_softc *sc;
1087: int chan;
1088: scc_regmap_t *regs;
1.1 jonathan 1089: {
1.51 simonb 1090: struct tty *tp = sc->scc_tty[chan];
1091: struct pdma *dp = &sc->scc_pdma[chan];
1092: int cc;
1.1 jonathan 1093:
1.39 jonathan 1094: tp = sc->scc_tty[chan];
1095: dp = &sc->scc_pdma[chan];
1096: if (dp->p_mem < dp->p_end) {
1097: SCC_WRITE_DATA(regs, chan, *dp->p_mem++);
1.3 jonathan 1098: #ifdef pmax /* Alpha handles the 1.6 msec settle time in hardware */
1.39 jonathan 1099: DELAY(2);
1.3 jonathan 1100: #endif
1.39 jonathan 1101: tc_mb();
1102: } else {
1103: tp->t_state &= ~TS_BUSY;
1104: if (tp->t_state & TS_FLUSH)
1105: tp->t_state &= ~TS_FLUSH;
1106: else {
1107: ndflush(&tp->t_outq, dp->p_mem -
1108: (caddr_t) tp->t_outq.c_cf);
1109: dp->p_end = dp->p_mem = tp->t_outq.c_cf;
1110: }
1111: if (tp->t_line)
1112: (*linesw[tp->t_line].l_start)(tp);
1113: else
1114: sccstart(tp);
1115: if (tp->t_outq.c_cc == 0 || !(tp->t_state & TS_BUSY)) {
1116: SCC_READ_REG(regs, chan, SCC_RR15, cc);
1117: cc &= ~ZSWR15_TXUEOM_IE;
1118: SCC_WRITE_REG(regs, chan, SCC_WR15, cc);
1119: cc = sc->scc_wreg[chan].wr1 & ~ZSWR1_TIE;
1120: SCC_WRITE_REG(regs, chan, SCC_WR1, cc);
1121: sc->scc_wreg[chan].wr1 = cc;
1.18 jonathan 1122: tc_mb();
1.1 jonathan 1123: }
1.39 jonathan 1124: }
1125: }
1126:
1.51 simonb 1127: /*
1128: * receive interrupts
1.39 jonathan 1129: */
1130: static void
1131: scc_rxintr(sc, chan, regs, unit)
1132: struct scc_softc *sc;
1133: int chan;
1134: scc_regmap_t *regs;
1135: int unit;
1136: {
1.51 simonb 1137: struct tty *tp = sc->scc_tty[chan];
1.39 jonathan 1138: int cc, rr1 = 0, rr2 = 0; /* XXX */
1.50 mrg 1139: #ifdef HAVE_RCONS
1.47 ad 1140: char *cp;
1.53 ad 1141: int cl;
1.50 mrg 1142: #endif
1.39 jonathan 1143:
1144: SCC_READ_DATA(regs, chan, cc);
1145: if (rr2 == SCC_RR2_A_RECV_SPECIAL ||
1.1 jonathan 1146: rr2 == SCC_RR2_B_RECV_SPECIAL) {
1.39 jonathan 1147: SCC_READ_REG(regs, chan, SCC_RR1, rr1);
1148: SCC_WRITE_REG(regs, chan, SCC_RR0, ZSWR0_RESET_ERRORS);
1149: if (rr1 & ZSRR1_DO) {
1150: log(LOG_WARNING, "scc%d,%d: silo overflow\n",
1151: unit >> 1, chan);
1.1 jonathan 1152: }
1.39 jonathan 1153: }
1.1 jonathan 1154:
1.39 jonathan 1155: /*
1156: * Keyboard needs special treatment.
1157: */
1158: if (tp == scctty(makedev(SCCDEV, SCCKBD_PORT))) {
1.37 jonathan 1159: #if defined(DDB) && defined(LK_DO)
1.1 jonathan 1160: if (cc == LK_DO) {
1161: spl0();
1.43 jonathan 1162: console_debugger();
1.39 jonathan 1163: return;
1.1 jonathan 1164: }
1165: #endif
1166: #ifdef DEBUG
1.39 jonathan 1167: debugChar = cc;
1.1 jonathan 1168: #endif
1.39 jonathan 1169: if (sccDivertXInput) {
1170: (*sccDivertXInput)(cc);
1171: return;
1172: }
1.6 jonathan 1173: #ifdef HAVE_RCONS
1.55 ad 1174: if ((cp = lk_mapchar(cc, &cl)) == NULL)
1.39 jonathan 1175: return;
1.51 simonb 1176:
1.53 ad 1177: while (cl--)
1.47 ad 1178: rcons_input(0, *cp++);
1.1 jonathan 1179: #endif
1.39 jonathan 1180: /*
1181: * Now for mousey
1182: */
1183: } else if (tp == scctty(makedev(SCCDEV, SCCMOUSE_PORT)) &&
1184: sccMouseButtons) {
1.18 jonathan 1185: #ifdef HAVE_RCONS
1.39 jonathan 1186: /*XXX*/
1187: mouseInput(cc);
1.34 jonathan 1188: #endif
1.39 jonathan 1189: return;
1190: }
1191: if (!(tp->t_state & TS_ISOPEN)) {
1192: wakeup((caddr_t)&tp->t_rawq);
1.1 jonathan 1193: #ifdef PORTSELECTOR
1.39 jonathan 1194: if (!(tp->t_state & TS_WOPEN))
1.1 jonathan 1195: #endif
1.39 jonathan 1196: return;
1197: }
1198: if (rr2 == SCC_RR2_A_RECV_SPECIAL ||
1199: rr2 == SCC_RR2_B_RECV_SPECIAL) {
1200: if (rr1 & ZSRR1_PE)
1201: cc |= TTY_PE;
1202: if (rr1 & ZSRR1_FE)
1203: cc |= TTY_FE;
1204: }
1205: (*linesw[tp->t_line].l_rint)(cc, tp);
1206: }
1207:
1208: /*
1209: * Modem status interrupts
1210: */
1211: static void inline
1212: scc_stintr(sc, chan, regs, unit)
1213: struct scc_softc *sc;
1214: int chan;
1215: scc_regmap_t *regs;
1216: int unit;
1217: {
1218:
1219: SCC_WRITE_REG(regs, chan, SCC_RR0, ZSWR0_RESET_STATUS);
1220: scc_modem_intr(unit | chan);
1221: }
1222:
1223:
1224: /*
1225: * Check for interrupts from all devices.
1226: */
1227: int
1228: sccintr(xxxsc)
1229: void *xxxsc;
1230: {
1.51 simonb 1231: struct scc_softc *sc = (struct scc_softc *)xxxsc;
1232: int unit = (long)sc->sc_dv.dv_unit;
1233: scc_regmap_t *regs;
1234: int rr3;
1.39 jonathan 1235:
1236: regs = (scc_regmap_t *)sc->scc_pdma[0].p_addr;
1237: unit <<= 1;
1238:
1239: /* Note: only channel A has an RR3 */
1240: SCC_READ_REG(regs, SCC_CHANNEL_A, ZSRR_IPEND, rr3);
1.51 simonb 1241:
1.39 jonathan 1242: /*
1243: * Clear interrupt first to avoid a race condition.
1244: * If a new interrupt condition happens while we are
1245: * servicing this one, we will get another interrupt
1246: * shortly. We can NOT just sit here in a loop, or
1247: * we will cause horrible latency for other devices
1248: * on this interrupt level (i.e. sun3x floppy disk).
1249: */
1250:
1251: /*
1252: * At elast some, maybe all DECstation chips have modem
1253: * leads crosswired: the data comes in one channel and the
1254: * bulkead modem signals for that port are wired to the
1255: * _other_ channel of the chip. Yes, really.
1256: * This code cannot get that right.
1257: */
1258:
1259: /* First look at channel A. */
1260: if (rr3 & (ZSRR3_IP_A_RX | ZSRR3_IP_A_TX | ZSRR3_IP_A_STAT)) {
1261: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_RR0, ZSWR0_CLR_INTR);
1262: if (rr3 & ZSRR3_IP_A_RX)
1263: scc_rxintr(sc, SCC_CHANNEL_A, regs, unit);
1264:
1265: if (rr3 & ZSRR3_IP_A_STAT) {
1266: /* XXX swapped channels */
1267: scc_stintr(sc, SCC_CHANNEL_A, regs, unit);
1.1 jonathan 1268: }
1.39 jonathan 1269:
1270: if (rr3 & ZSRR3_IP_A_TX)
1271: scc_txintr(sc, SCC_CHANNEL_A, regs);
1272: }
1273:
1274: /* Now look at channel B. */
1275: if (rr3 & (ZSRR3_IP_B_RX | ZSRR3_IP_B_TX | ZSRR3_IP_B_STAT)) {
1276: SCC_WRITE_REG(regs, SCC_CHANNEL_B, SCC_RR0, ZSWR0_CLR_INTR);
1277: if (rr3 & ZSRR3_IP_B_RX)
1278: scc_rxintr(sc, SCC_CHANNEL_B, regs, unit);
1279: if (rr3 & ZSRR3_IP_B_STAT) {
1280: /* XXX swapped channels */
1281: scc_stintr(sc, SCC_CHANNEL_B, regs, unit);
1.1 jonathan 1282: }
1.39 jonathan 1283: if (rr3 & ZSRR3_IP_B_TX)
1284: scc_txintr(sc, SCC_CHANNEL_B, regs);
1.1 jonathan 1285: }
1.39 jonathan 1286:
1287: return 1;
1.1 jonathan 1288: }
1289:
1290: void
1291: sccstart(tp)
1.51 simonb 1292: struct tty *tp;
1.1 jonathan 1293: {
1.51 simonb 1294: struct pdma *dp;
1295: scc_regmap_t *regs;
1296: struct scc_softc *sc;
1297: int cc, chan;
1.1 jonathan 1298: u_char temp;
1299: int s, sendone;
1300:
1.10 thorpej 1301: sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
1.1 jonathan 1302: dp = &sc->scc_pdma[SCCLINE(tp->t_dev)];
1303: regs = (scc_regmap_t *)dp->p_addr;
1304: s = spltty();
1305: if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP))
1306: goto out;
1307: if (tp->t_outq.c_cc <= tp->t_lowat) {
1308: if (tp->t_state & TS_ASLEEP) {
1309: tp->t_state &= ~TS_ASLEEP;
1310: wakeup((caddr_t)&tp->t_outq);
1311: }
1312: selwakeup(&tp->t_wsel);
1313: }
1314: if (tp->t_outq.c_cc == 0)
1315: goto out;
1.38 jonathan 1316:
1.4 jonathan 1317: cc = ndqb(&tp->t_outq, 0);
1318:
1.1 jonathan 1319: tp->t_state |= TS_BUSY;
1320: dp->p_end = dp->p_mem = tp->t_outq.c_cf;
1321: dp->p_end += cc;
1322:
1323: /*
1324: * Enable transmission and send the first char, as required.
1325: */
1326: chan = SCCLINE(tp->t_dev);
1327: SCC_READ_REG(regs, chan, SCC_RR0, temp);
1328: sendone = (temp & ZSRR0_TX_READY);
1329: SCC_READ_REG(regs, chan, SCC_RR15, temp);
1330: temp |= ZSWR15_TXUEOM_IE;
1331: SCC_WRITE_REG(regs, chan, SCC_WR15, temp);
1332: temp = sc->scc_wreg[chan].wr1 | ZSWR1_TIE;
1333: SCC_WRITE_REG(regs, chan, SCC_WR1, temp);
1334: sc->scc_wreg[chan].wr1 = temp;
1335: if (sendone) {
1336: #ifdef DIAGNOSTIC
1337: if (cc == 0)
1338: panic("sccstart: No chars");
1.36 jonathan 1339: #endif
1.1 jonathan 1340: SCC_WRITE_DATA(regs, chan, *dp->p_mem++);
1.3 jonathan 1341: #ifdef pmax /* Alpha handles the 1.6 msec settle time in hardware */
1342: DELAY(2);
1343: #endif
1.1 jonathan 1344: }
1.18 jonathan 1345: tc_mb();
1.1 jonathan 1346: out:
1347: splx(s);
1348: }
1349:
1350: /*
1351: * Stop output on a line.
1352: */
1353: /*ARGSUSED*/
1.14 mycroft 1354: void
1.1 jonathan 1355: sccstop(tp, flag)
1.51 simonb 1356: struct tty *tp;
1.1 jonathan 1357: int flag;
1358: {
1.51 simonb 1359: struct pdma *dp;
1360: struct scc_softc *sc;
1361: int s;
1.1 jonathan 1362:
1.10 thorpej 1363: sc = scc_cd.cd_devs[SCCUNIT(tp->t_dev)];
1.1 jonathan 1364: dp = &sc->scc_pdma[SCCLINE(tp->t_dev)];
1365: s = spltty();
1366: if (tp->t_state & TS_BUSY) {
1367: dp->p_end = dp->p_mem;
1368: if (!(tp->t_state & TS_TTSTOP))
1369: tp->t_state |= TS_FLUSH;
1370: }
1371: splx(s);
1372: }
1373:
1374: int
1375: sccmctl(dev, bits, how)
1376: dev_t dev;
1377: int bits, how;
1378: {
1.51 simonb 1379: struct scc_softc *sc;
1380: scc_regmap_t *regs;
1381: int line, mbits;
1382: u_char value;
1.1 jonathan 1383: int s;
1384:
1.10 thorpej 1385: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1.1 jonathan 1386: line = SCCLINE(dev);
1387: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
1388: s = spltty();
1389: /*
1390: * only channel B has modem control, however the DTR and RTS
1391: * pins on the comm port are wired to the DTR and RTS A channel
1392: * signals.
1393: */
1394: mbits = DML_DTR | DML_DSR | DML_CAR;
1395: if (line == SCC_CHANNEL_B) {
1396: if (sc->scc_wreg[SCC_CHANNEL_A].wr5 & ZSWR5_DTR)
1397: mbits = DML_DTR | DML_DSR;
1398: else
1399: mbits = 0;
1400: SCC_READ_REG_ZERO(regs, SCC_CHANNEL_B, value);
1401: if (value & ZSRR0_DCD)
1402: mbits |= DML_CAR;
1403: }
1404: switch (how) {
1405: case DMSET:
1406: mbits = bits;
1407: break;
1408:
1409: case DMBIS:
1410: mbits |= bits;
1411: break;
1412:
1413: case DMBIC:
1414: mbits &= ~bits;
1415: break;
1416:
1417: case DMGET:
1418: (void) splx(s);
1419: return (mbits);
1420: }
1421: if (line == SCC_CHANNEL_B) {
1422: if (mbits & DML_DTR)
1423: sc->scc_wreg[SCC_CHANNEL_A].wr5 |= ZSWR5_DTR;
1424: else
1425: sc->scc_wreg[SCC_CHANNEL_A].wr5 &= ~ZSWR5_DTR;
1426: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR5,
1427: sc->scc_wreg[SCC_CHANNEL_A].wr5);
1428: }
1429: if ((mbits & DML_DTR) || (sc->scc_softCAR & (1 << line)))
1.18 jonathan 1430: sc->scc_tty[line]->t_state |= TS_CARR_ON;
1.1 jonathan 1431: (void) splx(s);
1432: return (mbits);
1433: }
1434:
1435: /*
1436: * Check for carrier transition.
1437: */
1438: static void
1439: scc_modem_intr(dev)
1440: dev_t dev;
1441: {
1.51 simonb 1442: scc_regmap_t *regs;
1443: struct scc_softc *sc;
1444: struct tty *tp;
1445: int car, chan;
1446: u_char value;
1.1 jonathan 1447: int s;
1448:
1.18 jonathan 1449: chan = SCCLINE(dev);
1.10 thorpej 1450: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1.18 jonathan 1451: tp = sc->scc_tty[chan];
1.1 jonathan 1452: regs = (scc_regmap_t *)sc->scc_pdma[chan].p_addr;
1.39 jonathan 1453:
1454: if (chan == SCC_CHANNEL_A) {
1.1 jonathan 1455: return;
1.39 jonathan 1456: }
1457:
1.1 jonathan 1458: s = spltty();
1.39 jonathan 1459: SCC_READ_REG_ZERO(regs, chan, value);
1.26 jonathan 1460:
1.1 jonathan 1461: if (sc->scc_softCAR & (1 << chan))
1462: car = 1;
1463: else {
1464: car = value & ZSRR0_DCD;
1465: }
1466:
1.34 jonathan 1467: /* Break on serial console drops into the debugger */
1.26 jonathan 1468: if ((value & ZSRR0_BREAK) && CONSOLE_ON_UNIT(sc->sc_dv.dv_unit)) {
1469: #ifdef DDB
1470: splx(s); /* spl0()? */
1.43 jonathan 1471: console_debugger();
1.26 jonathan 1472: return;
1473: #else
1474: /* XXX maybe fall back to PROM? */
1475: #endif
1476: }
1477:
1.1 jonathan 1478: /*
1.18 jonathan 1479: * The pmax driver follows carrier-detect. The Alpha does not.
1.34 jonathan 1480: * On pmax, ignore hups on a console tty.
1.39 jonathan 1481: * On alpha, a no-op, for historical reasons.
1.1 jonathan 1482: */
1.38 jonathan 1483: #ifdef pmax
1.39 jonathan 1484: if (!CONSOLE_ON_UNIT(sc->sc_dv.dv_unit)) {
1.26 jonathan 1485: if (car) {
1486: /* carrier present */
1487: if (!(tp->t_state & TS_CARR_ON))
1488: (void)(*linesw[tp->t_line].l_modem)(tp, 1);
1489: } else if (tp->t_state & TS_CARR_ON)
1.36 jonathan 1490: (void)(*linesw[tp->t_line].l_modem)(tp, 0);
1.26 jonathan 1491: }
1.38 jonathan 1492: #endif /* pmax */
1.1 jonathan 1493: splx(s);
1494: }
1495:
1496: /*
1497: * Get a char off the appropriate line via. a busy wait loop.
1498: */
1499: int
1500: sccGetc(dev)
1501: dev_t dev;
1502: {
1.51 simonb 1503: scc_regmap_t *regs;
1504: int c, line;
1505: u_char value;
1.1 jonathan 1506: int s;
1507:
1508: line = SCCLINE(dev);
1.18 jonathan 1509: if (cold && scc_cons_addr) {
1510: regs = scc_cons_addr;
1511: } else {
1.51 simonb 1512: struct scc_softc *sc;
1.18 jonathan 1513: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1514: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
1515: }
1516:
1.1 jonathan 1517: if (!regs)
1518: return (0);
1519: #ifdef pmax
1.2 jonathan 1520: /*s = spltty(); */ /* XXX why different spls? */
1521: s = splhigh();
1.1 jonathan 1522: #else
1523: s = splhigh();
1524: #endif
1525: for (;;) {
1526: SCC_READ_REG(regs, line, SCC_RR0, value);
1527: if (value & ZSRR0_RX_READY) {
1528: SCC_READ_REG(regs, line, SCC_RR1, value);
1529: SCC_READ_DATA(regs, line, c);
1530: if (value & (ZSRR1_PE | ZSRR1_DO | ZSRR1_FE)) {
1531: SCC_WRITE_REG(regs, line, SCC_WR0,
1.36 jonathan 1532: ZSWR0_RESET_ERRORS);
1.1 jonathan 1533: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR0,
1.36 jonathan 1534: ZSWR0_CLR_INTR);
1.1 jonathan 1535: } else {
1536: SCC_WRITE_REG(regs, SCC_CHANNEL_A, SCC_WR0,
1.36 jonathan 1537: ZSWR0_CLR_INTR);
1.1 jonathan 1538: splx(s);
1539: return (c & 0xff);
1540: }
1541: } else
1542: DELAY(10);
1543: }
1544: }
1545:
1546: /*
1547: * Send a char on a port, via a busy wait loop.
1548: */
1549: void
1550: sccPutc(dev, c)
1551: dev_t dev;
1552: int c;
1553: {
1.51 simonb 1554: scc_regmap_t *regs;
1555: int line;
1556: u_char value;
1.1 jonathan 1557: int s;
1558:
1559: #ifdef pmax
1560: s = spltty(); /* XXX why different spls? */
1561: #else
1562: s = splhigh();
1563: #endif
1564: line = SCCLINE(dev);
1.18 jonathan 1565: if (cold && scc_cons_addr) {
1566: regs = scc_cons_addr;
1567: } else {
1.51 simonb 1568: struct scc_softc *sc;
1.18 jonathan 1569: sc = scc_cd.cd_devs[SCCUNIT(dev)];
1570: regs = (scc_regmap_t *)sc->scc_pdma[line].p_addr;
1571: }
1.1 jonathan 1572:
1573: /*
1574: * Wait for transmitter to be not busy.
1575: */
1576: do {
1577: SCC_READ_REG(regs, line, SCC_RR0, value);
1578: if (value & ZSRR0_TX_READY)
1579: break;
1580: DELAY(100);
1581: } while (1);
1582:
1583: /*
1584: * Send the char.
1585: */
1586: SCC_WRITE_DATA(regs, line, c);
1.18 jonathan 1587: tc_mb();
1.1 jonathan 1588: splx(s);
1589:
1590: return;
1591: }
1592:
1593: /*
1594: * Enable/disable polling mode
1595: */
1596: void
1597: sccPollc(dev, on)
1598: dev_t dev;
1599: int on;
1600: {
1601: }
1602:
1603: #ifdef SCC_DEBUG
1604: static void
1605: rr(msg, regs)
1606: char *msg;
1607: scc_regmap_t *regs;
1608: {
1609: u_char value;
1610: int r0, r1, r2, r3, r10, r15;
1611:
1.17 christos 1612: printf("%s: register: %lx\n", msg, regs);
1.1 jonathan 1613: #define L(reg, r) { \
1614: SCC_READ_REG(regs, SCC_CHANNEL_A, reg, value); \
1615: r = value; \
1616: }
1617: L(SCC_RR0, r0);
1618: L(SCC_RR1, r1);
1619: L(ZSRR_IVEC, r2);
1620: L(ZSRR_IPEND, r3);
1621: L(SCC_RR10, r10);
1622: L(SCC_RR15, r15);
1.17 christos 1623: printf("A: 0: %x 1: %x 2(vec): %x 3: %x 10: %x 15: %x\n",
1.1 jonathan 1624: r0, r1, r2, r3, r10, r15);
1625: #undef L
1626: #define L(reg, r) { \
1627: SCC_READ_REG(regs, SCC_CHANNEL_B, reg, value); \
1628: r = value; \
1629: }
1630: L(SCC_RR0, r0);
1631: L(SCC_RR1, r1);
1632: L(ZSRR_IVEC, r2);
1633: L(SCC_RR10, r10);
1634: L(SCC_RR15, r15);
1.17 christos 1635: printf("B: 0: %x 1: %x 2(state): %x 10: %x 15: %x\n",
1.1 jonathan 1636: r0, r1, r2, r10, r15);
1637: }
1.2 jonathan 1638: #endif /* SCC_DEBUG */
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