Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.

===================================================================
RCS file: /ftp/cvs/cvsroot/src/sys/arch/pmax/pmax/cpu.c,v
rcsdiff: /ftp/cvs/cvsroot/src/sys/arch/pmax/pmax/cpu.c,v: warning: Unknown phrases like `commitid ...;' are present.
retrieving revision 1.18.2.3
retrieving revision 1.19
diff -u -p -r1.18.2.3 -r1.19
--- src/sys/arch/pmax/pmax/cpu.c	2002/10/10 18:35:08	1.18.2.3
+++ src/sys/arch/pmax/pmax/cpu.c	2001/08/24 00:22:53	1.19
@@ -1,4 +1,4 @@
-/* $NetBSD: cpu.c,v 1.18.2.3 2002/10/10 18:35:08 jdolecek Exp $ */
+/* $NetBSD: cpu.c,v 1.19 2001/08/24 00:22:53 simonb Exp $ */
 
 /*
  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
@@ -38,8 +38,9 @@
 static int	cpumatch __P((struct device *, struct cfdata *, void *));
 static void	cpuattach __P((struct device *, struct device *, void *));
 
-CFATTACH_DECL(cpu, sizeof (struct device),
-    cpumatch, cpuattach, NULL, NULL);
+struct cfattach cpu_ca = {
+	sizeof (struct device), cpumatch, cpuattach
+};
 extern struct cfdriver cpu_cd;
 
 static int
@@ -62,7 +63,64 @@ cpuattach(parent, dev, aux)
 	struct device *parent, *dev;
 	void *aux;
 {
+	char *cpu_name, *fpu_name;
 
-	printf(": ");
-	cpu_identify();
+	printf("\n");
+	switch (MIPS_PRID_IMPL(cpu_id)) {
+	case MIPS_R2000:
+		cpu_name = "MIPS R2000 CPU";
+		break;
+	case MIPS_R3000:
+		cpu_name = "MIPS R3000 CPU";
+		break;
+	case MIPS_R4000:
+		cpu_name = "MIPS R4000 CPU";
+		break;
+	default:
+		cpu_name = "Unknown CPU";
+	}
+	if (MIPS_PRID_IMPL(cpu_id) == MIPS_R4000
+	    && mips_L1ICacheSize == 16384)
+		cpu_name = "MIPS R4400 CPU";
+
+	switch (MIPS_PRID_IMPL(fpu_id)) {
+	case MIPS_R2360:
+		fpu_name = "MIPS R2360 Floating Point Board";
+		break;
+	case MIPS_R2010:
+		fpu_name = "MIPS R2010 FPA";
+		break;
+	case MIPS_R3010:
+		fpu_name = "MIPS R3010 FPA";
+		break;
+	case MIPS_R4010:
+		fpu_name = "MIPS R4010 FPA";
+		break;
+	default:
+		fpu_name = "unknown FPA";
+		break;
+	}
+	printf("%s: %s (0x%04x) with %s (0x%04x)\n",
+	    dev->dv_xname, cpu_name, cpu_id, fpu_name, fpu_id);
+	if (MIPS_PRID_IMPL(cpu_id) != MIPS_R4000) {
+		printf("%s: ", dev->dv_xname);
+		printf("%dKB Instruction, %dKB Data, direct mapped cache\n",
+		    mips_L1ICacheSize/1024, mips_L1DCacheSize/1024);
+	}
+	else {
+		printf("%s: L1 cache: ", dev->dv_xname);
+		printf("%dKB Instruction, %dKB Data, direct mapped\n",
+		    mips_L1ICacheSize/1024, mips_L1DCacheSize/1024);
+		printf("%s: ", dev->dv_xname);
+		
+#ifdef MIPS3
+		if (!mips_L2CachePresent)
+			printf("no L2 cache\n");
+		else
+			printf("L2 cache: %dKB/%dB %s, %s\n",
+			    mips_L2CacheSize/1024, mips_L2CacheLSize,
+			    mips_L2CacheMixed ? "mixed" : "separated",
+			    mips_L2CacheIsSnooping? "snooping" : "no snooping");
+#endif
+	}
 }