CVS log for src/sys/arch/mips/rmi/rmixl_pcix.c

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Ensure bus_dmatag_subregion is called with an inclusive max_addr
everywhere.

Trailing whitespace

Merge thorpej-cfargs2.

Adapt to CFARGS().

Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
  actually needed.
- Don't be explicit about what interface attribute is attaching if
  the device only has one.  (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
  situations, making is visibly easier to see when indirect config is
  in play, and allowing for future change in semantics.  (As of now,
  this is just a wrapper around config_match(), but that is an
  implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance.  This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

config_found_ia() -> config_found() w/ CFARG_IATTR.

Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.

Overhaul the interface to pci_configure_bus():
- Don't expose how PCI bus configuration resource management is implemented.
  Provide a new resource provider API:

  ==> pciconf_resource_init() -- Initialize a PCI configuration resources
      container.
  ==> pciconf_resource_add() -- Add a PCI configuration resource to the
      container (I/O, MEM, or prefetchable MEM).  Multiple resources of
      each type may be added.
  ==> pciconf_resource_fini() -- Tear down the PCI configurtation resources
      container once the bus has been configured.

  This is much easier to use than the previous method of providing an
  extent map for each kind of resource, and works better for e.g. ACPI
  platforms that provide potentially multiple PCI resources in tables
  provided by firmware.

- Re-implement PCI configuration resource management using vmem arenas,
  rather than extent maps.

Mostly merge changes from HEAD upto 20200411

in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.

update from HEAD

Sync with HEAD (as of 26th Dec)

PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
  if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
  Currently the following extended capabilities are decoded:
   - Advanced Error Reporting
   - Virtual Channel
   - Device Serial Number
   - Power Budgeting
   - Root Complex Link Declaration
   - Root Complex Event Collector Association
   - Access Control Services
   - Alternative Routing-ID Interpretation
   - Address Translation Services
   - Single Root IO Virtualization
   - Page Request
   - TPH Requester
   - Latency Tolerance Reporting
   - Secondary PCI Express
   - Process Address Space ID
   - LN Requester
   - L1 PM Substates
  The following extended capabilities are not decoded yet:
   - Root Complex Internal Link Control
   - Multi-Function Virtual Channel
   - RCRB Header
   - Vendor Unique
   - Configuration Access Correction
   - Multiple Root IO Virtualization
   - Multicast
   - Resizable BAR
   - Dynamic Power Allocation
   - Protocol Multiplexing
   - Downstream Port Containment
   - Precision Time Management
   - M-PCIe
   - Function Reading Status Queueing
   - Readiness Time Reporting
   - Designated Vendor-Specific

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Adjust to pci_intr_string signature

avoid set but unused variables.
move variables under their usage #ifdef.

Resync to 2012-11-19 00:00:00 UTC

sync with head

split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.

We use avail_clusters_cnt now.

Rework Fast Messaging Network support (it's now lockless).
Workaround a problem with bus 0 BAR sizing causing the registers behind
the BAR to become inaccessible.
Move much/most of the startup code from evbmips/rmixl/machdep to
mips/rmi/rmixl_machdep.c
Move the code to find the XLP variant to the early boot so it can be used
early.
8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access
of pci mem to 32bits.

Switch to using IST_<foo> instead of private enums.

Add XLP support (i2c, console, pci, sdhc works).

Fix machine/ includes

#include <sys/bus.h> instead of <machine/bus.h>.

Sync with HEAD.

sync with head

PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name.  Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

Use M_ZERO with malloc instead of doing a explicit memset

Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code.  (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.

sync with head

- in rmixl_pcix_intr_string() convert irq to vector when calling
rmixl_intr_string()
- in rmixl_pcix_intr_establish(), initialize dispatch data 'counts' pointer
- in rmixl_pcix_pip_add_1(), zero out pip_new after allocated.

initialize mutex in attach

initialize mutex in attach

Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args.  Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
    pci_intr_map() was a leftover from Xen 2.  Probably a bug.  I
    stopped writing it.  I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
    Probably a bug.  I use a temporary variable.  I have not tested this
    change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
    Probably a bug.  Use a local pci_attach_args.  I have not tested
    this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
    caller's pci_attach_args.  Probably a bug.  Make a local copy of the
    caller's pci_attach_args and modify the copy.  I have not tested
    this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
	HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
	KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
	TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
	OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'

sync with head

Sync with HEAD

file rmixl_pcix.c was added on branch rmind-uvmplock on 2011-03-05 20:51:11 +0000

Merge forward from matt-nb5-mips64.

- provide lockless interrupt dispatch by eliminating use of LIST(9)
for interrupt handles.  Handles are now managed in variable size arrays.
Establishing a new interrupt causes allocation of a new array, pointer
to which is changed atomically.  Old arrays are allowed to persist for
some time before free, allowing any CPU working with that data
to safely finish using it.
- interrupt events are now managed per-CPU, avoid need for atomic adds.

Fix non-DEBUG/DIAGNOSTIC builds of RMI mips64.

- in rmixl_pcix_attach() use bus_dmatag_subregion() to set up
bounce buffering for non-DMA-accessible RAM addrs

- in attach, if Host BAR does not cover all RAM, instead of panic,
complain a lot, and force use of DMA bounce buffers

- specifiy if mpsafe when establishing interrupts
(all are 'false' except comintr for now)

- add bit defines for HOST_MODE_CTL reg
- panic if Host BAR regs do not cover RAM addrs 0..mem_cluster_maxaddr

- add driver for RMI XLR PCI-X interface

file rmixl_pcix.c was initially added on branch matt-nb5-mips64.