version 1.1.6.2, 2011/04/21 01:41:13 |
version 1.1.6.3, 2011/05/31 03:04:11 |
Line 43 __KERNEL_RCSID(0, "$NetBSD$"); |
|
Line 43 __KERNEL_RCSID(0, "$NetBSD$"); |
|
#include "opt_multiprocessor.h" |
#include "opt_multiprocessor.h" |
#include "opt_ddb.h" |
#include "opt_ddb.h" |
|
|
#include "opt_multiprocessor.h" |
|
|
|
#include <sys/param.h> |
#include <sys/param.h> |
#include <sys/device.h> |
#include <sys/device.h> |
#include <sys/systm.h> |
#include <sys/systm.h> |
Line 100 static struct rmixl_cpu_trampoline_args |
|
Line 98 static struct rmixl_cpu_trampoline_args |
|
#endif |
#endif |
|
|
/* |
/* |
* cpu_rmixl_db_watch_init - initialize COP0 watchpoint stuff |
* cpu_rmixl_watchpoint_init - initialize COP0 watchpoint stuff |
* |
* |
* clear IEU_DEFEATURE[DBE] to ensure T_WATCH on watchpoint exception |
* clear IEU_DEFEATURE[DBE] to ensure T_WATCH on watchpoint exception |
* set COP0 watchhi and watchlo |
* set COP0 watchhi and watchlo |
Line 108 static struct rmixl_cpu_trampoline_args |
|
Line 106 static struct rmixl_cpu_trampoline_args |
|
* disable all watchpoints |
* disable all watchpoints |
*/ |
*/ |
static void |
static void |
cpu_rmixl_db_watch_init(void) |
cpu_rmixl_watchpoint_init(void) |
{ |
{ |
uint32_t r; |
uint32_t r; |
|
|
Line 195 cpu_rmixl_attach(device_t parent, device |
|
Line 193 cpu_rmixl_attach(device_t parent, device |
|
mips_locoresw.lsw_cpu_init = cpu_rmixl_hatch; |
mips_locoresw.lsw_cpu_init = cpu_rmixl_hatch; |
mips_locoresw.lsw_cpu_run = cpu_rmixl_run; |
mips_locoresw.lsw_cpu_run = cpu_rmixl_run; |
} else { |
} else { |
struct cpucore_attach_args *ca = aux; |
struct cpucore_attach_args * const ca = aux; |
struct cpucore_softc * const ccsc = device_private(parent); |
struct cpucore_softc * const ccsc = device_private(parent); |
rmixlfw_psb_type_t psb_type = rmixl_configuration.rc_psb_type; |
rmixlfw_psb_type_t psb_type = rmixl_configuration.rc_psb_type; |
cpuid_t cpuid; |
cpuid_t cpuid; |
Line 263 cpu_rmixl_attach_primary(struct rmixl_cp |
|
Line 261 cpu_rmixl_attach_primary(struct rmixl_cp |
|
asm volatile("dmfc0 %0, $15, 1;" : "=r"(ebase)); |
asm volatile("dmfc0 %0, $15, 1;" : "=r"(ebase)); |
ci->ci_cpuid = ebase & __BITS(9,0); |
ci->ci_cpuid = ebase & __BITS(9,0); |
|
|
cpu_rmixl_db_watch_init(); |
cpu_rmixl_watchpoint_init(); |
|
|
rmixl_fmn_init(); |
rmixl_fmn_init(); |
|
|
Line 280 cpu_rmixl_attach_primary(struct rmixl_cp |
|
Line 278 cpu_rmixl_attach_primary(struct rmixl_cp |
|
__func__); |
__func__); |
sc->sc_ih_fmn = ih; |
sc->sc_ih_fmn = ih; |
#endif |
#endif |
|
|
} |
} |
|
|
#ifdef NOTYET |
#ifdef NOTYET |
Line 336 cpu_rmixl_hatch(struct cpu_info *ci) |
|
Line 333 cpu_rmixl_hatch(struct cpu_info *ci) |
|
|
|
cpucore_rmixl_hatch(device_parent(sc->sc_dev)); |
cpucore_rmixl_hatch(device_parent(sc->sc_dev)); |
|
|
cpu_rmixl_db_watch_init(); |
cpu_rmixl_watchpoint_init(); |
} |
} |
|
|
static int |
static int |