CVS log for src/sys/arch/mips/mips/locore_mips3.S
Up to [cvs.NetBSD.org] / src / sys / arch / mips / mips
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Keyword substitution: kv
Default branch: MAIN
Revision 1.113.8.1: download - view: text, markup, annotated - select for diffs
Mon Jul 31 13:56:15 2023 UTC (18 months, 1 week ago) by martin
Branches: netbsd-8
CVS tags: netbsd-8-3-RELEASE
Diff to: previous 1.113: preferred, colored; next MAIN 1.114: preferred, colored
Changes since revision 1.113: +7 -2
lines
Pull up following revision(s) (requested by riastradh in ticket #1859):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
(applied also to sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/a9_mpsubr.S,
sys/arch/arm/cortex/cortex_init.S)
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/alpha/include/asm.h: revision 1.45
(applied to sys/arch/alpha/alpha/multiproc.s)
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
Revision 1.114.8.1: download - view: text, markup, annotated - select for diffs
Mon Jul 31 13:44:16 2023 UTC (18 months, 1 week ago) by martin
Branches: netbsd-9
CVS tags: netbsd-9-4-RELEASE
Diff to: previous 1.114: preferred, colored; next MAIN 1.115: preferred, colored
Changes since revision 1.114: +7 -2
lines
Pull up following revision(s) (requested by riastradh in ticket #1676):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
sys/arch/alpha/include/asm.h: revision 1.45
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
(all via patch)
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
Revision 1.115.20.1: download - view: text, markup, annotated - select for diffs
Mon Jul 31 13:36:31 2023 UTC (18 months, 1 week ago) by martin
Branches: netbsd-10
CVS tags: netbsd-10-1-RELEASE,
netbsd-10-0-RELEASE,
netbsd-10-0-RC6,
netbsd-10-0-RC5,
netbsd-10-0-RC4,
netbsd-10-0-RC3,
netbsd-10-0-RC2,
netbsd-10-0-RC1
Diff to: previous 1.115: preferred, colored; next MAIN 1.116: preferred, colored
Changes since revision 1.115: +7 -2
lines
Pull up following revision(s) (requested by riastradh in ticket #264):
sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
sys/arch/aarch64/aarch64/locore.S: revision 1.91
sys/arch/mips/include/asm.h: revision 1.74
sys/arch/hppa/include/cpu.h: revision 1.13
sys/arch/arm/arm/armv6_start.S: revision 1.38
sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
sys/arch/mips/mips/locore.S: revision 1.229
sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
sys/arch/alpha/include/asm.h: revision 1.45
sys/arch/sparc64/sparc64/locore.s: revision 1.432
sys/arch/vax/vax/subr.S: revision 1.42
sys/arch/mips/mips/locore_mips3.S: revision 1.116
sys/arch/riscv/riscv/cpu_switch.S: revision 1.3
sys/arch/ia64/ia64/machdep.c: revision 1.44
sys/arch/arm/arm32/cpuswitch.S: revision 1.106
sys/arch/sparc/sparc/locore.s: revision 1.284
aarch64: Add missing barriers in cpu_switchto.
Details in comments.
Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.
PR kern/57240
alpha: Add missing barriers in cpu_switchto.
Details in comments.
arm32: Add missing barriers in cpu_switchto.
Details in comments.
hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?
ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)
mips: Add missing barriers in cpu_switchto.
Details in comments.
powerpc: Add missing barriers in cpu_switchto.
Details in comments.
riscv: Add missing barriers in cpu_switchto.
Details in comments.
sparc: Add missing barriers in cpu_switchto.
sparc64: Add missing barriers in cpu_switchto.
Details in comments.
vax: Note where cpu_switchto needs barriers.
Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.
Revision 1.116: download - view: text, markup, annotated - select for diffs
Thu Feb 23 14:56:00 2023 UTC (23 months, 2 weeks ago) by riastradh
Branches: MAIN
CVS tags: thorpej-ifq-base,
thorpej-ifq,
thorpej-altq-separation-base,
thorpej-altq-separation,
perseant-exfatfs-base-20240630,
perseant-exfatfs-base,
perseant-exfatfs,
HEAD
Diff to: previous 1.115: preferred, colored
Changes since revision 1.115: +7 -2
lines
mips: Add missing barriers in cpu_switchto.
Details in comments.
PR kern/57240
XXX pullup-8
XXX pullup-9
XXX pullup-10
Revision 1.115: download - view: text, markup, annotated - select for diffs
Sun May 24 07:15:24 2020 UTC (4 years, 8 months ago) by simonb
Branches: MAIN
CVS tags: thorpej-i2c-spi-conf2-base,
thorpej-i2c-spi-conf2,
thorpej-i2c-spi-conf-base,
thorpej-i2c-spi-conf,
thorpej-futex2-base,
thorpej-futex2,
thorpej-futex-base,
thorpej-futex,
thorpej-cfargs2-base,
thorpej-cfargs2,
thorpej-cfargs-base,
thorpej-cfargs,
netbsd-10-base,
cjep_sun2x-base1,
cjep_sun2x-base,
cjep_sun2x,
cjep_staticlib_x-base1,
cjep_staticlib_x-base,
cjep_staticlib_x,
bouyer-sunxi-drm-base,
bouyer-sunxi-drm
Branch point for: netbsd-10
Diff to: previous 1.114: preferred, colored
Changes since revision 1.114: +18 -2
lines
Add mipsNN_cp0_rdhwr_cpunum() which returns the current CPU number
read from the CPUNum hardware register on MIPS{32,64}R2.
Revision 1.114: download - view: text, markup, annotated - select for diffs
Fri Jan 26 05:29:43 2018 UTC (7 years ago) by maya
Branches: MAIN
CVS tags: phil-wifi-base,
phil-wifi-20200421,
phil-wifi-20200411,
phil-wifi-20200406,
phil-wifi-20191119,
phil-wifi-20190609,
phil-wifi,
pgoyette-compat-merge-20190127,
pgoyette-compat-base,
pgoyette-compat-20190127,
pgoyette-compat-20190118,
pgoyette-compat-1226,
pgoyette-compat-1126,
pgoyette-compat-1020,
pgoyette-compat-0930,
pgoyette-compat-0906,
pgoyette-compat-0728,
pgoyette-compat-0625,
pgoyette-compat-0521,
pgoyette-compat-0502,
pgoyette-compat-0422,
pgoyette-compat-0415,
pgoyette-compat-0407,
pgoyette-compat-0330,
pgoyette-compat-0322,
pgoyette-compat-0315,
pgoyette-compat,
netbsd-9-base,
netbsd-9-3-RELEASE,
netbsd-9-2-RELEASE,
netbsd-9-1-RELEASE,
netbsd-9-0-RELEASE,
netbsd-9-0-RC2,
netbsd-9-0-RC1,
isaki-audio2-base,
isaki-audio2,
is-mlppp-base,
is-mlppp,
bouyer-xenpvh-base2,
bouyer-xenpvh-base1,
bouyer-xenpvh-base,
bouyer-xenpvh,
ad-namecache-base3,
ad-namecache-base2,
ad-namecache-base1,
ad-namecache-base,
ad-namecache
Branch point for: netbsd-9
Diff to: previous 1.113: preferred, colored
Changes since revision 1.113: +2 -5
lines
Don't warn about MIPS1 MULTIPROCESSOR in a mips3 file.
Revision 1.102.12.1: download - view: text, markup, annotated - select for diffs
Sun Dec 3 11:36:28 2017 UTC (7 years, 2 months ago) by jdolecek
Branches: tls-maxphys
Diff to: previous 1.102: preferred, colored; next MAIN 1.103: preferred, colored
Changes since revision 1.102: +139 -36
lines
update from HEAD
Revision 1.102.30.3: download - view: text, markup, annotated - select for diffs
Wed Oct 5 20:55:32 2016 UTC (8 years, 4 months ago) by skrll
Branches: nick-nhusb
Diff to: previous 1.102.30.2: preferred, colored; branchpoint 1.102: preferred, colored; next MAIN 1.103: preferred, colored
Changes since revision 1.102.30.2: +67 -26
lines
Sync with HEAD
Revision 1.112.2.1: download - view: text, markup, annotated - select for diffs
Sat Aug 6 00:19:06 2016 UTC (8 years, 6 months ago) by pgoyette
Branches: pgoyette-localcount
Diff to: previous 1.112: preferred, colored; next MAIN 1.113: preferred, colored
Changes since revision 1.112: +3 -1
lines
Sync with HEAD
Revision 1.113: download - view: text, markup, annotated - select for diffs
Wed Jul 27 09:32:35 2016 UTC (8 years, 6 months ago) by skrll
Branches: MAIN
CVS tags: tls-maxphys-base-20171202,
prg-localcount2-base3,
prg-localcount2-base2,
prg-localcount2-base1,
prg-localcount2-base,
prg-localcount2,
pgoyette-localcount-20170426,
pgoyette-localcount-20170320,
pgoyette-localcount-20170107,
pgoyette-localcount-20161104,
pgoyette-localcount-20160806,
perseant-stdc-iso10646-base,
perseant-stdc-iso10646,
nick-nhusb-base-20170825,
nick-nhusb-base-20170204,
nick-nhusb-base-20161204,
nick-nhusb-base-20161004,
netbsd-8-base,
netbsd-8-2-RELEASE,
netbsd-8-1-RELEASE,
netbsd-8-1-RC1,
netbsd-8-0-RELEASE,
netbsd-8-0-RC2,
netbsd-8-0-RC1,
matt-nb8-mediatek-base,
matt-nb8-mediatek,
localcount-20160914,
jdolecek-ncq-base,
jdolecek-ncq,
bouyer-socketcan-base1,
bouyer-socketcan-base,
bouyer-socketcan
Branch point for: netbsd-8
Diff to: previous 1.112: preferred, colored
Changes since revision 1.112: +3 -1
lines
Sprinle RCSID
Revision 1.112: download - view: text, markup, annotated - select for diffs
Mon Jul 11 16:15:36 2016 UTC (8 years, 7 months ago) by matt
Branches: MAIN
CVS tags: pgoyette-localcount-base,
pgoyette-localcount-20160726
Branch point for: pgoyette-localcount
Diff to: previous 1.111: preferred, colored
Changes since revision 1.111: +65 -26
lines
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
Revision 1.102.30.2: download - view: text, markup, annotated - select for diffs
Tue Sep 22 12:05:47 2015 UTC (9 years, 4 months ago) by skrll
Branches: nick-nhusb
Diff to: previous 1.102.30.1: preferred, colored; branchpoint 1.102: preferred, colored
Changes since revision 1.102.30.1: +30 -8
lines
Sync with HEAD
Revision 1.111: download - view: text, markup, annotated - select for diffs
Tue Jun 30 13:30:50 2015 UTC (9 years, 7 months ago) by skrll
Branches: MAIN
CVS tags: nick-nhusb-base-20160907,
nick-nhusb-base-20160529,
nick-nhusb-base-20160422,
nick-nhusb-base-20160319,
nick-nhusb-base-20151226,
nick-nhusb-base-20150921
Diff to: previous 1.110: preferred, colored
Changes since revision 1.110: +2 -2
lines
Fix logic inversion in 1.107
Revision 1.110: download - view: text, markup, annotated - select for diffs
Tue Jun 16 18:12:18 2015 UTC (9 years, 7 months ago) by macallan
Branches: MAIN
Diff to: previous 1.109: preferred, colored
Changes since revision 1.109: +2 -2
lines
.set mips3 for __mips_o32
now o32 kernels boot again on my O2
Revision 1.109: download - view: text, markup, annotated - select for diffs
Thu Jun 11 07:30:10 2015 UTC (9 years, 8 months ago) by matt
Branches: MAIN
Diff to: previous 1.108: preferred, colored
Changes since revision 1.108: +1 -2
lines
Don't include <machine/param.h> in .S files, get the needed values from assym.h
Define NBPG as UL to avoid integer over with NBXSEG on LP64 systems.
(.S files don't like numbers with UL appended to them).
Revision 1.108: download - view: text, markup, annotated - select for diffs
Sun Jun 7 08:03:10 2015 UTC (9 years, 8 months ago) by matt
Branches: MAIN
Diff to: previous 1.107: preferred, colored
Changes since revision 1.107: +6 -6
lines
Define COP0 register that use select value in <mips/cpuregs.h>
Use those new definitions
Revision 1.107: download - view: text, markup, annotated - select for diffs
Sat Jun 6 21:45:40 2015 UTC (9 years, 8 months ago) by matt
Branches: MAIN
Diff to: previous 1.106: preferred, colored
Changes since revision 1.106: +24 -1
lines
On mipsNN use trap instructions when inconsistent status register settings
are found.
Revision 1.102.30.1: download - view: text, markup, annotated - select for diffs
Sat Jun 6 14:40:02 2015 UTC (9 years, 8 months ago) by skrll
Branches: nick-nhusb
Diff to: previous 1.102: preferred, colored
Changes since revision 1.102: +48 -8
lines
Sync with HEAD
Revision 1.106: download - view: text, markup, annotated - select for diffs
Thu Jun 4 22:44:43 2015 UTC (9 years, 8 months ago) by matt
Branches: MAIN
CVS tags: nick-nhusb-base-20150606
Diff to: previous 1.105: preferred, colored
Changes since revision 1.105: +6 -4
lines
Don't compile the mips64 stuff if we being compiled as mips32
Revision 1.105: download - view: text, markup, annotated - select for diffs
Thu Jun 4 05:58:17 2015 UTC (9 years, 8 months ago) by matt
Branches: MAIN
Diff to: previous 1.104: preferred, colored
Changes since revision 1.104: +7 -1
lines
Don't .set mips3 if we are >= mips3 already
Use dins if we have it rather than two shifts.
Revision 1.104: download - view: text, markup, annotated - select for diffs
Tue Jun 2 05:09:15 2015 UTC (9 years, 8 months ago) by matt
Branches: MAIN
Diff to: previous 1.103: preferred, colored
Changes since revision 1.103: +10 -3
lines
In cpu_trampoline, load the ksp from the idlelwp after we enable KX.
Revision 1.103: download - view: text, markup, annotated - select for diffs
Mon Jun 1 22:55:13 2015 UTC (9 years, 8 months ago) by matt
Branches: MAIN
Diff to: previous 1.102: preferred, colored
Changes since revision 1.102: +30 -5
lines
Rework cavium support in preparation for MULTIPROCESSOR support
Revision 1.93.38.16: download - view: text, markup, annotated - select for diffs
Fri Feb 10 00:02:55 2012 UTC (13 years ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.15: preferred, colored; branchpoint 1.93: preferred, colored; next MAIN 1.94: preferred, colored
Changes since revision 1.93.38.15: +1 -1
lines
Fix comment.
Revision 1.93.38.15: download - view: text, markup, annotated - select for diffs
Thu Jan 19 08:28:49 2012 UTC (13 years ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.14: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.14: +2 -0
lines
When running an N32 kernel, run it with 64-bit addresses even though the
kernel itself will only use 32-bit addresses. There are exceptions.
bus_space_handles are now register_t instead of intptr_t. This allows them
to contain XKPHYS addresses. Now bus_space can use XKPHYS addresses and
not required non-KSEG1 devices to be mapped in KSEG2 thereby leaving more
KSEG2 space for the kernel to use.
The cache range routines (but not index routines) now take a register_t
instead of vaddr_t so they can too take a XKPHYS address. This allows the
pmap to use a page's XKPHYS address to clean sync the icache thereby avoiding
massive icache invalidations.
Since "cache" instruction effects are global to all CPUs and their caches, we
can use the above to greatly simplify MP page isyncs. If using an O32 kernel
with pages outside KSEG0, index ops still need to be performed since there
isn't an a quick way of mapping the page.
Revision 1.93.38.14: download - view: text, markup, annotated - select for diffs
Fri Dec 23 22:51:29 2011 UTC (13 years, 1 month ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.13: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.13: +151 -11
lines
Add mips3_cp0_random_read.
Add mipsNN_cp0_config{1-7}_{read,write}.
Revision 1.102: download - view: text, markup, annotated - select for diffs
Tue Aug 16 06:55:11 2011 UTC (13 years, 6 months ago) by matt
Branches: MAIN
CVS tags: yamt-pagecache-tag8,
yamt-pagecache-base9,
yamt-pagecache-base8,
yamt-pagecache-base7,
yamt-pagecache-base6,
yamt-pagecache-base5,
yamt-pagecache-base4,
yamt-pagecache-base3,
yamt-pagecache-base2,
yamt-pagecache-base,
yamt-pagecache,
tls-maxphys-base,
tls-earlyentropy-base,
tls-earlyentropy,
rmind-smpnet-nbase,
rmind-smpnet-base,
rmind-smpnet,
riastradh-xf86-video-intel-2-7-1-pre-2-21-15,
riastradh-drm2-base3,
riastradh-drm2-base2,
riastradh-drm2-base1,
riastradh-drm2-base,
riastradh-drm2,
nick-nhusb-base-20150406,
nick-nhusb-base,
netbsd-7-nhusb-base-20170116,
netbsd-7-nhusb-base,
netbsd-7-nhusb,
netbsd-7-base,
netbsd-7-2-RELEASE,
netbsd-7-1-RELEASE,
netbsd-7-1-RC2,
netbsd-7-1-RC1,
netbsd-7-1-2-RELEASE,
netbsd-7-1-1-RELEASE,
netbsd-7-1,
netbsd-7-0-RELEASE,
netbsd-7-0-RC3,
netbsd-7-0-RC2,
netbsd-7-0-RC1,
netbsd-7-0-2-RELEASE,
netbsd-7-0-1-RELEASE,
netbsd-7-0,
netbsd-7,
netbsd-6-base,
netbsd-6-1-RELEASE,
netbsd-6-1-RC4,
netbsd-6-1-RC3,
netbsd-6-1-RC2,
netbsd-6-1-RC1,
netbsd-6-1-5-RELEASE,
netbsd-6-1-4-RELEASE,
netbsd-6-1-3-RELEASE,
netbsd-6-1-2-RELEASE,
netbsd-6-1-1-RELEASE,
netbsd-6-1,
netbsd-6-0-RELEASE,
netbsd-6-0-RC2,
netbsd-6-0-RC1,
netbsd-6-0-6-RELEASE,
netbsd-6-0-5-RELEASE,
netbsd-6-0-4-RELEASE,
netbsd-6-0-3-RELEASE,
netbsd-6-0-2-RELEASE,
netbsd-6-0-1-RELEASE,
netbsd-6-0,
netbsd-6,
matt-nb6-plus-nbase,
matt-nb6-plus-base,
matt-nb6-plus,
khorben-n900,
jmcneill-usbmp-pre-base2,
jmcneill-usbmp-base9,
jmcneill-usbmp-base8,
jmcneill-usbmp-base7,
jmcneill-usbmp-base6,
jmcneill-usbmp-base5,
jmcneill-usbmp-base4,
jmcneill-usbmp-base3,
jmcneill-usbmp-base2,
jmcneill-usbmp-base10,
jmcneill-usbmp-base,
jmcneill-usbmp,
jmcneill-audiomp3-base,
jmcneill-audiomp3,
agc-symver-base,
agc-symver
Branch point for: tls-maxphys,
nick-nhusb
Diff to: previous 1.101: preferred, colored
Changes since revision 1.101: +16 -16
lines
Only jump through t9/ra (or k0) to help avoid hitting
the Loongson2 jump problem.
Revision 1.101: download - view: text, markup, annotated - select for diffs
Sun Jul 31 15:39:29 2011 UTC (13 years, 6 months ago) by matt
Branches: MAIN
Diff to: previous 1.100: preferred, colored
Changes since revision 1.100: +2 -1
lines
Add support for a loongson2_subr.S. This is needed since that chip needs
special handling to manually flush the ITLB on TLB updates.
Revision 1.100: download - view: text, markup, annotated - select for diffs
Sun Jul 10 23:21:59 2011 UTC (13 years, 7 months ago) by matt
Branches: MAIN
Diff to: previous 1.99: preferred, colored
Changes since revision 1.99: +2 -2
lines
More <machine/ include cleanup
Revision 1.96.6.1: download - view: text, markup, annotated - select for diffs
Mon Jun 6 09:06:06 2011 UTC (13 years, 8 months ago) by jruoho
Branches: jruoho-x86intr
Diff to: previous 1.96: preferred, colored; next MAIN 1.97: preferred, colored
Changes since revision 1.96: +344 -90
lines
Sync with HEAD.
Revision 1.93.38.13: download - view: text, markup, annotated - select for diffs
Thu May 26 19:21:56 2011 UTC (13 years, 8 months ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.12: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.12: +7 -5
lines
Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
Revision 1.93.38.12: download - view: text, markup, annotated - select for diffs
Fri Apr 29 08:26:26 2011 UTC (13 years, 9 months ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.11: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.11: +196 -104
lines
Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
Revision 1.96.4.2: download - view: text, markup, annotated - select for diffs
Thu Apr 21 01:41:12 2011 UTC (13 years, 9 months ago) by rmind
Branches: rmind-uvmplock
Diff to: previous 1.96.4.1: preferred, colored; branchpoint 1.96: preferred, colored; next MAIN 1.97: preferred, colored
Changes since revision 1.96.4.1: +187 -93
lines
sync with head
Revision 1.99: download - view: text, markup, annotated - select for diffs
Tue Apr 12 22:50:33 2011 UTC (13 years, 10 months ago) by matt
Branches: MAIN
CVS tags: rmind-uvmplock-nbase,
rmind-uvmplock-base,
jym-xensuspend-nbase,
jym-xensuspend-base,
cherry-xenmp-base,
cherry-xenmp
Diff to: previous 1.98: preferred, colored
Changes since revision 1.98: +135 -11
lines
Add mipsNN_cp0_watch{lo,hi}_{read,write}
Revision 1.98: download - view: text, markup, annotated - select for diffs
Tue Mar 15 07:39:22 2011 UTC (13 years, 11 months ago) by matt
Branches: MAIN
Diff to: previous 1.97: preferred, colored
Changes since revision 1.97: +64 -94
lines
Add separate support for MIPS32R2 and MIPS64R2.
Use EHB/SSNOP and jr.hb ra as appropriate (COP0_SYNC now uses them).
Add support for COP_0_HWRENA and COP_0_USERLOCAL (use by rdhwr $3,$29
instruction for TLS support).
Add mips3+ reserved instruction handler to emulate rdhwr is many fewer
instructions.
Revision 1.96.4.1: download - view: text, markup, annotated - select for diffs
Sat Mar 5 20:51:07 2011 UTC (13 years, 11 months ago) by rmind
Branches: rmind-uvmplock
Diff to: previous 1.96: preferred, colored
Changes since revision 1.96: +174 -14
lines
sync with head
Revision 1.96.8.1: download - view: text, markup, annotated - select for diffs
Sat Mar 5 15:09:49 2011 UTC (13 years, 11 months ago) by bouyer
Branches: bouyer-quota2
Diff to: previous 1.96: preferred, colored; next MAIN 1.97: preferred, colored
Changes since revision 1.96: +174 -14
lines
Sync with HEAD
Revision 1.97: download - view: text, markup, annotated - select for diffs
Sun Feb 20 07:45:48 2011 UTC (13 years, 11 months ago) by matt
Branches: MAIN
CVS tags: bouyer-quota2-nbase
Diff to: previous 1.96: preferred, colored
Changes since revision 1.96: +174 -14
lines
Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU
Revision 1.93.38.11: download - view: text, markup, annotated - select for diffs
Wed Aug 18 06:35:01 2010 UTC (14 years, 5 months ago) by matt
Branches: matt-nb5-mips64
CVS tags: matt-nb5-mips64-premerge-20101231,
matt-nb5-mips64-k15
Diff to: previous 1.93.38.10: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.10: +2 -2
lines
Set SR UX when we first set KX. (XLS416 now boot multiuser again with
>32 bit VAs).
Revision 1.93.38.10: download - view: text, markup, annotated - select for diffs
Mon Aug 16 17:57:10 2010 UTC (14 years, 6 months ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.9: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.9: +3 -2
lines
Improve panic message in mips_wait_idle.
Revision 1.93.38.9: download - view: text, markup, annotated - select for diffs
Fri May 14 22:26:00 2010 UTC (14 years, 9 months ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.8: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.8: +22 -3
lines
Make badaddr64 work on O32. Add a few syncs to force errors.
Revision 1.93.20.1: download - view: text, markup, annotated - select for diffs
Thu Mar 11 15:02:40 2010 UTC (14 years, 11 months ago) by yamt
Branches: yamt-nfs-mp
Diff to: previous 1.93: preferred, colored; next MAIN 1.94: preferred, colored
Changes since revision 1.93: +51 -51
lines
sync with head
Revision 1.93.38.8: download - view: text, markup, annotated - select for diffs
Mon Mar 1 19:29:41 2010 UTC (14 years, 11 months ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.7: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.7: +50 -1
lines
Add secondary processor spinup support (cpu_trampoline is in locore_mips3.S).
Nuke lse_boot_secondary_processors (not needed).
Move cpu_info_store to cpu_subr.C
Revision 1.93.38.7: download - view: text, markup, annotated - select for diffs
Thu Feb 25 05:45:12 2010 UTC (14 years, 11 months ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.6: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.6: +89 -1
lines
Add mipsXX_tlb_record_asids - records what ASIDs have valid TLB entries in
the TLB.
Move some mips3 specific routines from locore.S to locore_mips3.S
Revision 1.93.38.6: download - view: text, markup, annotated - select for diffs
Mon Feb 22 20:13:22 2010 UTC (14 years, 11 months ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.5: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.5: +2 -1
lines
Add a weak alias of cpu_counter32 to mips3_cp0_count_read. This allows
<mips/cpu_counter.h> to avoid including <mips/locore.h>.
Revision 1.93.38.5: download - view: text, markup, annotated - select for diffs
Mon Feb 15 07:36:03 2010 UTC (15 years ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.4: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.4: +5 -4
lines
Completely redo how interrupts and SPL are handled in NetBSD/mips.
[XXX locore_mips1.S still needs to adapted.]
Nested interrupts now work. Except for MIPS_SOFT_MASK and MIPS_SR_INT_IE,
how interrupts work is completely abstracted. spl is handled through the
mips_splsw table. Direct manipulation of the status register is no longer
done (except for MIPS_SR_INT_IE). A new <mips/intr.h> contains the common
IPL/IST/spl* definitions for all ports.
Interrupt delivery is completely different. Clock interrupts may interrupt
device interrupts. ci_idepth is now handled by the caller of cpu_intr as
are softints (both can be optimized/simplified in the case of interrupts of
usermode code). cpu_intr has new arguments and now get called at IPL_HIGH
with MIPS_SR_INT_IE set and its logic is:
void
cpu_intr(int ppl, vaddr_t pc, uint32_t status)
{
int ipl;
uint32_t pending;
while (ppl < (ipl = splintr(&pending))) {
splx(ipl); /* enable interrupts */
<handle pending interrupts>
(void)splhigh(); /* disable interrupts */
}
}
mipsX_subr.S has been reworked. All user handlers (user_intr, systemcall,
user_gen_exception) now use common return to usermode code in lwp_trampoline.
ast() has changed to void ast(void) since the previous pc argument was never
used.
The playstation IPL_ICU_MASK support has been nuked.
MIPS_DYNAMIC_STATUS_MASK may soon be nuked soon.
A bunch of debugging code was left conditionalized by PARANOIA. If this
code detects a bug, it will enter an infinite loop. It is expected that
the kernel will be debugged in a simulator or with a hardware debugger so
that the state at that point can be analyzed.
Revision 1.93.38.4: download - view: text, markup, annotated - select for diffs
Sat Feb 6 14:41:09 2010 UTC (15 years ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.3: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.3: +6 -3
lines
wait idle also needs to see if at least one interrupt is unmasked.
Revision 1.96: download - view: text, markup, annotated - select for diffs
Mon Dec 14 00:46:06 2009 UTC (15 years, 2 months ago) by matt
Branches: MAIN
CVS tags: yamt-nfs-mp-base9,
yamt-nfs-mp-base11,
yamt-nfs-mp-base10,
uebayasi-xip-base7,
uebayasi-xip-base6,
uebayasi-xip-base5,
uebayasi-xip-base4,
uebayasi-xip-base3,
uebayasi-xip-base2,
uebayasi-xip-base1,
uebayasi-xip-base,
uebayasi-xip,
matt-mips64-premerge-20101231,
jruoho-x86intr-base,
bouyer-quota2-base
Branch point for: rmind-uvmplock,
jruoho-x86intr,
bouyer-quota2
Diff to: previous 1.95: preferred, colored
Changes since revision 1.95: +51 -51
lines
Merge from matt-nb5-mips64
Merge mips-specific arch files.
Revision 1.95: download - view: text, markup, annotated - select for diffs
Thu Dec 10 05:10:02 2009 UTC (15 years, 2 months ago) by rmind
Branches: MAIN
CVS tags: matt-premerge-20091211
Diff to: previous 1.94: preferred, colored
Changes since revision 1.94: +2 -2
lines
Rename L_ADDR to L_PCB and amend some comments accordingly.
Revision 1.94: download - view: text, markup, annotated - select for diffs
Fri Nov 27 03:23:11 2009 UTC (15 years, 2 months ago) by rmind
Branches: MAIN
Diff to: previous 1.93: preferred, colored
Changes since revision 1.93: +4 -4
lines
- Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places. Reduce sys/user.h inclusions.
Revision 1.93.38.3: download - view: text, markup, annotated - select for diffs
Fri Aug 21 17:50:35 2009 UTC (15 years, 5 months ago) by matt
Branches: matt-nb5-mips64
CVS tags: matt-nb5-mips64-u2-k2-k4-k7-k8-k9,
matt-nb5-mips64-u1-k1-k5,
matt-nb5-mips64-premerge-20091211,
matt-nb4-mips64-k7-u2a-k9b
Diff to: previous 1.93.38.2: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.2: +8 -2
lines
Make ABI agnostic. Move locoresw to .rdata
Revision 1.93.38.2: download - view: text, markup, annotated - select for diffs
Thu Aug 20 22:21:55 2009 UTC (15 years, 5 months ago) by matt
Branches: matt-nb5-mips64
Diff to: previous 1.93.38.1: preferred, colored; branchpoint 1.93: preferred, colored
Changes since revision 1.93.38.1: +33 -44
lines
Make ABI agnostic. (O32 produces identical code).
Revision 1.93.38.1: download - view: text, markup, annotated - select for diffs
Thu Aug 20 04:43:34 2009 UTC (15 years, 5 months ago) by uebayasi
Branches: matt-nb5-mips64
Diff to: previous 1.93: preferred, colored
Changes since revision 1.93: +11 -6
lines
Build mips3_ld / mips3_sd for N32/N64.
64-bit arguments are stored in single registers in these ABIs. No special
treatment needed.
Revision 1.92.10.1: download - view: text, markup, annotated - select for diffs
Tue Nov 6 23:19:08 2007 UTC (17 years, 3 months ago) by matt
Branches: matt-armv6
CVS tags: matt-armv6-prevmlocking
Diff to: previous 1.92: preferred, colored; next MAIN 1.93: preferred, colored
Changes since revision 1.92: +1 -1
lines
sync with HEAD
Revision 1.93: download - view: text, markup, annotated - select for diffs
Wed Oct 17 19:55:38 2007 UTC (17 years, 4 months ago) by garbled
Branches: MAIN
CVS tags: yamt-x86pmap-base4,
yamt-pf42-baseX,
yamt-pf42-base4,
yamt-pf42-base3,
yamt-pf42-base2,
yamt-pf42-base,
yamt-pf42,
yamt-nfs-mp-base8,
yamt-nfs-mp-base7,
yamt-nfs-mp-base6,
yamt-nfs-mp-base5,
yamt-nfs-mp-base4,
yamt-nfs-mp-base3,
yamt-nfs-mp-base2,
yamt-nfs-mp-base,
yamt-lazymbuf-base15,
yamt-lazymbuf-base14,
yamt-kmem-base3,
yamt-kmem-base2,
yamt-kmem-base,
yamt-kmem,
wrstuden-revivesa-base-4,
wrstuden-revivesa-base-3,
wrstuden-revivesa-base-2,
wrstuden-revivesa-base-1,
wrstuden-revivesa-base,
wrstuden-revivesa,
vmlocking2-base3,
vmlocking2-base2,
vmlocking2-base1,
vmlocking2,
vmlocking-nbase,
simonb-wapbl-nbase,
simonb-wapbl-base,
simonb-wapbl,
reinoud-bufcleanup-nbase,
reinoud-bufcleanup-base,
nick-net80211-sync-base,
nick-net80211-sync,
nick-hppapmap-base4,
nick-hppapmap-base3,
nick-hppapmap-base2,
nick-hppapmap-base,
nick-hppapmap,
netbsd-5-base,
netbsd-5-2-RELEASE,
netbsd-5-2-RC1,
netbsd-5-2-3-RELEASE,
netbsd-5-2-2-RELEASE,
netbsd-5-2-1-RELEASE,
netbsd-5-2,
netbsd-5-1-RELEASE,
netbsd-5-1-RC4,
netbsd-5-1-RC3,
netbsd-5-1-RC2,
netbsd-5-1-RC1,
netbsd-5-1-5-RELEASE,
netbsd-5-1-4-RELEASE,
netbsd-5-1-3-RELEASE,
netbsd-5-1-2-RELEASE,
netbsd-5-1-1-RELEASE,
netbsd-5-1,
netbsd-5-0-RELEASE,
netbsd-5-0-RC4,
netbsd-5-0-RC3,
netbsd-5-0-RC2,
netbsd-5-0-RC1,
netbsd-5-0-2-RELEASE,
netbsd-5-0-1-RELEASE,
netbsd-5-0,
netbsd-5,
mjf-devfs2-base,
mjf-devfs2,
mjf-devfs-base,
mjf-devfs,
matt-nb5-pq3-base,
matt-nb5-pq3,
matt-mips64-base2,
matt-armv6-nbase,
matt-armv6-base,
keiichi-mipv6-nbase,
keiichi-mipv6-base,
keiichi-mipv6,
jymxensuspend-base,
jym-xensuspend,
jmcneill-pm-base,
jmcneill-base,
hpcarm-cleanup-nbase,
hpcarm-cleanup-base,
haad-nbase2,
haad-dm-base2,
haad-dm-base1,
haad-dm-base,
haad-dm,
cube-autoconf-base,
cube-autoconf,
bouyer-xeni386-nbase,
bouyer-xeni386-merge1,
bouyer-xeni386-base,
bouyer-xeni386,
bouyer-xenamd64-base2,
bouyer-xenamd64-base,
ad-socklock-base1,
ad-audiomp2-base,
ad-audiomp2
Branch point for: yamt-nfs-mp,
matt-nb5-mips64
Diff to: previous 1.92: preferred, colored
Changes since revision 1.92: +1 -1
lines
Merge the ppcoea-renovation branch to HEAD.
This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.
TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.
NOTES:
pmppc was removed as an arch, and moved to a evbppc target.
Revision 1.90.12.2: download - view: text, markup, annotated - select for diffs
Wed Oct 3 19:24:23 2007 UTC (17 years, 4 months ago) by garbled
Branches: ppcoea-renovation
Diff to: previous 1.90.12.1: preferred, colored; branchpoint 1.90: preferred, colored; next MAIN 1.91: preferred, colored
Changes since revision 1.90.12.1: +3 -3
lines
Sync with HEAD
Revision 1.86.16.3: download - view: text, markup, annotated - select for diffs
Mon Sep 3 14:28:01 2007 UTC (17 years, 5 months ago) by yamt
Branches: yamt-lazymbuf
Diff to: previous 1.86.16.2: preferred, colored; branchpoint 1.86: preferred, colored; next MAIN 1.87: preferred, colored
Changes since revision 1.86.16.2: +6 -52
lines
sync with head.
Revision 1.92.2.1: download - view: text, markup, annotated - select for diffs
Tue Aug 7 18:05:28 2007 UTC (17 years, 6 months ago) by matt
Branches: matt-mips64
Diff to: previous 1.92: preferred, colored; next MAIN 1.93: preferred, colored
Changes since revision 1.92: +14 -11
lines
Sync with HEAD.
Revision 1.90.4.2: download - view: text, markup, annotated - select for diffs
Sun Jul 15 13:16:26 2007 UTC (17 years, 7 months ago) by ad
Branches: vmlocking
Diff to: previous 1.90.4.1: preferred, colored; branchpoint 1.90: preferred, colored; next MAIN 1.91: preferred, colored
Changes since revision 1.90.4.1: +3 -3
lines
Sync with head.
Revision 1.90.6.1: download - view: text, markup, annotated - select for diffs
Wed Jul 11 20:00:49 2007 UTC (17 years, 7 months ago) by mjf
Branches: mjf-ufs-trans
Diff to: previous 1.90: preferred, colored; next MAIN 1.91: preferred, colored
Changes since revision 1.90: +6 -52
lines
Sync with head.
Revision 1.92: download - view: text, markup, annotated - select for diffs
Wed Jun 27 08:16:58 2007 UTC (17 years, 7 months ago) by uebayasi
Branches: MAIN
CVS tags: yamt-x86pmap-base3,
yamt-x86pmap-base2,
yamt-x86pmap-base,
yamt-x86pmap,
vmlocking-base,
ppcoea-renovation-base,
nick-csl-alignment-base5,
nick-csl-alignment-base,
nick-csl-alignment,
mjf-ufs-trans-base,
matt-mips64-base,
jmcneill-pm,
hpcarm-cleanup,
bouyer-xenamd64
Branch point for: matt-mips64,
matt-armv6
Diff to: previous 1.91: preferred, colored
Changes since revision 1.91: +3 -3
lines
Fix typo.
Revision 1.90.4.1: download - view: text, markup, annotated - select for diffs
Sun May 27 12:27:47 2007 UTC (17 years, 8 months ago) by ad
Branches: vmlocking
Diff to: previous 1.90: preferred, colored
Changes since revision 1.90: +4 -50
lines
Sync with head.
Revision 1.90.12.1: download - view: text, markup, annotated - select for diffs
Tue May 22 17:27:11 2007 UTC (17 years, 8 months ago) by matt
Branches: ppcoea-renovation
Diff to: previous 1.90: preferred, colored
Changes since revision 1.90: +4 -50
lines
Update to HEAD.
Revision 1.91: download - view: text, markup, annotated - select for diffs
Thu May 17 14:51:24 2007 UTC (17 years, 9 months ago) by yamt
Branches: MAIN
Diff to: previous 1.90: preferred, colored
Changes since revision 1.90: +4 -50
lines
merge yamt-idlelwp branch. asked by core@. some ports still needs work.
from doc/BRANCHES:
idle lwp, and some changes depending on it.
1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.
Revision 1.89.2.3: download - view: text, markup, annotated - select for diffs
Wed Apr 18 20:27:54 2007 UTC (17 years, 9 months ago) by ad
Branches: yamt-idlelwp
Diff to: previous 1.89.2.2: preferred, colored; branchpoint 1.89: preferred, colored; next MAIN 1.90: preferred, colored
Changes since revision 1.89.2.2: +2 -2
lines
- Further adaptations to MIPS for the yamt-idlelwp branch.
- Make curlwp a register variable on MIPS.
Revision 1.89.2.2: download - view: text, markup, annotated - select for diffs
Wed Mar 21 21:21:42 2007 UTC (17 years, 10 months ago) by ad
Branches: yamt-idlelwp
Diff to: previous 1.89.2.1: preferred, colored; branchpoint 1.89: preferred, colored
Changes since revision 1.89.2.1: +3 -49
lines
Initial changes for MIPS. Not yet working under gxemul.
Revision 1.89.2.1: download - view: text, markup, annotated - select for diffs
Tue Feb 27 16:52:09 2007 UTC (17 years, 11 months ago) by yamt
Branches: yamt-idlelwp
Diff to: previous 1.89: preferred, colored
Changes since revision 1.89: +2 -2
lines
- sync with head.
- move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
Revision 1.86.16.2: download - view: text, markup, annotated - select for diffs
Mon Feb 26 09:07:29 2007 UTC (17 years, 11 months ago) by yamt
Branches: yamt-lazymbuf
Diff to: previous 1.86.16.1: preferred, colored; branchpoint 1.86: preferred, colored
Changes since revision 1.86.16.1: +2 -15
lines
sync with head.
Revision 1.90: download - view: text, markup, annotated - select for diffs
Fri Feb 23 15:11:36 2007 UTC (17 years, 11 months ago) by tsutsui
Branches: MAIN
CVS tags: yamt-idlelwp-base8,
thorpej-atomic-base,
thorpej-atomic,
reinoud-bufcleanup,
ad-audiomp-base,
ad-audiomp
Branch point for: vmlocking,
ppcoea-renovation,
mjf-ufs-trans
Diff to: previous 1.89: preferred, colored
Changes since revision 1.89: +2 -2
lines
uvm.page_idle_zero now is a bool, not a 32bit value any more.
BTW, is it still worth to have uvm_pageidlezero()? Which port uses it?
Revision 1.89: download - view: text, markup, annotated - select for diffs
Fri Feb 9 21:55:06 2007 UTC (18 years ago) by ad
Branches: MAIN
CVS tags: post-newlock2-merge
Branch point for: yamt-idlelwp
Diff to: previous 1.88: preferred, colored
Changes since revision 1.88: +1 -14
lines
Merge newlock2 to head.
Revision 1.88.20.1: download - view: text, markup, annotated - select for diffs
Tue Jan 30 11:45:27 2007 UTC (18 years ago) by ad
Branches: newlock2
Diff to: previous 1.88: preferred, colored; next MAIN 1.89: preferred, colored
Changes since revision 1.88: +1 -14
lines
For now always call sched_unlock_idle/sched_lock_idle. They will be
removed by yamt's cpu_switchto() changes.
Revision 1.86.16.1: download - view: text, markup, annotated - select for diffs
Wed Jun 21 14:53:44 2006 UTC (18 years, 7 months ago) by yamt
Branches: yamt-lazymbuf
Diff to: previous 1.86: preferred, colored
Changes since revision 1.86: +15 -1
lines
sync with head.
Revision 1.88: download - view: text, markup, annotated - select for diffs
Sun Dec 11 12:18:09 2005 UTC (19 years, 2 months ago) by christos
Branches: MAIN
CVS tags: yamt-uio_vmspace-base5,
yamt-uio_vmspace,
yamt-splraiseipl-base5,
yamt-splraiseipl-base4,
yamt-splraiseipl-base3,
yamt-splraiseipl-base2,
yamt-splraiseipl-base,
yamt-splraiseipl,
yamt-pdpolicy-base9,
yamt-pdpolicy-base8,
yamt-pdpolicy-base7,
yamt-pdpolicy-base6,
yamt-pdpolicy-base5,
yamt-pdpolicy-base4,
yamt-pdpolicy-base3,
yamt-pdpolicy-base2,
yamt-pdpolicy-base,
yamt-pdpolicy,
wrstuden-fixsa-newbase,
wrstuden-fixsa-base-1,
wrstuden-fixsa-base,
wrstuden-fixsa,
simonb-timecounters-base,
simonb-timecounters,
simonb-timcounters-final,
rpaulo-netinet-merge-pcb-base,
rpaulo-netinet-merge-pcb,
peter-altq-base,
peter-altq,
newlock2-nbase,
newlock2-base,
netbsd-4-base,
netbsd-4-0-RELEASE,
netbsd-4-0-RC5,
netbsd-4-0-RC4,
netbsd-4-0-RC3,
netbsd-4-0-RC2,
netbsd-4-0-RC1,
netbsd-4-0-1-RELEASE,
netbsd-4-0,
netbsd-4,
matt-nb4-arm-base,
matt-nb4-arm,
gdamore-uart-base,
gdamore-uart,
elad-kernelauth-base,
elad-kernelauth,
chap-midi-nbase,
chap-midi-base,
chap-midi,
abandoned-netbsd-4-base,
abandoned-netbsd-4
Branch point for: newlock2
Diff to: previous 1.87: preferred, colored
Changes since revision 1.87: +1 -1
lines
merge ktrace-lwp.
Revision 1.85.2.4: download - view: text, markup, annotated - select for diffs
Thu Nov 10 13:57:33 2005 UTC (19 years, 3 months ago) by skrll
Branches: ktrace-lwp
Diff to: previous 1.85.2.3: preferred, colored; next MAIN 1.86: preferred, colored
Changes since revision 1.85.2.3: +15 -1
lines
Sync with HEAD. Here we go again...
Revision 1.86.6.1: download - view: text, markup, annotated - select for diffs
Tue Sep 13 21:26:33 2005 UTC (19 years, 5 months ago) by riz
Branches: netbsd-2
CVS tags: netbsd-2-1-RELEASE,
netbsd-2-1-RC6,
netbsd-2-1-RC5,
netbsd-2-1-RC4,
netbsd-2-1
Diff to: previous 1.86: preferred, colored; next MAIN 1.87: preferred, colored
Changes since revision 1.86: +15 -1
lines
Pull up following revision(s) (requested by tsutsui in ticket #5829):
sys/arch/mips/include/locore.h: revision 1.69
sys/arch/mips/mips/locore_mips3.S: revision 1.87
Add mips3_cp0_pg_mask_write() to initialize pagemask register.
Revision 1.86.14.1: download - view: text, markup, annotated - select for diffs
Sun Sep 11 22:09:21 2005 UTC (19 years, 5 months ago) by tron
Branches: netbsd-3
CVS tags: netbsd-3-1-RELEASE,
netbsd-3-1-RC4,
netbsd-3-1-RC3,
netbsd-3-1-RC2,
netbsd-3-1-RC1,
netbsd-3-1-1-RELEASE,
netbsd-3-1,
netbsd-3-0-RELEASE,
netbsd-3-0-RC6,
netbsd-3-0-RC5,
netbsd-3-0-RC4,
netbsd-3-0-RC3,
netbsd-3-0-RC2,
netbsd-3-0-RC1,
netbsd-3-0-3-RELEASE,
netbsd-3-0-2-RELEASE,
netbsd-3-0-1-RELEASE,
netbsd-3-0
Diff to: previous 1.86: preferred, colored; next MAIN 1.87: preferred, colored
Changes since revision 1.86: +15 -1
lines
Pull up following revision(s) (requested by tsutsui in ticket #758):
sys/arch/mips/include/locore.h: revision 1.69
sys/arch/mips/mips/locore_mips3.S: revision 1.87
Add mips3_cp0_pg_mask_write() to initialize pagemask register.
Revision 1.87: download - view: text, markup, annotated - select for diffs
Thu Sep 8 15:13:23 2005 UTC (19 years, 5 months ago) by tsutsui
Branches: MAIN
CVS tags: yamt-vop-base3,
yamt-vop-base2,
yamt-vop-base,
yamt-vop,
yamt-readahead-pervnode,
yamt-readahead-perfile,
yamt-readahead-base3,
yamt-readahead-base2,
yamt-readahead-base,
yamt-readahead,
thorpej-vnode-attr-base,
thorpej-vnode-attr,
ktrace-lwp-base
Diff to: previous 1.86: preferred, colored
Changes since revision 1.86: +15 -1
lines
Add mips3_cp0_pg_mask_write() to initialize pagemask register.
Revision 1.85.2.3: download - view: text, markup, annotated - select for diffs
Tue Sep 21 13:18:49 2004 UTC (20 years, 4 months ago) by skrll
Branches: ktrace-lwp
Diff to: previous 1.85.2.2: preferred, colored
Changes since revision 1.85.2.2: +1 -1
lines
Fix the sync with head I botched.
Revision 1.85.2.2: download - view: text, markup, annotated - select for diffs
Sat Sep 18 14:37:25 2004 UTC (20 years, 4 months ago) by skrll
Branches: ktrace-lwp
Diff to: previous 1.85.2.1: preferred, colored
Changes since revision 1.85.2.1: +0 -0
lines
Sync with HEAD.
Revision 1.85.2.1: download - view: text, markup, annotated - select for diffs
Tue Aug 3 10:37:48 2004 UTC (20 years, 6 months ago) by skrll
Branches: ktrace-lwp
Diff to: previous 1.85: preferred, colored
Changes since revision 1.85: +2 -6
lines
Sync with HEAD
Revision 1.86: download - view: text, markup, annotated - select for diffs
Thu Aug 7 16:28:32 2003 UTC (21 years, 6 months ago) by agc
Branches: MAIN
CVS tags: yamt-km-base4,
yamt-km-base3,
yamt-km-base2,
yamt-km-base,
yamt-km,
netbsd-3-base,
netbsd-2-base,
netbsd-2-1-RC3,
netbsd-2-1-RC2,
netbsd-2-1-RC1,
netbsd-2-0-base,
netbsd-2-0-RELEASE,
netbsd-2-0-RC5,
netbsd-2-0-RC4,
netbsd-2-0-RC3,
netbsd-2-0-RC2,
netbsd-2-0-RC1,
netbsd-2-0-3-RELEASE,
netbsd-2-0-2-RELEASE,
netbsd-2-0-1-RELEASE,
netbsd-2-0,
kent-audio2-base,
kent-audio2,
kent-audio1-beforemerge,
kent-audio1-base,
kent-audio1
Branch point for: yamt-lazymbuf,
netbsd-3,
netbsd-2
Diff to: previous 1.85: preferred, colored
Changes since revision 1.85: +2 -6
lines
Move UCB-licensed code from 4-clause to 3-clause licence.
Patches provided by Joel Baker in PR 22364, verified by myself.
Revision 1.85: download - view: text, markup, annotated - select for diffs
Fri Jan 17 23:36:14 2003 UTC (22 years, 1 month ago) by thorpej
Branches: MAIN
Branch point for: ktrace-lwp
Diff to: previous 1.84: preferred, colored
Changes since revision 1.84: +2 -2
lines
Merge the nathanw_sa branch.
Revision 1.84.4.1: download - view: text, markup, annotated - select for diffs
Wed Dec 18 05:01:01 2002 UTC (22 years, 2 months ago) by gmcgarry
Branches: gmcgarry_ctxsw
Diff to: previous 1.84: preferred, colored; next MAIN 1.85: preferred, colored
Changes since revision 1.84: +10 -47
lines
Remove the scheduler semantics from machine-dependent context switch.
Revision 1.72.2.11: download - view: text, markup, annotated - select for diffs
Mon Nov 11 22:00:44 2002 UTC (22 years, 3 months ago) by nathanw
Branches: nathanw_sa
CVS tags: nathanw_sa_end
Diff to: previous 1.72.2.10: preferred, colored; next MAIN 1.73: preferred, colored
Changes since revision 1.72.2.10: +4 -1
lines
Catch up to -current
Revision 1.84: download - view: text, markup, annotated - select for diffs
Fri Nov 8 00:49:32 2002 UTC (22 years, 3 months ago) by simonb
Branches: MAIN
CVS tags: nathanw_sa_before_merge,
nathanw_sa_base,
gmcgarry_ucred_base,
gmcgarry_ucred,
gmcgarry_ctxsw_base,
fvdl_fs64_base
Branch point for: gmcgarry_ctxsw
Diff to: previous 1.83: preferred, colored
Changes since revision 1.83: +4 -1
lines
Sprinkle a little more COP0_SYNC (in an unused function...).
Revision 1.69.2.6: download - view: text, markup, annotated - select for diffs
Thu Oct 10 18:34:06 2002 UTC (22 years, 4 months ago) by jdolecek
Branches: kqueue
Diff to: previous 1.69.2.5: preferred, colored; next MAIN 1.70: preferred, colored
Changes since revision 1.69.2.5: +7 -6
lines
sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
Revision 1.72.2.10: download - view: text, markup, annotated - select for diffs
Sat Oct 5 01:21:09 2002 UTC (22 years, 4 months ago) by gmcgarry
Branches: nathanw_sa
Diff to: previous 1.72.2.9: preferred, colored
Changes since revision 1.72.2.9: +2 -2
lines
LWPify
Revision 1.72.2.9: download - view: text, markup, annotated - select for diffs
Tue Sep 17 21:15:47 2002 UTC (22 years, 5 months ago) by nathanw
Branches: nathanw_sa
Diff to: previous 1.72.2.8: preferred, colored
Changes since revision 1.72.2.8: +7 -6
lines
Catch up to -current.
Revision 1.83: download - view: text, markup, annotated - select for diffs
Mon Sep 9 02:32:38 2002 UTC (22 years, 5 months ago) by simonb
Branches: MAIN
CVS tags: kqueue-beforemerge,
kqueue-base,
kqueue-aftermerge
Diff to: previous 1.82: preferred, colored
Changes since revision 1.82: +6 -6
lines
In the idle functions, set curproc to NULL and (#ifdef LOCKDEBUG) call
sched_unlock_idle before enabling interrupts. LOCKDEBUG kernels now
boot successfully.
Thanks to Chris Gilbert for helping fix this.
Revision 1.82: download - view: text, markup, annotated - select for diffs
Mon Sep 9 01:03:10 2002 UTC (22 years, 5 months ago) by simonb
Branches: MAIN
Diff to: previous 1.81: preferred, colored
Changes since revision 1.81: +2 -1
lines
Include "opt_lockdebug.h" here to #ifdef LOCKDEBUG actually does something.
Revision 1.69.2.5: download - view: text, markup, annotated - select for diffs
Fri Sep 6 08:37:35 2002 UTC (22 years, 5 months ago) by jdolecek
Branches: kqueue
Diff to: previous 1.69.2.4: preferred, colored
Changes since revision 1.69.2.4: +2 -2
lines
sync kqueue branch with HEAD
Revision 1.77.4.2: download - view: text, markup, annotated - select for diffs
Tue Jul 16 08:50:47 2002 UTC (22 years, 7 months ago) by gehenna
Branches: gehenna-devsw
Diff to: previous 1.77.4.1: preferred, colored; branchpoint 1.77: preferred, colored; next MAIN 1.78: preferred, colored
Changes since revision 1.77.4.1: +2 -2
lines
catch up with -current.
Revision 1.77.4.1: download - view: text, markup, annotated - select for diffs
Sun Jul 14 18:37:15 2002 UTC (22 years, 7 months ago) by gehenna
Branches: gehenna-devsw
Diff to: previous 1.77: preferred, colored
Changes since revision 1.77: +8 -15
lines
catch up with -current.
Revision 1.72.2.8: download - view: text, markup, annotated - select for diffs
Mon Jun 24 22:05:54 2002 UTC (22 years, 7 months ago) by nathanw
Branches: nathanw_sa
Diff to: previous 1.72.2.7: preferred, colored
Changes since revision 1.72.2.7: +2 -2
lines
Curproc->curlwp renaming.
Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".
"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).
Revision 1.69.2.4: download - view: text, markup, annotated - select for diffs
Sun Jun 23 17:38:04 2002 UTC (22 years, 7 months ago) by jdolecek
Branches: kqueue
Diff to: previous 1.69.2.3: preferred, colored
Changes since revision 1.69.2.3: +8 -15
lines
catch up with -current on kqueue branch
Revision 1.72.2.7: download - view: text, markup, annotated - select for diffs
Thu Jun 20 03:39:49 2002 UTC (22 years, 7 months ago) by nathanw
Branches: nathanw_sa
Diff to: previous 1.72.2.6: preferred, colored
Changes since revision 1.72.2.6: +9 -16
lines
Catch up to -current.
Revision 1.81: download - view: text, markup, annotated - select for diffs
Mon Jun 17 22:48:45 2002 UTC (22 years, 8 months ago) by simonb
Branches: MAIN
CVS tags: gehenna-devsw-base
Diff to: previous 1.80: preferred, colored
Changes since revision 1.80: +2 -2
lines
Fix tyop.
Revision 1.80: download - view: text, markup, annotated - select for diffs
Wed Jun 5 06:09:28 2002 UTC (22 years, 8 months ago) by simonb
Branches: MAIN
Diff to: previous 1.79: preferred, colored
Changes since revision 1.79: +3 -6
lines
White space nits.
Revision 1.79: download - view: text, markup, annotated - select for diffs
Sat Jun 1 13:45:45 2002 UTC (22 years, 8 months ago) by simonb
Branches: MAIN
Diff to: previous 1.78: preferred, colored
Changes since revision 1.78: +6 -7
lines
Use CPU_MIPS_USE_WAIT and CPU_MIPS_NO_WAIT in the CPU table, and use
the generic name "mips_wait_idle" for the old function that had both
rm52xx_idle and mipsNN_idle entry points.
Revision 1.78: download - view: text, markup, annotated - select for diffs
Sat Jun 1 13:16:44 2002 UTC (22 years, 8 months ago) by simonb
Branches: MAIN
Diff to: previous 1.77: preferred, colored
Changes since revision 1.77: +1 -4
lines
Remove some unnecessary nops after some mfc0's.
Revision 1.72.2.6: download - view: text, markup, annotated - select for diffs
Mon Apr 1 07:41:06 2002 UTC (22 years, 10 months ago) by nathanw
Branches: nathanw_sa
Diff to: previous 1.72.2.5: preferred, colored
Changes since revision 1.72.2.5: +135 -2059
lines
Catch up to -current.
(CVS: It's not just a program. It's an adventure!)
Revision 1.69.2.3: download - view: text, markup, annotated - select for diffs
Sat Mar 16 15:58:40 2002 UTC (22 years, 11 months ago) by jdolecek
Branches: kqueue
Diff to: previous 1.69.2.2: preferred, colored
Changes since revision 1.69.2.2: +135 -2055
lines
Catch up with -current.
Revision 1.77: download - view: text, markup, annotated - select for diffs
Mon Mar 11 16:39:40 2002 UTC (22 years, 11 months ago) by uch
Branches: MAIN
CVS tags: netbsd-1-6-base,
netbsd-1-6-RELEASE,
netbsd-1-6-RC3,
netbsd-1-6-RC2,
netbsd-1-6-RC1,
netbsd-1-6-PATCH002-RELEASE,
netbsd-1-6-PATCH002-RC4,
netbsd-1-6-PATCH002-RC3,
netbsd-1-6-PATCH002-RC2,
netbsd-1-6-PATCH002-RC1,
netbsd-1-6-PATCH002,
netbsd-1-6-PATCH001-RELEASE,
netbsd-1-6-PATCH001-RC3,
netbsd-1-6-PATCH001-RC2,
netbsd-1-6-PATCH001-RC1,
netbsd-1-6-PATCH001,
netbsd-1-6,
eeh-devprop-base,
eeh-devprop
Branch point for: gehenna-devsw
Diff to: previous 1.76: preferred, colored
Changes since revision 1.76: +2 -1
lines
make this compile and work with MIPS3_5900.
Revision 1.76: download - view: text, markup, annotated - select for diffs
Tue Mar 5 15:50:59 2002 UTC (22 years, 11 months ago) by simonb
Branches: MAIN
CVS tags: newlock-base,
newlock
Diff to: previous 1.75: preferred, colored
Changes since revision 1.75: +133 -2054
lines
Add support for MIPS32 and MIPS64 architectures:
- Remove all mmu-related code that may use 32 register on mips32-style
implementatios and move them to mipsX_subr.S - which is then included
from mips{3,32,64,5900}_subr.S with various control defines enabled.
- Remove local cache instruction flags
- Add badaddr64 (from Broadcom Corp).
Revision 1.69.2.2: download - view: text, markup, annotated - select for diffs
Thu Jan 10 19:46:11 2002 UTC (23 years, 1 month ago) by thorpej
Branches: kqueue
Diff to: previous 1.69.2.1: preferred, colored
Changes since revision 1.69.2.1: +301 -596
lines
Sync kqueue branch with -current.
Revision 1.72.2.5: download - view: text, markup, annotated - select for diffs
Tue Jan 8 00:26:22 2002 UTC (23 years, 1 month ago) by nathanw
Branches: nathanw_sa
Diff to: previous 1.72.2.4: preferred, colored
Changes since revision 1.72.2.4: +56 -54
lines
Catch up to -current.
Revision 1.75: download - view: text, markup, annotated - select for diffs
Thu Dec 27 22:55:46 2001 UTC (23 years, 1 month ago) by shin
Branches: MAIN
CVS tags: ifpoll-base
Diff to: previous 1.74: preferred, colored
Changes since revision 1.74: +5 -1
lines
add #ifdef DEBUG around VCED_count etc.
Revision 1.74: download - view: text, markup, annotated - select for diffs
Thu Dec 27 04:19:17 2001 UTC (23 years, 1 month ago) by shin
Branches: MAIN
Diff to: previous 1.73: preferred, colored
Changes since revision 1.73: +40 -11
lines
split VCED and VCEI.
Revision 1.73: download - view: text, markup, annotated - select for diffs
Thu Dec 27 04:03:37 2001 UTC (23 years, 1 month ago) by shin
Branches: MAIN
Diff to: previous 1.72: preferred, colored
Changes since revision 1.72: +15 -46
lines
simplify VCED processing.
just write back and invalidate secondary cache line and fetch data again.
Revision 1.72.2.4: download - view: text, markup, annotated - select for diffs
Sun Nov 18 01:26:28 2001 UTC (23 years, 3 months ago) by wdk
Branches: nathanw_sa
Diff to: previous 1.72.2.3: preferred, colored
Changes since revision 1.72.2.3: +6 -2
lines
Fixup l->l_proc references in areas where p_md structures were
used in locore routines.
Can now boot multi-user on -sgimips machine.
Untested: upcall functions, R2000/3000 processors
Revision 1.72.2.3: download - view: text, markup, annotated - select for diffs
Sun Nov 18 00:09:25 2001 UTC (23 years, 3 months ago) by wdk
Branches: nathanw_sa
Diff to: previous 1.72.2.2: preferred, colored
Changes since revision 1.72.2.2: +5 -5
lines
p_md.md_regs -> l_md.md_regs
p_md.md_upte -> l_md.md_upte
Revision 1.72.2.2: download - view: text, markup, annotated - select for diffs
Sat Nov 17 23:43:43 2001 UTC (23 years, 3 months ago) by wdk
Branches: nathanw_sa
Diff to: previous 1.72.2.1: preferred, colored
Changes since revision 1.72.2.1: +2451 -0
lines
Inital support for Scheduler Activation on MIPS architectures.
Compiles for sgimips. Needs more work in locore.S in order to reach
single user and beyond.
Revision 1.72.2.1
Wed Nov 14 18:15:23 2001 UTC (23 years, 3 months ago) by wdk
Branches: nathanw_sa
FILE REMOVED
Changes since revision 1.72: +0 -2451
lines
file locore_mips3.S was added on branch nathanw_sa on 2001-11-17 23:43:43 +0000
Revision 1.72: download - view: text, markup, annotated - select for diffs
Wed Nov 14 18:15:23 2001 UTC (23 years, 3 months ago) by thorpej
Branches: MAIN
Branch point for: nathanw_sa
Diff to: previous 1.71: preferred, colored
Changes since revision 1.71: +6 -537
lines
Merge the thorpej-mips-cache branch onto the trunk. This is an
overhaul of how caches are handled for NetBSD's MIPS ports.
Revision 1.71.2.3: download - view: text, markup, annotated - select for diffs
Sun Nov 11 03:52:00 2001 UTC (23 years, 3 months ago) by shin
Branches: thorpej-mips-cache
Diff to: previous 1.71.2.2: preferred, colored; branchpoint 1.71: preferred, colored; next MAIN 1.72: preferred, colored
Changes since revision 1.71.2.2: +6 -6
lines
use new cache parameter variables.
Revision 1.71.2.2: download - view: text, markup, annotated - select for diffs
Sun Nov 4 03:38:48 2001 UTC (23 years, 3 months ago) by shin
Branches: thorpej-mips-cache
Diff to: previous 1.71.2.1: preferred, colored; branchpoint 1.71: preferred, colored
Changes since revision 1.71.2.1: +2 -1
lines
add missing #ifdef to compile.
Revision 1.71.2.1: download - view: text, markup, annotated - select for diffs
Wed Oct 24 17:38:09 2001 UTC (23 years, 3 months ago) by thorpej
Branches: thorpej-mips-cache
Diff to: previous 1.71: preferred, colored
Changes since revision 1.71: +1 -533
lines
Update for the new cache code. Some careful code review is needed
here, esp. by people who have done recent MIPS pmap hacking.
Revision 1.71: download - view: text, markup, annotated - select for diffs
Tue Oct 16 16:31:37 2001 UTC (23 years, 4 months ago) by uch
Branches: MAIN
CVS tags: thorpej-mips-cache-base
Branch point for: thorpej-mips-cache
Diff to: previous 1.70: preferred, colored
Changes since revision 1.70: +242 -8
lines
R5900 support.
COP0_SYNC
In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
IPL_ICU_MASK
mask interrupt directly ICU instead of SR.IM.
I've added this feature to support software interrupt for R5900.
and this option may be useful for platform which has cascaded ICU.
Revision 1.36.2.5: download - view: text, markup, annotated - select for diffs
Thu Aug 16 13:33:15 2001 UTC (23 years, 6 months ago) by tv
Branches: netbsd-1-5
CVS tags: netbsd-1-5-PATCH003,
netbsd-1-5-PATCH002
Diff to: previous 1.36.2.4: preferred, colored; branchpoint 1.36: preferred, colored; next MAIN 1.37: preferred, colored
Changes since revision 1.36.2.4: +11 -1
lines
Pullup [shin]:
sys/arch/mips/mips/locore_mips3.S 1.70
sys/arch/mips/mips/vm_machdep.c 1.77-1.78
Fix bugs in handling of SR on mips3 machines, causing TLB miss panics.
Revision 1.69.2.1: download - view: text, markup, annotated - select for diffs
Fri Aug 3 04:11:59 2001 UTC (23 years, 6 months ago) by lukem
Branches: kqueue
Diff to: previous 1.69: preferred, colored
Changes since revision 1.69: +11 -1
lines
update to -current
Revision 1.70: download - view: text, markup, annotated - select for diffs
Tue Jul 24 23:13:33 2001 UTC (23 years, 6 months ago) by rafal
Branches: MAIN
CVS tags: thorpej-devvp-base3,
thorpej-devvp-base2,
thorpej-devvp-base,
thorpej-devvp,
pre-chs-ubcperf,
post-chs-ubcperf
Diff to: previous 1.69: preferred, colored
Changes since revision 1.69: +11 -1
lines
Fix bug in mips3_proc_trampoline: SR wasn't disabled on entry, allowing an
interrupt to sneak in after EXL had been set; the interrupt EPC was stale
as PC isn't saved if EXL is set, causing the eret to return to the wrong
place and leading to kernel-mode TLB misses on user addresses. The bug
was discovered by the japanese NetBSD/*mips folks and the same fix was
found independently by shinohara-san (shin@netbsd.org).
Revision 1.66.2.1: download - view: text, markup, annotated - select for diffs
Thu Jun 21 19:28:08 2001 UTC (23 years, 7 months ago) by nathanw
Diff to: previous 1.66: preferred, colored; next MAIN 1.67: preferred, colored
Changes since revision 1.66: +77 -3
lines
Catch up to -current.
Revision 1.69: download - view: text, markup, annotated - select for diffs
Mon Jun 11 23:52:39 2001 UTC (23 years, 8 months ago) by thorpej
Branches: MAIN
Branch point for: kqueue
Diff to: previous 1.68: preferred, colored
Changes since revision 1.68: +5 -3
lines
Always indirect through the "locoresw" to get the cache ops, since
there are just far too many combinations to handle with magic
#ifdefs in any sane way. Also, add a HitFlushDCache op to the
"locoresw", and fill it in as appropriate (it's NULL on MIPS-I,
so watch out).
These changes ensure that my R4600 Indy (with 2-way cache) gets
the correct cache ops when the kernel is built with only MIPS3
support, resulting in a kernel that is significantly more stable.
Revision 1.36.2.4: download - view: text, markup, annotated - select for diffs
Thu Jun 7 15:57:52 2001 UTC (23 years, 8 months ago) by he
Branches: netbsd-1-5
CVS tags: netbsd-1-5-PATCH001
Diff to: previous 1.36.2.3: preferred, colored; branchpoint 1.36: preferred, colored
Changes since revision 1.36.2.3: +72 -1
lines
Pull up revision 1.67 (requested by hubertf, reviewed by thorpej):
Implement power saving for RM5200 and RM7000 CPUs, as used in
e.g. Cobalt RaQ2.
Revision 1.68: download - view: text, markup, annotated - select for diffs
Wed May 30 15:24:34 2001 UTC (23 years, 8 months ago) by lukem
Branches: MAIN
Diff to: previous 1.67: preferred, colored
Changes since revision 1.67: +2 -1
lines
add missing #include "opt_kgdb.h"
Revision 1.67: download - view: text, markup, annotated - select for diffs
Tue May 29 17:51:55 2001 UTC (23 years, 8 months ago) by thorpej
Branches: MAIN
Diff to: previous 1.66: preferred, colored
Changes since revision 1.66: +72 -1
lines
Add an idle loop routine for the QED RM52xx family. This uses the
RM52xx `wait' insn to power down the pipeline.
Revision 1.10.2.6: download - view: text, markup, annotated - select for diffs
Sun Feb 11 19:11:07 2001 UTC (24 years ago) by bouyer
Branches: thorpej_scsipi
Diff to: previous 1.10.2.5: preferred, colored; next MAIN 1.11: preferred, colored
Changes since revision 1.10.2.5: +2 -2
lines
Sync with HEAD.
Revision 1.66: download - view: text, markup, annotated - select for diffs
Sat Jan 20 07:23:21 2001 UTC (24 years ago) by ur
Branches: MAIN
CVS tags: thorpej_scsipi_nbase,
thorpej_scsipi_beforemerge,
thorpej_scsipi_base
Diff to: previous 1.65: preferred, colored
Changes since revision 1.65: +2 -2
lines
Fix register name typo.
Revision 1.10.2.5: download - view: text, markup, annotated - select for diffs
Thu Jan 18 09:22:44 2001 UTC (24 years, 1 month ago) by bouyer
Branches: thorpej_scsipi
Diff to: previous 1.10.2.4: preferred, colored
Changes since revision 1.10.2.4: +38 -10
lines
Sync with head (for UBC+NFS fixes, mostly).
Revision 1.65: download - view: text, markup, annotated - select for diffs
Tue Jan 16 06:01:26 2001 UTC (24 years, 1 month ago) by thorpej
Branches: MAIN
Diff to: previous 1.64: preferred, colored
Changes since revision 1.64: +11 -9
lines
New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
as possible.
Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.
There's still some work that can be done using __HAVE_MINIMAL_EMUL.
Revision 1.64: download - view: text, markup, annotated - select for diffs
Sun Jan 14 21:18:40 2001 UTC (24 years, 1 month ago) by thorpej
Branches: MAIN
Diff to: previous 1.63: preferred, colored
Changes since revision 1.63: +7 -5
lines
Make the astpending flag per-process.
Revision 1.63: download - view: text, markup, annotated - select for diffs
Sat Jan 13 23:49:13 2001 UTC (24 years, 1 month ago) by thorpej
Branches: MAIN
Diff to: previous 1.62: preferred, colored
Changes since revision 1.62: +25 -1
lines
Check for ASTs in Syscall and UserGenException, too; AST processing
must be done on *every* return to userland.
Revision 1.10.2.4: download - view: text, markup, annotated - select for diffs
Fri Jan 5 17:34:43 2001 UTC (24 years, 1 month ago) by bouyer
Branches: thorpej_scsipi
Diff to: previous 1.10.2.3: preferred, colored
Changes since revision 1.10.2.3: +45 -3
lines
Sync with HEAD
Revision 1.62: download - view: text, markup, annotated - select for diffs
Wed Dec 20 05:48:06 2000 UTC (24 years, 1 month ago) by jeffs
Branches: MAIN
Diff to: previous 1.61: preferred, colored
Changes since revision 1.61: +43 -1
lines
Hook mips3 cache error vector. No real handler, only set-up for a panic.
A real handler is hard.
Revision 1.61: download - view: text, markup, annotated - select for diffs
Thu Dec 14 21:29:51 2000 UTC (24 years, 2 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.60: preferred, colored
Changes since revision 1.60: +4 -4
lines
For MIPS software masking option, when returning to user mode apply
the mask to all interrupts to catch changes in the mask state faster.
Does not affect platforms w/o this option enabled.
Revision 1.10.2.3: download - view: text, markup, annotated - select for diffs
Fri Dec 8 09:28:21 2000 UTC (24 years, 2 months ago) by bouyer
Branches: thorpej_scsipi
Diff to: previous 1.10.2.2: preferred, colored
Changes since revision 1.10.2.2: +6 -59
lines
Sync with HEAD.
Revision 1.60: download - view: text, markup, annotated - select for diffs
Mon Nov 27 06:37:32 2000 UTC (24 years, 2 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.59: preferred, colored
Changes since revision 1.59: +7 -60
lines
Use only one TLB entry to wire down process's USPACE since it's
now guranteed to be aligned on 8KB boundary in kernel virutal
address. Retain one more free TLB entry.
Revision 1.10.2.2: download - view: text, markup, annotated - select for diffs
Wed Nov 22 16:00:45 2000 UTC (24 years, 2 months ago) by bouyer
Branches: thorpej_scsipi
Diff to: previous 1.10.2.1: preferred, colored
Changes since revision 1.10.2.1: +4 -1
lines
Sync with HEAD.
Revision 1.10.2.1: download - view: text, markup, annotated - select for diffs
Mon Nov 20 20:13:35 2000 UTC (24 years, 2 months ago) by bouyer
Branches: thorpej_scsipi
Diff to: previous 1.10: preferred, colored
Changes since revision 1.10: +952 -753
lines
Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
Revision 1.59: download - view: text, markup, annotated - select for diffs
Sun Oct 29 08:01:29 2000 UTC (24 years, 3 months ago) by shin
Branches: MAIN
Diff to: previous 1.58: preferred, colored
Changes since revision 1.58: +4 -1
lines
fix cp0 hazard.
R4000 requires 3 nops between tlbr and dmfc0.
Revision 1.58: download - view: text, markup, annotated - select for diffs
Tue Oct 24 03:23:19 2000 UTC (24 years, 3 months ago) by castor
Branches: MAIN
Diff to: previous 1.57: preferred, colored
Changes since revision 1.57: +20 -3
lines
In mips3_TBIS(va) do not invalidate the other half of the JTLB entry if
the page is wired down. Flushing both halves of a wired TLB entry resulted
in hangs when in programs called for and released kernel memory
soon after being invoked. In particular, we see this when single-stepping
a process using GDB.
It would be better if we could arrange to use both halves of the TLB
entry for the PCB, but for some reason we frequently end up with things
on an odd page boundary.
Revision 1.57: download - view: text, markup, annotated - select for diffs
Thu Oct 5 02:36:45 2000 UTC (24 years, 4 months ago) by cgd
Branches: MAIN
Diff to: previous 1.56: preferred, colored
Changes since revision 1.56: +97 -134
lines
clean up and consistency for CP0 Count, Compare, Wired, and Config
access function names and prototypes.
Revision 1.56: download - view: text, markup, annotated - select for diffs
Thu Oct 5 01:06:06 2000 UTC (24 years, 4 months ago) by cgd
Branches: MAIN
Diff to: previous 1.55: preferred, colored
Changes since revision 1.55: +1 -13
lines
nuke mips3_clearBEV(). There's really no point in coding a
special-purpose assembly routine for things like this.
Revision 1.55: download - view: text, markup, annotated - select for diffs
Mon Oct 2 22:13:38 2000 UTC (24 years, 4 months ago) by cgd
Branches: MAIN
Diff to: previous 1.54: preferred, colored
Changes since revision 1.54: +68 -1
lines
provide mips3_ld() and mips3_sd(), functions which provide safe wrappers
for mips3 (and later) 'ld' and 'sd' instructions. These currently
only are properly implemented for the _MIPS_BSD_API_LP32 and
_MIPS_BSD_API_LP32_64CLEAN 'API's. They're pretty messy, but when you
need them, you really need them.
Revision 1.54: download - view: text, markup, annotated - select for diffs
Tue Sep 26 18:22:13 2000 UTC (24 years, 4 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.53: preferred, colored
Changes since revision 1.53: +2 -2
lines
No longer save $at on syscall entry. v1 does appear to be used as if
you do not save it and pass it along in rval the system will start
to fail running user programs. This finishes the suggestion by cgd to
not save some registers on syscall entry.
Revision 1.53: download - view: text, markup, annotated - select for diffs
Sat Sep 16 06:57:21 2000 UTC (24 years, 5 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.52: preferred, colored
Changes since revision 1.52: +3 -3
lines
Re-enable SR IE bit before calling syscall(). Matches Tohru's mips1 change.
Revision 1.52: download - view: text, markup, annotated - select for diffs
Wed Sep 13 06:48:04 2000 UTC (24 years, 5 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.51: preferred, colored
Changes since revision 1.51: +13 -13
lines
Do not save t* registers in syscall stub as suggested by cgd. Saves
a whole 0.01us in lmbench lat_syscall null on our 250Mhz QED system.
$at is still saved just to be safe, although it looks like it does
not need to be. $v1 is used in syscall(), although I'm not sure why.
Revision 1.51: download - view: text, markup, annotated - select for diffs
Wed Sep 13 01:53:01 2000 UTC (24 years, 5 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.50: preferred, colored
Changes since revision 1.50: +6 -11
lines
Introduce 'segbase' global variable to hold the pointer to current
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.
Revision 1.50: download - view: text, markup, annotated - select for diffs
Wed Sep 13 01:12:47 2000 UTC (24 years, 5 months ago) by chuck
Branches: MAIN
Diff to: previous 1.49: preferred, colored
Changes since revision 1.49: +83 -122
lines
modify mips3 locore to elminate the abuse of XContext
so that we can run on systems that do not have XContext
(e.g. IDT 32364).
Revision 1.49: download - view: text, markup, annotated - select for diffs
Tue Sep 12 15:40:36 2000 UTC (24 years, 5 months ago) by soren
Branches: MAIN
Diff to: previous 1.48: preferred, colored
Changes since revision 1.48: +1 -4
lines
Remove old comment.
Revision 1.48: download - view: text, markup, annotated - select for diffs
Fri Sep 8 07:24:42 2000 UTC (24 years, 5 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.47: preferred, colored
Changes since revision 1.47: +9 -5
lines
In outofworld, keep $sp for DDB case if it looks like a kernel address
so the stacktrace is ok.
Revision 1.47: download - view: text, markup, annotated - select for diffs
Thu Sep 7 20:31:02 2000 UTC (24 years, 5 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.46: preferred, colored
Changes since revision 1.46: +5 -1
lines
Shuichiro URATA pointed out that the R4000 needs 3 nops. Other OSs make
it look at casual inspection like 1 nop is needed but play other tricks.
Still have reduced by 1 nop. Hopefully this covers the NEC 41[x]1. Could
not find info for those processors.
Revision 1.46: download - view: text, markup, annotated - select for diffs
Wed Sep 6 06:33:42 2000 UTC (24 years, 5 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.45: preferred, colored
Changes since revision 1.45: +1 -7
lines
Remove 3 of the nops between tlbwr and eret in tlb miss handlers. They
were added early when adding the QED support. RM5231 seems to work fine
w/o the extra nops. Noticed by Chuck Cranor.
Revision 1.36.2.3: download - view: text, markup, annotated - select for diffs
Thu Aug 10 00:55:16 2000 UTC (24 years, 6 months ago) by shin
Branches: netbsd-1-5
CVS tags: netbsd-1-5-RELEASE,
netbsd-1-5-BETA2,
netbsd-1-5-BETA,
netbsd-1-5-ALPHA2
Diff to: previous 1.36.2.2: preferred, colored; branchpoint 1.36: preferred, colored
Changes since revision 1.36.2.2: +7 -2
lines
pull up revision 1.45 (Approved by relent-1-5):
protect doubleword register from interrupt.
Revision 1.45: download - view: text, markup, annotated - select for diffs
Sun Aug 6 12:30:36 2000 UTC (24 years, 6 months ago) by shin
Branches: MAIN
Diff to: previous 1.44: preferred, colored
Changes since revision 1.44: +7 -2
lines
protect doubleword register from interrupt.
Revision 1.44: download - view: text, markup, annotated - select for diffs
Tue Aug 1 23:38:26 2000 UTC (24 years, 6 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.43: preferred, colored
Changes since revision 1.43: +7 -2
lines
Make mips3_FlushICache() convert a0 into a KSEG0 + virtual index like
the _2way and mips3_FlushDCache(). This lets all mips3 cache ops accept
user virtual addresss w/o a tlb miss. Since this is now done in both
ICache flush routines, no need to do it in pmap.c. Fixed R4400
stability problems with setregs() cache flushing.
Revision 1.43: download - view: text, markup, annotated - select for diffs
Tue Jul 25 18:06:49 2000 UTC (24 years, 6 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.42: preferred, colored
Changes since revision 1.42: +7 -2
lines
Fix mips3 outofworld to panic cleanly even if shutdown path misses K2.
Previously we jal to panic which never cleared the tlb fault, so if
on the course of shutdown (like a doshutdownhooks() callback) missed
K2, it would panic again. Fix by setting EPC to panic() and eret.
Revision 1.42: download - view: text, markup, annotated - select for diffs
Tue Jul 25 17:56:06 2000 UTC (24 years, 6 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.41: preferred, colored
Changes since revision 1.41: +18 -12
lines
Add option to apply additional mask to the SR at run-time for MIPS3 platforms.
By default this is off, and only slightly changes the code to load SR when
a temp register is available. This can be used by the platform code to
handle slow to clear interrupts (our case) or to mask off any interrupt
any interrupt at run-time. This can be very useful for embedded platforms
that have less than desirable interrupt properties.
Revision 1.41: download - view: text, markup, annotated - select for diffs
Thu Jul 20 18:14:47 2000 UTC (24 years, 6 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.40: preferred, colored
Changes since revision 1.40: +6 -6
lines
Include kgdb hooks in trap.c. Include bits of DDB code for kgdb also. Remove
some local prototypes that are in headers now.
Revision 1.40: download - view: text, markup, annotated - select for diffs
Thu Jul 20 00:43:07 2000 UTC (24 years, 6 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.39: preferred, colored
Changes since revision 1.39: +3 -5
lines
Move masked status and instr into jal cpu_intr delay slot.
Revision 1.39: download - view: text, markup, annotated - select for diffs
Wed Jul 19 20:46:00 2000 UTC (24 years, 7 months ago) by jeffs
Branches: MAIN
Diff to: previous 1.38: preferred, colored
Changes since revision 1.38: +6 -14
lines
Improve outofworld: to include the vaddr. Removed unused mips3_Set64bit
and an #if 1.
Revision 1.38: download - view: text, markup, annotated - select for diffs
Mon Jun 26 02:55:47 2000 UTC (24 years, 7 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.37: preferred, colored
Changes since revision 1.37: +1 -56
lines
Abandon {mips1,mips3}_TBRPL()s which have little gain. They were
expected to be better than MachTLBUpdate(). After all, TLBUpdate()
is rather harmful and should be replaced with TBIS().
Revision 1.30.2.1: download - view: text, markup, annotated - select for diffs
Thu Jun 22 17:01:35 2000 UTC (24 years, 7 months ago) by minoura
Branches: minoura-xpg4dl
Diff to: previous 1.30: preferred, colored; next MAIN 1.31: preferred, colored
Changes since revision 1.30: +188 -174
lines
Sync w/ netbsd-1-5-base.
Revision 1.36.2.2: download - view: text, markup, annotated - select for diffs
Wed Jun 21 19:42:06 2000 UTC (24 years, 7 months ago) by soren
Branches: netbsd-1-5
Diff to: previous 1.36.2.1: preferred, colored; branchpoint 1.36: preferred, colored
Changes since revision 1.36.2.1: +2698 -0
lines
Pull up rev 1.37: Fix pasto.
Revision 1.37: download - view: text, markup, annotated - select for diffs
Wed Jun 21 19:39:32 2000 UTC (24 years, 7 months ago) by soren
Branches: MAIN
Diff to: previous 1.36: preferred, colored
Changes since revision 1.36: +2 -2
lines
Fix pasto.
Revision 1.36.2.1
Tue Jun 20 02:57:17 2000 UTC (24 years, 7 months ago) by soren
Branches: netbsd-1-5
FILE REMOVED
Changes since revision 1.36: +0 -2698
lines
file locore_mips3.S was added on branch netbsd-1-5 on 2000-06-21 19:42:06 +0000
Revision 1.36: download - view: text, markup, annotated - select for diffs
Tue Jun 20 02:57:17 2000 UTC (24 years, 7 months ago) by soren
Branches: MAIN
CVS tags: netbsd-1-5-base
Branch point for: netbsd-1-5
Diff to: previous 1.35: preferred, colored
Changes since revision 1.35: +16 -8
lines
Add mips3_write_config().
Revision 1.35: download - view: text, markup, annotated - select for diffs
Sat Jun 17 01:35:28 2000 UTC (24 years, 8 months ago) by cgd
Branches: MAIN
Diff to: previous 1.34: preferred, colored
Changes since revision 1.34: +124 -112
lines
put cache op #defines up at the top of the file, so all cache ops can
use them. Rename them to match the names in See Mips Run; they're not
as orthogonal as values or'd together might make you think... Finally,
actually use them for every bloody cache op.
Revision 1.34: download - view: text, markup, annotated - select for diffs
Fri Jun 9 06:07:01 2000 UTC (24 years, 8 months ago) by soda
Branches: MAIN
Diff to: previous 1.33: preferred, colored
Changes since revision 1.33: +3 -3
lines
Decrease MIPS3_TLB_WIRED_ENTRIES from 8 to 2,
and rename it to MIPS3_TLB_WIRED_UPAGES.
The value of wired register becomes variable on arc port,
and arc is the only mips3 port which uses the wired TLB entries 2..7.
Revision 1.33: download - view: text, markup, annotated - select for diffs
Fri Jun 9 04:28:17 2000 UTC (24 years, 8 months ago) by soda
Branches: MAIN
Diff to: previous 1.32: preferred, colored
Changes since revision 1.32: +2 -2
lines
typo in comment
Revision 1.32: download - view: text, markup, annotated - select for diffs
Tue Jun 6 17:41:11 2000 UTC (24 years, 8 months ago) by soren
Branches: MAIN
Diff to: previous 1.31: preferred, colored
Changes since revision 1.31: +47 -53
lines
Rename RM5200 cache ops to mips3_*_2way in anticipation of using them
for other CPUs with 2-way set associative L1 caches as well.
Revision 1.31: download - view: text, markup, annotated - select for diffs
Mon May 29 23:40:04 2000 UTC (24 years, 8 months ago) by simonb
Branches: MAIN
Diff to: previous 1.30: preferred, colored
Changes since revision 1.30: +42 -42
lines
A few more white-space bogons.
Revision 1.30: download - view: text, markup, annotated - select for diffs
Tue May 23 04:21:40 2000 UTC (24 years, 8 months ago) by soren
Branches: MAIN
CVS tags: minoura-xpg4dl-base
Branch point for: minoura-xpg4dl
Diff to: previous 1.29: preferred, colored
Changes since revision 1.29: +5 -20
lines
MachForceCacheUpdate and cacheflush_bug have never been used in NetBSD,
so remove references them, and do a little other cleanup.
Revision 1.29: download - view: text, markup, annotated - select for diffs
Sun May 21 03:23:16 2000 UTC (24 years, 8 months ago) by soren
Branches: MAIN
Diff to: previous 1.28: preferred, colored
Changes since revision 1.28: +2 -1
lines
Include opt_cputype.h.
Revision 1.28: download - view: text, markup, annotated - select for diffs
Wed May 17 12:44:48 2000 UTC (24 years, 9 months ago) by soren
Branches: MAIN
Diff to: previous 1.27: preferred, colored
Changes since revision 1.27: +17 -4
lines
mips5200_FlushCache(): flush L2 cache too.
Revision 1.27: download - view: text, markup, annotated - select for diffs
Wed May 10 01:34:15 2000 UTC (24 years, 9 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.26: preferred, colored
Changes since revision 1.26: +6 -0
lines
Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3. It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs. mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.
Revision 1.26: download - view: text, markup, annotated - select for diffs
Tue May 9 09:50:17 2000 UTC (24 years, 9 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.25: preferred, colored
Changes since revision 1.25: +56 -1
lines
Introduce mips3_TBRPL(); not used in this moment, to be useful to
discard MachTLBUpdate() calls, however, the necessity of TLB entry
modification in such a way is under question because implementation
glitches on ASID management was straightened, those calls can be
sanely removed after all.
Revision 1.25: download - view: text, markup, annotated - select for diffs
Fri Apr 21 14:14:55 2000 UTC (24 years, 9 months ago) by shin
Branches: MAIN
Diff to: previous 1.24: preferred, colored
Changes since revision 1.24: +15 -64
lines
delete unused function mips3_TLBReadVPS().
reorder insns to avoid mtc0/mfc0 hazard (for VR4100/R4700/RM52xx).
save/restore PageMask in mips3_TLBRead().
Revision 1.24: download - view: text, markup, annotated - select for diffs
Fri Apr 21 02:45:01 2000 UTC (24 years, 9 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.23: preferred, colored
Changes since revision 1.23: +7 -7
lines
Effort to have consistent comments, fixing one error.
Revision 1.23: download - view: text, markup, annotated - select for diffs
Fri Apr 21 02:39:55 2000 UTC (24 years, 9 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.22: preferred, colored
Changes since revision 1.22: +16 -5
lines
- Address PR#9907. u_pte[1] wired down is left not global sometimes.
The brokenness is revealed sporadorically by memory usage on runtime.
- Avoid Vr4100 incompatibilty by making sure to retain default pgMask
value for TLB invalidation routines.
Revision 1.22: download - view: text, markup, annotated - select for diffs
Wed Apr 12 01:05:35 2000 UTC (24 years, 10 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.21: preferred, colored
Changes since revision 1.21: +153 -163
lines
- Implement mips3_TBIAP().
- Remove obsoluted routines in locore_mips3.S
- addiu -> addu, andi -> and, ori -> or.
Revision 1.21: download - view: text, markup, annotated - select for diffs
Tue Apr 11 04:42:59 2000 UTC (24 years, 10 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.20: preferred, colored
Changes since revision 1.20: +5 -5
lines
Load delay slot is automagically adjusted at runtime since MIPS II
architecture.
Revision 1.20: download - view: text, markup, annotated - select for diffs
Tue Apr 11 02:30:17 2000 UTC (24 years, 10 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.19: preferred, colored
Changes since revision 1.19: +7 -5
lines
Introduce cpu_intr() whose body is now provided by target ports in
their own ways. Ugly fixup #define in machine/intr.h have gone.
mips_hardware_intr global variable patch work has gone.
Revision 1.19: download - view: text, markup, annotated - select for diffs
Mon Apr 10 04:59:47 2000 UTC (24 years, 10 months ago) by nisimura
Branches: MAIN
Diff to: previous 1.18: preferred, colored
Changes since revision 1.18: +51 -64
lines
Make (sure) ASID management same as what NetBSD/alpha does for ASN.
ASID#0 is reserved for pmap0 shared between proc0 and kthreads,
and every TLB for KSEG2 has G (global) bit to have wildcard match
regardless of the process' ASID. MIPS1 would flush TLBs belong
to user spaces upon ASID generation bump. Change for MIPS3 is
to be done.
Revision 1.18: download - view: text, markup, annotated - select for diffs
Sun Mar 19 19:16:13 2000 UTC (24 years, 11 months ago) by soren
Branches: MAIN
Diff to: previous 1.17: preferred, colored
Changes since revision 1.17: +282 -81
lines
Updated RM5231 cache code from Jeff Smith and Ethan Solomita at Geocast.
Many thanks.
Revision 1.17: download - view: text, markup, annotated - select for diffs
Sat Feb 19 01:56:21 2000 UTC (24 years, 11 months ago) by mycroft
Branches: MAIN
Diff to: previous 1.16: preferred, colored
Changes since revision 1.16: +2 -2
lines
Disable the sN,sp,gp register restore code for now, as it seems to collide with
something else.
Revision 1.16: download - view: text, markup, annotated - select for diffs
Fri Feb 18 00:15:15 2000 UTC (25 years ago) by mycroft
Branches: MAIN
Diff to: previous 1.15: preferred, colored
Changes since revision 1.15: +3 -3
lines
Make the MIPS1 and MIPS3 code more similar.
XXX Needs testing on MIPS1.
Revision 1.15: download - view: text, markup, annotated - select for diffs
Fri Feb 18 00:02:43 2000 UTC (25 years ago) by mycroft
Branches: MAIN
Diff to: previous 1.14: preferred, colored
Changes since revision 1.14: +17 -4
lines
Take a whack at allowing sN, sp and gp to be set from DDB, too.
Revision 1.10.6.1: download - view: text, markup, annotated - select for diffs
Mon Dec 27 18:32:48 1999 UTC (25 years, 1 month ago) by wrstuden
Branches: wrstuden-devbsize
Diff to: previous 1.10: preferred, colored; next MAIN 1.11: preferred, colored
Changes since revision 1.10: +23 -5
lines
Pull up to last week's -current.
Revision 1.14: download - view: text, markup, annotated - select for diffs
Wed Dec 22 05:54:18 1999 UTC (25 years, 1 month ago) by tsubai
Branches: MAIN
CVS tags: chs-ubc2-newbase
Diff to: previous 1.13: preferred, colored
Changes since revision 1.13: +27 -21
lines
* news5000 support.
* mips3_VCE[DI] now support L2CacheLSize != 32.
Revision 1.13: download - view: text, markup, annotated - select for diffs
Tue Nov 30 11:53:24 1999 UTC (25 years, 2 months ago) by shin
Branches: MAIN
CVS tags: wrstuden-devbsize-base,
wrstuden-devbsize-19991221
Diff to: previous 1.12: preferred, colored
Changes since revision 1.12: +2 -2
lines
reorder instructions in mips3_TLBFlush() to avoid coprocessor hazard
for R4600/R4700/VR4100.
Revision 1.10.4.1: download - view: text, markup, annotated - select for diffs
Mon Nov 15 00:38:40 1999 UTC (25 years, 3 months ago) by fvdl
Branches: fvdl-softdep
Diff to: previous 1.10: preferred, colored; next MAIN 1.11: preferred, colored
Changes since revision 1.10: +22 -4
lines
Sync with -current
Revision 1.12: download - view: text, markup, annotated - select for diffs
Sat Nov 6 17:35:55 1999 UTC (25 years, 3 months ago) by mhitch
Branches: MAIN
CVS tags: fvdl-softdep-base
Diff to: previous 1.11: preferred, colored
Changes since revision 1.11: +21 -3
lines
Try to document the use of the XContext register in the TLBMiss and XTLBMiss
exception handlers.
Revision 1.11: download - view: text, markup, annotated - select for diffs
Fri Oct 29 03:36:18 1999 UTC (25 years, 3 months ago) by simonb
Branches: MAIN
CVS tags: comdex-fall-1999-base,
comdex-fall-1999
Diff to: previous 1.10: preferred, colored
Changes since revision 1.10: +2 -2
lines
Fix cut'n'pasto in comment.
Revision 1.10: download - view: text, markup, annotated - select for diffs
Sat Sep 25 00:00:39 1999 UTC (25 years, 4 months ago) by shin
Branches: MAIN
Branch point for: wrstuden-devbsize,
thorpej_scsipi,
fvdl-softdep
Diff to: previous 1.9: preferred, colored
Changes since revision 1.9: +17 -2
lines
Changes for NetBSD/hpcmips.
Support VR4100.
Support 16KB page.
Support CPU without FPU.
Fix virtual alias problem(physio() case).
[new options]
options MIPS3_4100 /* VR4100 core */
options MIPS_16K_PAGE /* enable kernel support for 16k pages */
options SOFTFLOAT /* No FPU; avoid touching FPU registers */
Revision 1.8.4.1: download - view: text, markup, annotated - select for diffs
Mon Jun 21 00:52:08 1999 UTC (25 years, 7 months ago) by thorpej
Branches: chs-ubc2
Diff to: previous 1.8: preferred, colored; next MAIN 1.9: preferred, colored
Changes since revision 1.8: +24 -24
lines
Sync w/ -current.
Revision 1.9: download - view: text, markup, annotated - select for diffs
Sat Apr 24 08:10:40 1999 UTC (25 years, 9 months ago) by simonb
Branches: MAIN
CVS tags: chs-ubc2-base
Diff to: previous 1.8: preferred, colored
Changes since revision 1.8: +24 -24
lines
Nuke register and remove trailling white space.
Revision 1.8: download - view: text, markup, annotated - select for diffs
Tue Mar 30 14:27:56 1999 UTC (25 years, 10 months ago) by soda
Branches: MAIN
CVS tags: netbsd-1-4-base,
netbsd-1-4-RELEASE,
netbsd-1-4-PATCH003,
netbsd-1-4-PATCH002,
netbsd-1-4-PATCH001,
netbsd-1-4,
kame_14_19990705,
kame_14_19990628,
kame_141_19991130,
kame
Branch point for: chs-ubc2
Diff to: previous 1.7: preferred, colored
Changes since revision 1.7: +2 -2
lines
ALIAS() is not needed, use XLEAF() or XNESTED() instead
Revision 1.7: download - view: text, markup, annotated - select for diffs
Mon Feb 22 00:21:39 1999 UTC (25 years, 11 months ago) by jonathan
Branches: MAIN
Diff to: previous 1.6: preferred, colored
Changes since revision 1.6: +4 -4
lines
Cannot do mcount() profiling in TLB exception-handler code.
Revision 1.6: download - view: text, markup, annotated - select for diffs
Tue Feb 16 05:06:27 1999 UTC (26 years ago) by jonathan
Branches: MAIN
Diff to: previous 1.5: preferred, colored
Changes since revision 1.5: +10 -13
lines
Add VECTOR() and VECTOR_END() macros for declaring exception-vector
code. Fold in <xxx>End names used to copy exception code to vector
locations. Use in mips3 locore code.
Revision 1.5: download - view: text, markup, annotated - select for diffs
Fri Jan 29 16:10:06 1999 UTC (26 years ago) by castor
Branches: MAIN
Diff to: previous 1.4: preferred, colored
Changes since revision 1.4: +7 -7
lines
Copy previous fix for TLB miss routine to XTLB miss routine to avoid
processor-dependent behavior in 32-bit ops on 64-bit operands.
Revision 1.4: download - view: text, markup, annotated - select for diffs
Thu Jan 28 18:37:02 1999 UTC (26 years ago) by mhitch
Branches: MAIN
Diff to: previous 1.3: preferred, colored
Changes since revision 1.3: +13 -15
lines
Fix the TLBMiss handler to not use an undefined operation (32 bit operation
on 64 bit register that's not correctly signed extended. The R4x00 support
works again on DECstations. A similar change to the XTLBMiss handler probably
needs to be made, but I have not done that since I am unable to test any
changes to that.
Also re-order a couple of instructions to allow for delay with mfc0.
Revision 1.3: download - view: text, markup, annotated - select for diffs
Sat Jan 16 08:45:53 1999 UTC (26 years, 1 month ago) by nisimura
Branches: MAIN
Diff to: previous 1.2: preferred, colored
Changes since revision 1.2: +12 -25
lines
- Make cpu_switch() a normal call; formally it was splitted into halves.
- Fix an error in mips3_cpu_switch_resume(); ASID was not set correctly.
- Remove global variable 'curpcb' reference in mips1_proc_trampoline().
- Restore 'cpuregs.h'.
Revision 1.2: download - view: text, markup, annotated - select for diffs
Fri Jan 15 01:23:14 1999 UTC (26 years, 1 month ago) by castor
Branches: MAIN
Diff to: previous 1.1: preferred, colored
Changes since revision 1.1: +2448 -0
lines
* Elimination of UADDR/KERNELSTACK
Affected files:
include/mips_param.h, include/pcb.h,
mips/locore_mips1.S, mips/locore_mips3.S,
mips/mips_machdep.c, mips/vm_machdep.c
Issue:
So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack. USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.
"Doubly mapped" USPACE complicates context switch. Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access. It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.
Solution:
Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values. Kernel stack bottom is located at
'curproc->p_addr + USPACE'. Context switch is simplified as it unloads
half of TLB hardwiring burden. It just manages the unique KSEG2 address
of each USPACE to be wired. As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore. It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.
* Extensive use of 'genassym.cf'
To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects. This change will contribute possible NetBSD/mips64
portability too.
* Separation and rename of locore_r2000/_r4000.S
Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.
* Changes in kernel mode exception handlers
Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing. This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'. Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.
* Relocation of exception frame
User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)' This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.
* Refurblished DDB backtrace routine
It's a growing concern to maintain stacktrace() code correctly. It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.
New backtrace code searchs for certain instructions peculiar to any of
function tails. Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.
* Support for 64-bit safe user code
Affected Files:
${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
include/setjmp.h mips/include/[lots] mips/mips/[lots]
Solution:
We define macros REG_L/REG_S and SZREG for loading and storing
registers and for the size of registers. The exact meaning
of these is controlled by a macro (currently _MIPS64) which
allows one to treat the registers as either 32-bit or 64-bit.
There are data types mips_reg_t and mips_fpreg_t which represent
the true register sizes, and avoid confusing register_t.
We needed a way to dynamically gen the structure sizes of things
like sigcontext for setjmp.h, so we defined a pubassym.cf for
libc routines like setjmp and longjmp.
NetBSD/mips allows ${ARCH}'s to be defined which preserve
all 64-bits of registers across user context switches. There
are still a few niceties to clean up for kernel mode context
switches.
* Support for QED 52xx processors
Affected Files:
mips/locore_mips3.S mips/pmap.c include/locore.h
Issue:
The QED 52xx family of processors are targeted at low cost
embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
etc. We have added preliminary support for some of the idiosyncrasies
of this processor, e.g. no L2 cache, etc. More work needs to be
done here because with a modest 2-way L1 cache, some of the rampant
flushing has significant performance implications. However,
it doesn't crash, which is a start.
Solution:
A routine for flushing the cache based on virtual addresses was added;
a routine which deals with the two-way set associativity of the
5230 L1 cache was added, accomodations to 5230's instruction hazards
were added.
* TLB Miss code for mips3/mips4 processors cleaned up significantly.
Affected Files:
mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
Issue:
The TLB Miss handler exceeded the allowed size, which wasn't
a problem because there was no handler for when the processor
was in 64-bit mode. The handler for invalid TLB exceptions
also appears to have much vestigial code, which made it
difficult to understand.
Solution:
Use the XCONTEXT register to store a pointer to the segment
map table, this coupled with removing some dead code allows
the handlers to fit.
Revision 1.1.2.2: download - view: text, markup, annotated - select for diffs
Mon Nov 16 10:41:31 1998 UTC (26 years, 3 months ago) by nisimura
Branches: nisimura-pmax-wscons
Diff to: previous 1.1.2.1: preferred, colored; next MAIN 1.2: preferred, colored
Changes since revision 1.1.2.1: +148 -147
lines
- Step forward to MIPS64 support. Incorporate partially Caster Fu's
patches. Still some work is missing to satisfy his QED 5230 port.
- More symbolic definitions in genassym.cf which improve possible 64bit-ness
of locore_mips{1,3}.S.
- Fix mips3 L1 cache line size detection logic in cpuarch.h as pointed by
Caster.
- Fix a bug in proc_trampoline() code in locore_mips3.S as pointed by Caster.
- Replace vm_offset_t with vaddr_t/paddr_t entirely. Note that
NetBSD/newsmips has purged vm_offset_t too.
- Synchronize various files according to recent changes made in main trunk.
Revision 1.1.2.1: download - view: text, markup, annotated - select for diffs
Thu Oct 15 03:19:54 1998 UTC (26 years, 4 months ago) by nisimura
Branches: nisimura-pmax-wscons
Diff to: previous 1.1: preferred, colored
Changes since revision 1.1: +2343 -0
lines
- locore_mips1.S and locore_mips3.S are free standing files indepedent from
locore.S.
Revision 1.1
Thu Oct 15 03:19:54 1998 UTC (26 years, 4 months ago) by nisimura
Branches: MAIN
Branch point for: nisimura-pmax-wscons
FILE REMOVED
file locore_mips3.S was initially added on branch nisimura-pmax-wscons.
CVSweb <webmaster@jp.NetBSD.org>