CVS log for src/sys/arch/mips/mips/locore_mips1.S

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Default branch: MAIN
Current tag: MAIN

Revision 1.99 / (download) - annotate - [select for diffs], Fri Feb 9 22:08:32 2024 UTC (2 months, 1 week ago) by andvar
Branch: MAIN
CVS Tags: HEAD
Changes since 1.98: +3 -3 lines
Diff to previous 1.98 (colored)

fix spelling mistakes, mainly in comments and log messages.

Revision 1.98 / (download) - annotate - [select for diffs], Sun Mar 13 22:18:56 2022 UTC (2 years, 1 month ago) by andvar
Branch: MAIN
CVS Tags: thorpej-ifq-base, thorpej-ifq, thorpej-altq-separation-base, thorpej-altq-separation, netbsd-10-base, netbsd-10-0-RELEASE, netbsd-10-0-RC6, netbsd-10-0-RC5, netbsd-10-0-RC4, netbsd-10-0-RC3, netbsd-10-0-RC2, netbsd-10-0-RC1, netbsd-10, bouyer-sunxi-drm-base, bouyer-sunxi-drm
Changes since 1.97: +3 -3 lines
Diff to previous 1.97 (colored)

s/entreed/entered/

Revision 1.97 / (download) - annotate - [select for diffs], Sun Mar 13 17:50:55 2022 UTC (2 years, 1 month ago) by andvar
Branch: MAIN
Changes since 1.96: +3 -3 lines
Diff to previous 1.96 (colored)

s/hander/handler/ and s/hader/header/ in comments and documentation.

Revision 1.96 / (download) - annotate - [select for diffs], Sun Sep 19 10:34:09 2021 UTC (2 years, 7 months ago) by andvar
Branch: MAIN
Changes since 1.95: +3 -3 lines
Diff to previous 1.95 (colored)

fix various typos in comments, messages and documentation.

Revision 1.95 / (download) - annotate - [select for diffs], Sat Aug 22 05:52:00 2020 UTC (3 years, 7 months ago) by simonb
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex2-base, thorpej-futex2, thorpej-futex-base, thorpej-futex, thorpej-cfargs2-base, thorpej-cfargs2, thorpej-cfargs-base, thorpej-cfargs, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.94: +4 -4 lines
Diff to previous 1.94 (colored)

Change previous LP64 check to n32/n64.

Revision 1.94 / (download) - annotate - [select for diffs], Sat Aug 22 05:32:11 2020 UTC (3 years, 7 months ago) by simonb
Branch: MAIN
Changes since 1.93: +5 -2 lines
Diff to previous 1.93 (colored)

Explicitly #error if this is compiled with _LP64.

Revision 1.93 / (download) - annotate - [select for diffs], Thu Jun 8 05:46:57 2017 UTC (6 years, 10 months ago) by skrll
Branch: MAIN
CVS Tags: tls-maxphys-base-20171202, phil-wifi-base, phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, phil-wifi-20191119, phil-wifi-20190609, phil-wifi, pgoyette-compat-merge-20190127, pgoyette-compat-base, pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906, pgoyette-compat-0728, pgoyette-compat-0625, pgoyette-compat-0521, pgoyette-compat-0502, pgoyette-compat-0422, pgoyette-compat-0415, pgoyette-compat-0407, pgoyette-compat-0330, pgoyette-compat-0322, pgoyette-compat-0315, pgoyette-compat, perseant-stdc-iso10646-base, perseant-stdc-iso10646, nick-nhusb-base-20170825, netbsd-9-base, netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1, netbsd-9, isaki-audio2-base, isaki-audio2, is-mlppp-base, is-mlppp, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh, ad-namecache-base3, ad-namecache-base2, ad-namecache-base1, ad-namecache-base, ad-namecache
Changes since 1.92: +3 -2 lines
Diff to previous 1.92 (colored)

Add a missing ".set at" to make previous build

Revision 1.92 / (download) - annotate - [select for diffs], Wed Jun 7 08:45:51 2017 UTC (6 years, 10 months ago) by skrll
Branch: MAIN
Changes since 1.91: +5 -4 lines
Diff to previous 1.91 (colored)

fix tlb_record_asids 2nd arg to match usage - it's a maximum asid value
and not a mask

Revision 1.91 / (download) - annotate - [select for diffs], Wed Jul 27 09:32:35 2016 UTC (7 years, 8 months ago) by skrll
Branch: MAIN
CVS Tags: prg-localcount2-base3, prg-localcount2-base2, prg-localcount2-base1, prg-localcount2-base, prg-localcount2, pgoyette-localcount-20170426, pgoyette-localcount-20170320, pgoyette-localcount-20170107, pgoyette-localcount-20161104, pgoyette-localcount-20160806, nick-nhusb-base-20170204, nick-nhusb-base-20161204, nick-nhusb-base-20161004, netbsd-8-base, localcount-20160914, jdolecek-ncq-base, jdolecek-ncq, bouyer-socketcan-base1, bouyer-socketcan-base, bouyer-socketcan
Branch point for: netbsd-8
Changes since 1.90: +3 -1 lines
Diff to previous 1.90 (colored)

Sprinle RCSID

Revision 1.90 / (download) - annotate - [select for diffs], Thu Jul 21 12:17:07 2016 UTC (7 years, 9 months ago) by skrll
Branch: MAIN
CVS Tags: pgoyette-localcount-20160726
Changes since 1.89: +2 -2 lines
Diff to previous 1.89 (colored)

Fix typo in comment

Revision 1.89 / (download) - annotate - [select for diffs], Mon Jul 11 19:01:55 2016 UTC (7 years, 9 months ago) by skrll
Branch: MAIN
CVS Tags: pgoyette-localcount-base
Branch point for: pgoyette-localcount
Changes since 1.88: +2 -2 lines
Diff to previous 1.88 (colored)

Correct a comment

Revision 1.88 / (download) - annotate - [select for diffs], Mon Jul 11 16:15:36 2016 UTC (7 years, 9 months ago) by matt
Branch: MAIN
Changes since 1.87: +133 -145 lines
Diff to previous 1.87 (colored)

Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch

Revision 1.87 / (download) - annotate - [select for diffs], Mon Jul 4 15:52:31 2016 UTC (7 years, 9 months ago) by dholland
Branch: MAIN
CVS Tags: nick-nhusb-base-20160907
Changes since 1.86: +6 -2 lines
Diff to previous 1.86 (colored)

More of previous, so both kern_intr and user_intr have the comment.

Revision 1.86 / (download) - annotate - [select for diffs], Mon Jul 4 15:47:04 2016 UTC (7 years, 9 months ago) by dholland
Branch: MAIN
Changes since 1.85: +8 -3 lines
Diff to previous 1.85 (colored)

Improve comments after some discussion with Nick.

Revision 1.85 / (download) - annotate - [select for diffs], Thu Jun 11 07:30:10 2015 UTC (8 years, 10 months ago) by matt
Branch: MAIN
CVS Tags: nick-nhusb-base-20160529, nick-nhusb-base-20160422, nick-nhusb-base-20160319, nick-nhusb-base-20151226, nick-nhusb-base-20150921
Changes since 1.84: +1 -2 lines
Diff to previous 1.84 (colored)

Don't include <machine/param.h> in .S files, get the needed values from assym.h
Define NBPG as UL to avoid integer over with NBXSEG on LP64 systems.
(.S files don't like numbers with UL appended to them).

Remove COMPAT_SA / KERN_SA.  Welcome to 6.99.3!
Approved by core@.

Revision 1.83 / (download) - annotate - [select for diffs], Fri Dec 23 10:01:33 2011 UTC (12 years, 3 months ago) by tsutsui
Branch: MAIN
CVS Tags: netbsd-6-base, netbsd-6-1-RELEASE, netbsd-6-1-RC4, netbsd-6-1-RC3, netbsd-6-1-RC2, netbsd-6-1-RC1, netbsd-6-1-5-RELEASE, netbsd-6-1-4-RELEASE, netbsd-6-1-3-RELEASE, netbsd-6-1-2-RELEASE, netbsd-6-1-1-RELEASE, netbsd-6-1, netbsd-6-0-RELEASE, netbsd-6-0-RC2, netbsd-6-0-RC1, netbsd-6-0-6-RELEASE, netbsd-6-0-5-RELEASE, netbsd-6-0-4-RELEASE, netbsd-6-0-3-RELEASE, netbsd-6-0-2-RELEASE, netbsd-6-0-1-RELEASE, netbsd-6-0, netbsd-6, matt-nb6-plus-nbase, matt-nb6-plus-base, matt-nb6-plus, jmcneill-usbmp-base2
Changes since 1.82: +13 -5 lines
Diff to previous 1.82 (colored)

- use correct ASID bits in MIPS_COP_0_TLB_HI
- save/restore current PID in tlb_invalidate_all() and cpu_switch_resume()
  as mipsX_subr.S does

Revision 1.82 / (download) - annotate - [select for diffs], Sat May 7 19:15:48 2011 UTC (12 years, 11 months ago) by tsutsui
Branch: MAIN
CVS Tags: yamt-pagecache-base3, yamt-pagecache-base2, yamt-pagecache-base, rmind-uvmplock-nbase, rmind-uvmplock-base, jmcneill-usbmp-pre-base2, jmcneill-usbmp-base, jmcneill-audiomp3-base, jmcneill-audiomp3, cherry-xenmp-base, cherry-xenmp
Branch point for: yamt-pagecache, jmcneill-usbmp
Changes since 1.81: +2 -2 lines
Diff to previous 1.81 (colored)

Use a correct register to save/restore MIPS_COP_0_TLB_HI in
mips1_tlb_record_asids().

Revision 1.81 / (download) - annotate - [select for diffs], Sat May 7 18:16:54 2011 UTC (12 years, 11 months ago) by tsutsui
Branch: MAIN
Changes since 1.80: +6 -6 lines
Diff to previous 1.80 (colored)

Tweak some comments in mipsN_tlb_record_asids() to reduce diffs.

Revision 1.80 / (download) - annotate - [select for diffs], Sat May 7 17:52:43 2011 UTC (12 years, 11 months ago) by tsutsui
Branch: MAIN
Changes since 1.79: +18 -18 lines
Diff to previous 1.79 (colored)

Remove trailing spaces and tabs.

Revision 1.79 / (download) - annotate - [select for diffs], Sat May 7 17:47:34 2011 UTC (12 years, 11 months ago) by tsutsui
Branch: MAIN
Changes since 1.78: +14 -14 lines
Diff to previous 1.78 (colored)

Fix misc comments.

Revision 1.78 / (download) - annotate - [select for diffs], Thu Apr 14 05:50:43 2011 UTC (13 years ago) by cliff
Branch: MAIN
CVS Tags: jym-xensuspend-nbase, jym-xensuspend-base
Changes since 1.77: +8 -7 lines
Diff to previous 1.77 (colored)

- add loocoresw slot for lsw_cpu_run
- fix comments for locoresw entries

Revision 1.77 / (download) - annotate - [select for diffs], Wed Apr 6 14:12:36 2011 UTC (13 years ago) by tsutsui
Branch: MAIN
Changes since 1.76: +6 -6 lines
Diff to previous 1.76 (colored)

Sync with mipsX_subr.S:
>> Rename kernel_tlb_miss to kern_tlb_miss (everything else kern_xxx)

Revision 1.76 / (download) - annotate - [select for diffs], Wed Apr 6 05:39:51 2011 UTC (13 years ago) by matt
Branch: MAIN
Changes since 1.75: +18 -20 lines
Diff to previous 1.75 (colored)

Load pc into ta0 instead of ra and then saving to ta0.
misc comments fixes.

Revision 1.75 / (download) - annotate - [select for diffs], Tue Mar 8 15:12:46 2011 UTC (13 years, 1 month ago) by tsutsui
Branch: MAIN
Changes since 1.74: +5 -3 lines
Diff to previous 1.74 (colored)

Pass correct exception PC value to cpu_intr() as mipsX_subr.S does.
Fixes SIGILL on all FPU exceptions on R3000.

XXX: cpu_intr() may require cause value as mentioned in PR port-mips/44639

Revision 1.74 / (download) - annotate - [select for diffs], Tue Mar 8 15:05:40 2011 UTC (13 years, 1 month ago) by tsutsui
Branch: MAIN
Changes since 1.73: +13 -1 lines
Diff to previous 1.73 (colored)

Sprinkle NOPs to avoid load delay hazard on R3000.

Revision 1.73 / (download) - annotate - [select for diffs], Sun Feb 20 07:45:47 2011 UTC (13 years, 2 months ago) by matt
Branch: MAIN
CVS Tags: bouyer-quota2-nbase
Changes since 1.72: +1290 -900 lines
Diff to previous 1.72 (colored)

Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU

Revision 1.72 / (download) - annotate - [select for diffs], Wed Jan 26 01:18:54 2011 UTC (13 years, 2 months ago) by pooka
Branch: MAIN
CVS Tags: uebayasi-xip-base7, bouyer-quota2-base
Changes since 1.71: +39 -3 lines
Diff to previous 1.71 (colored)

Add support for the Extensible MIPS ("eMIPS") platform.  The
NetBSD/emips port runs on Xilinx and Beecube FPGA systems and the
Giano system simulator.

eMIPS is a platform developed at Microsoft Research for researching
reconfigurable computing.  eMIPS allows dynamic loading and scheduling
of application-specific circuits for the purpose of accelerating
computations based on the current workload.

NetBSD eMIPS support for NetBSD 4.x was written at Microsoft Research
by Alessandro Forin and Neil Pittman.  Microsoft Corporation has
donated full copyright to The NetBSD Foundation.

Platform support for eMIPS is the first part of Microsoft's
contribution.  The second part includes the hardware accelerator
framework and will be proposed on tech-kern soon.

Revision 1.71 / (download) - annotate - [select for diffs], Wed Dec 22 01:34:17 2010 UTC (13 years, 4 months ago) by nisimura
Branch: MAIN
CVS Tags: matt-mips64-premerge-20101231, jruoho-x86intr-base
Branch point for: jruoho-x86intr, bouyer-quota2
Changes since 1.70: +3 -4 lines
Diff to previous 1.70 (colored)

- make sure cpu_switchto() not to touch MIPS_CURLWP register at newlwp
  switchframe restoration stage.
- discard MIPS_CURLWP assignments exposed in cpu_lwp_fork() and
  cpu_setfunc().
- use plain 'jal' instruction to call lwp_startup().

Revision 1.70 / (download) - annotate - [select for diffs], Thu Nov 25 17:53:24 2010 UTC (13 years, 4 months ago) by matt
Branch: MAIN
Changes since 1.69: +4 -4 lines
Diff to previous 1.69 (colored)

Save t0-t2 on MIPS1 syscalls.

Revision 1.69 / (download) - annotate - [select for diffs], Wed Nov 10 01:49:00 2010 UTC (13 years, 5 months ago) by dholland
Branch: MAIN
CVS Tags: uebayasi-xip-base6
Changes since 1.68: +4 -3 lines
Diff to previous 1.68 (colored)

Amplify comments per thread in source-changes-d about the previous
commit to this file: we must restore the PID value (that is, the
current address space ID) before touching memory, or the memory writes
might go to arbitrary wrong places or fault.

I'm not completely convinced this function (or other functions in this
file) are handling pipeline hazards safely, but I don't have
authoritative mips1 documentation any more so I'm not going to meddle.

Revision 1.68 / (download) - annotate - [select for diffs], Mon Nov 8 18:09:38 2010 UTC (13 years, 5 months ago) by pooka
Branch: MAIN
CVS Tags: uebayasi-xip-base5
Changes since 1.67: +4 -4 lines
Diff to previous 1.67 (colored)

In TLBRead, restore PID before doing the saves so that the caller's
TLB entries are used instead of the PID given as the argument.

from Alessandro Forin

Revision 1.67 / (download) - annotate - [select for diffs], Mon Dec 14 00:46:06 2009 UTC (14 years, 4 months ago) by matt
Branch: MAIN
CVS Tags: yamt-nfs-mp-base9, yamt-nfs-mp-base11, yamt-nfs-mp-base10, uebayasi-xip-base4, uebayasi-xip-base3, uebayasi-xip-base2, uebayasi-xip-base1, uebayasi-xip-base
Branch point for: uebayasi-xip, rmind-uvmplock
Changes since 1.66: +3 -3 lines
Diff to previous 1.66 (colored)

Merge from matt-nb5-mips64
Merge mips-specific arch files.

Revision 1.66 / (download) - annotate - [select for diffs], Thu Dec 10 05:10:02 2009 UTC (14 years, 4 months ago) by rmind
Branch: MAIN
CVS Tags: matt-premerge-20091211
Changes since 1.65: +7 -7 lines
Diff to previous 1.65 (colored)

Rename L_ADDR to L_PCB and amend some comments accordingly.

Revision 1.65 / (download) - annotate - [select for diffs], Sat May 30 18:26:06 2009 UTC (14 years, 10 months ago) by martin
Branch: MAIN
CVS Tags: yamt-nfs-mp-base8, yamt-nfs-mp-base7, yamt-nfs-mp-base6, yamt-nfs-mp-base5, jymxensuspend-base
Changes since 1.64: +17 -1 lines
Diff to previous 1.64 (colored)

Do not use the same trampoline for cpu_lwp_fork and cpu_setfunc - only
the former needs to call lwp_startup().

Revision 1.64 / (download) - annotate - [select for diffs], Sat Jan 26 14:40:08 2008 UTC (16 years, 2 months ago) by tsutsui
Branch: MAIN
CVS Tags: yamt-pf42-baseX, yamt-pf42-base4, yamt-pf42-base3, yamt-pf42-base2, yamt-pf42-base, yamt-pf42, yamt-nfs-mp-base4, yamt-nfs-mp-base3, yamt-nfs-mp-base2, yamt-nfs-mp-base, yamt-lazymbuf-base15, yamt-lazymbuf-base14, wrstuden-revivesa-base-4, wrstuden-revivesa-base-3, wrstuden-revivesa-base-2, wrstuden-revivesa-base-1, wrstuden-revivesa-base, wrstuden-revivesa, simonb-wapbl-nbase, simonb-wapbl-base, simonb-wapbl, nick-net80211-sync-base, nick-net80211-sync, nick-hppapmap-base4, nick-hppapmap-base3, nick-hppapmap-base2, nick-hppapmap-base, nick-hppapmap, netbsd-5-base, netbsd-5-0-RELEASE, netbsd-5-0-RC4, netbsd-5-0-RC3, netbsd-5-0-RC2, netbsd-5-0-RC1, mjf-devfs2-base, mjf-devfs2, mjf-devfs-base, matt-mips64-base2, matt-armv6-nbase, keiichi-mipv6-nbase, keiichi-mipv6-base, keiichi-mipv6, jym-xensuspend, hpcarm-cleanup-nbase, hpcarm-cleanup-base, haad-nbase2, haad-dm-base2, haad-dm-base1, haad-dm-base, haad-dm, ad-socklock-base1, ad-audiomp2-base, ad-audiomp2
Branch point for: yamt-nfs-mp, netbsd-5-0, netbsd-5
Changes since 1.63: +4 -1 lines
Diff to previous 1.63 (colored)

Make these TX39xx stuff compile without "-mips2" option.
TX39xx has a sync instruction, but it doesn't support all mips2 instructions.

Revision 1.63 / (download) - annotate - [select for diffs], Wed Oct 17 19:55:38 2007 UTC (16 years, 6 months ago) by garbled
Branch: MAIN
CVS Tags: yamt-x86pmap-base4, yamt-kmem-base3, yamt-kmem-base2, yamt-kmem-base, yamt-kmem, vmlocking2-base3, vmlocking2-base2, vmlocking2-base1, vmlocking2, vmlocking-nbase, reinoud-bufcleanup-nbase, reinoud-bufcleanup-base, matt-armv6-base, jmcneill-pm-base, jmcneill-base, cube-autoconf-base, cube-autoconf, bouyer-xeni386-nbase, bouyer-xeni386-merge1, bouyer-xeni386-base, bouyer-xeni386, bouyer-xenamd64-base2, bouyer-xenamd64-base
Branch point for: mjf-devfs
Changes since 1.62: +1 -1 lines
Diff to previous 1.62 (colored)

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Revision 1.62 / (download) - annotate - [select for diffs], Thu May 17 14:51:24 2007 UTC (16 years, 11 months ago) by yamt
Branch: MAIN
CVS Tags: yamt-x86pmap-base3, yamt-x86pmap-base2, yamt-x86pmap-base, yamt-x86pmap, vmlocking-base, ppcoea-renovation-base, nick-csl-alignment-base5, nick-csl-alignment-base, nick-csl-alignment, mjf-ufs-trans-base, matt-mips64-base, matt-mips64, jmcneill-pm, hpcarm-cleanup, bouyer-xenamd64
Branch point for: matt-armv6
Changes since 1.61: +39 -26 lines
Diff to previous 1.61 (colored)

merge yamt-idlelwp branch.  asked by core@.  some ports still needs work.

from doc/BRANCHES:

	idle lwp, and some changes depending on it.

	1. separate context switching and thread scheduling.
	   (cf. gmcgarry_ctxsw)
	2. implement idle lwp.
	3. clean up related MD/MI interfaces.
	4. make scheduler(s) modular.

Revision 1.61 / (download) - annotate - [select for diffs], Fri Feb 9 21:55:06 2007 UTC (17 years, 2 months ago) by ad
Branch: MAIN
CVS Tags: yamt-idlelwp-base8, thorpej-atomic-base, thorpej-atomic, reinoud-bufcleanup, post-newlock2-merge, ad-audiomp-base, ad-audiomp
Branch point for: yamt-idlelwp, vmlocking, ppcoea-renovation, mjf-ufs-trans
Changes since 1.60: +43 -26 lines
Diff to previous 1.60 (colored)

Merge newlock2 to head.

Revision 1.60 / (download) - annotate - [select for diffs], Tue Jan 3 02:11:57 2006 UTC (18 years, 3 months ago) by rumble
Branch: MAIN
CVS Tags: yamt-uio_vmspace-base5, yamt-splraiseipl-base5, yamt-splraiseipl-base4, yamt-splraiseipl-base3, yamt-splraiseipl-base2, yamt-splraiseipl-base, yamt-splraiseipl, yamt-pdpolicy-base9, yamt-pdpolicy-base8, yamt-pdpolicy-base7, yamt-pdpolicy-base6, yamt-pdpolicy-base5, yamt-pdpolicy-base4, yamt-pdpolicy-base3, yamt-pdpolicy-base2, yamt-pdpolicy-base, yamt-pdpolicy, wrstuden-fixsa-base-1, simonb-timecounters-base, simonb-timecounters, simonb-timcounters-final, rpaulo-netinet-merge-pcb-base, rpaulo-netinet-merge-pcb, peter-altq-base, peter-altq, newlock2-nbase, newlock2-base, netbsd-4-base, netbsd-4-0-RELEASE, netbsd-4-0-RC5, netbsd-4-0-RC4, netbsd-4-0-RC3, netbsd-4-0-RC2, netbsd-4-0-RC1, netbsd-4-0-1-RELEASE, netbsd-4-0, matt-nb4-arm-base, matt-nb4-arm, gdamore-uart-base, gdamore-uart, elad-kernelauth-base, elad-kernelauth, chap-midi-nbase, chap-midi-base, chap-midi, abandoned-netbsd-4-base, abandoned-netbsd-4
Branch point for: wrstuden-fixsa, newlock2, netbsd-4
Changes since 1.59: +2 -2 lines
Diff to previous 1.59 (colored)

Fix a little comment typo.

Revision 1.59 / (download) - annotate - [select for diffs], Sun Dec 11 12:18:09 2005 UTC (18 years, 4 months ago) by christos
Branch: MAIN
Branch point for: yamt-uio_vmspace
Changes since 1.58: +1 -1 lines
Diff to previous 1.58 (colored)

merge ktrace-lwp.

Revision 1.58 / (download) - annotate - [select for diffs], Thu Aug 7 16:28:32 2003 UTC (20 years, 8 months ago) by agc
Branch: MAIN
CVS Tags: yamt-vop-base3, yamt-vop-base2, yamt-vop-base, yamt-vop, yamt-readahead-pervnode, yamt-readahead-perfile, yamt-readahead-base3, yamt-readahead-base2, yamt-readahead-base, yamt-readahead, yamt-km-base4, yamt-km-base3, yamt-km-base2, yamt-km-base, yamt-km, thorpej-vnode-attr-base, thorpej-vnode-attr, netbsd-3-base, netbsd-3-1-RELEASE, netbsd-3-1-RC4, netbsd-3-1-RC3, netbsd-3-1-RC2, netbsd-3-1-RC1, netbsd-3-1-1-RELEASE, netbsd-3-1, netbsd-3-0-RELEASE, netbsd-3-0-RC6, netbsd-3-0-RC5, netbsd-3-0-RC4, netbsd-3-0-RC3, netbsd-3-0-RC2, netbsd-3-0-RC1, netbsd-3-0-3-RELEASE, netbsd-3-0-2-RELEASE, netbsd-3-0-1-RELEASE, netbsd-3-0, netbsd-3, netbsd-2-base, netbsd-2-1-RELEASE, netbsd-2-1-RC6, netbsd-2-1-RC5, netbsd-2-1-RC4, netbsd-2-1-RC3, netbsd-2-1-RC2, netbsd-2-1-RC1, netbsd-2-1, netbsd-2-0-base, netbsd-2-0-RELEASE, netbsd-2-0-RC5, netbsd-2-0-RC4, netbsd-2-0-RC3, netbsd-2-0-RC2, netbsd-2-0-RC1, netbsd-2-0-3-RELEASE, netbsd-2-0-2-RELEASE, netbsd-2-0-1-RELEASE, netbsd-2-0, netbsd-2, ktrace-lwp-base, kent-audio2-base, kent-audio2, kent-audio1-beforemerge, kent-audio1-base, kent-audio1
Branch point for: yamt-lazymbuf
Changes since 1.57: +2 -6 lines
Diff to previous 1.57 (colored)

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

Revision 1.57 / (download) - annotate - [select for diffs], Tue Apr 8 23:39:15 2003 UTC (21 years ago) by thorpej
Branch: MAIN
Branch point for: ktrace-lwp
Changes since 1.56: +4 -4 lines
Diff to previous 1.56 (colored)

Use PAGE_SIZE rather than NBPG.

Revision 1.56 / (download) - annotate - [select for diffs], Fri Jan 17 23:36:14 2003 UTC (21 years, 3 months ago) by thorpej
Branch: MAIN
Changes since 1.55: +19 -12 lines
Diff to previous 1.55 (colored)

Merge the nathanw_sa branch.

Revision 1.55 / (download) - annotate - [select for diffs], Tue Nov 12 14:00:41 2002 UTC (21 years, 5 months ago) by nisimura
Branch: MAIN
CVS Tags: nathanw_sa_before_merge, nathanw_sa_base, gmcgarry_ucred_base, gmcgarry_ucred, gmcgarry_ctxsw_base, gmcgarry_ctxsw, fvdl_fs64_base
Changes since 1.54: +2 -1 lines
Diff to previous 1.54 (colored)

Remove o32 stack layout exposure form cpu_fork().
Tested on R4000 and R3000.

Revision 1.54 / (download) - annotate - [select for diffs], Tue Mar 5 16:03:22 2002 UTC (22 years, 1 month ago) by simonb
Branch: MAIN
CVS Tags: newlock-base, newlock, netbsd-1-6-base, netbsd-1-6-RELEASE, netbsd-1-6-RC3, netbsd-1-6-RC2, netbsd-1-6-RC1, netbsd-1-6-PATCH002-RELEASE, netbsd-1-6-PATCH002-RC4, netbsd-1-6-PATCH002-RC3, netbsd-1-6-PATCH002-RC2, netbsd-1-6-PATCH002-RC1, netbsd-1-6-PATCH002, netbsd-1-6-PATCH001-RELEASE, netbsd-1-6-PATCH001-RC3, netbsd-1-6-PATCH001-RC2, netbsd-1-6-PATCH001-RC1, netbsd-1-6-PATCH001, netbsd-1-6, kqueue-beforemerge, kqueue-base, kqueue-aftermerge, gehenna-devsw-base, gehenna-devsw, eeh-devprop-base, eeh-devprop
Changes since 1.53: +5 -3 lines
Diff to previous 1.53 (colored)

Cosmestic changes (more like the mips3+ code).

Revision 1.53 / (download) - annotate - [select for diffs], Wed Nov 14 18:15:23 2001 UTC (22 years, 5 months ago) by thorpej
Branch: MAIN
CVS Tags: ifpoll-base
Branch point for: nathanw_sa
Changes since 1.52: +5 -488 lines
Diff to previous 1.52 (colored)

Merge the thorpej-mips-cache branch onto the trunk.  This is an
overhaul of how caches are handled for NetBSD's MIPS ports.

Revision 1.52 / (download) - annotate - [select for diffs], Wed May 30 15:24:34 2001 UTC (22 years, 10 months ago) by lukem
Branch: MAIN
CVS Tags: thorpej-mips-cache-base, thorpej-devvp-base3, thorpej-devvp-base2, thorpej-devvp-base, thorpej-devvp, pre-chs-ubcperf, post-chs-ubcperf
Branch point for: thorpej-mips-cache, kqueue
Changes since 1.51: +3 -1 lines
Diff to previous 1.51 (colored)

add missing   #include "opt_kgdb.h"

Revision 1.51 / (download) - annotate - [select for diffs], Tue Jan 16 06:01:26 2001 UTC (23 years, 3 months ago) by thorpej
Branch: MAIN
CVS Tags: thorpej_scsipi_nbase, thorpej_scsipi_beforemerge, thorpej_scsipi_base
Changes since 1.50: +11 -9 lines
Diff to previous 1.50 (colored)

New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
  syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
  as possible.

Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.

There's still some work that can be done using __HAVE_MINIMAL_EMUL.

Revision 1.50 / (download) - annotate - [select for diffs], Sun Jan 14 21:18:39 2001 UTC (23 years, 3 months ago) by thorpej
Branch: MAIN
Changes since 1.49: +9 -4 lines
Diff to previous 1.49 (colored)

Make the astpending flag per-process.

Revision 1.49 / (download) - annotate - [select for diffs], Sat Jan 13 23:49:12 2001 UTC (23 years, 3 months ago) by thorpej
Branch: MAIN
Changes since 1.48: +27 -3 lines
Diff to previous 1.48 (colored)

Check for ASTs in Syscall and UserGenException, too; AST processing
must be done on *every* return to userland.

Revision 1.48 / (download) - annotate - [select for diffs], Mon Oct 9 10:14:23 2000 UTC (23 years, 6 months ago) by nisimura
Branch: MAIN
Changes since 1.47: +2 -1 lines
Diff to previous 1.47 (colored)

Add mtc0 insn to load TX3900 config register value to determine Dcache size.

Revision 1.47 / (download) - annotate - [select for diffs], Wed Oct 4 08:46:21 2000 UTC (23 years, 6 months ago) by nisimura
Branch: MAIN
Changes since 1.46: +10 -89 lines
Diff to previous 1.46 (colored)

Merge exception return path of SystemCall and UserGenException into
proc_trampoline.

Revision 1.46 / (download) - annotate - [select for diffs], Tue Sep 26 18:22:12 2000 UTC (23 years, 6 months ago) by jeffs
Branch: MAIN
Changes since 1.45: +2 -2 lines
Diff to previous 1.45 (colored)

No longer save $at on syscall entry.  v1 does appear to be used as if
you do not save it and pass it along in rval the system will start
to fail running user programs.  This finishes the suggestion by cgd to
not save some registers on syscall entry.

Revision 1.45 / (download) - annotate - [select for diffs], Tue Sep 26 17:47:40 2000 UTC (23 years, 6 months ago) by uch
Branch: MAIN
Changes since 1.44: +9 -10 lines
Diff to previous 1.44 (colored)

fix R3900 FlushCache bug.

Revision 1.44 / (download) - annotate - [select for diffs], Mon Sep 18 18:17:32 2000 UTC (23 years, 7 months ago) by uch
Branch: MAIN
Changes since 1.43: +13 -9 lines
Diff to previous 1.43 (colored)

[R3900/R3920] sync with
 | Module Name:	syssrc
 | Committed By:	nisimura
 | Date:		Sat Sep 16 07:20:17 UTC 2000

Revision 1.43 / (download) - annotate - [select for diffs], Sat Sep 16 04:54:44 2000 UTC (23 years, 7 months ago) by nisimura
Branch: MAIN
Changes since 1.42: +55 -113 lines
Diff to previous 1.42 (colored)

- Reimplement MIPS1 cache size dectection logic taking advantage of the
  fact the direct mapped cache makes address alias effect.
- Just turn on processor master interrupt mask IEc (SR_INT_IE) bit prior
  to call syscall() kernel entry point.  IEp is always 1 in this case
  by defition.

Revision 1.42 / (download) - annotate - [select for diffs], Wed Sep 13 06:48:04 2000 UTC (23 years, 7 months ago) by jeffs
Branch: MAIN
Changes since 1.41: +12 -12 lines
Diff to previous 1.41 (colored)

Do not save t* registers in syscall stub as suggested by cgd.  Saves
a whole 0.01us in lmbench lat_syscall null on our 250Mhz QED system.
$at is still saved just to be safe, although it looks like it does
not need to be.  $v1 is used in syscall(), although I'm not sure why.

Revision 1.41 / (download) - annotate - [select for diffs], Wed Sep 13 01:53:01 2000 UTC (23 years, 7 months ago) by nisimura
Branch: MAIN
Changes since 1.40: +2 -3 lines
Diff to previous 1.40 (colored)

Introduce 'segbase' global variable to hold the pointer to current
process's segtab, retiring 'pcb_segtab' field from 'struct pcb'.
This would be another MULTIPROCESSOR unfriendly and the necessity
might be eliminated when the way to hold PTE is redesigned.

Revision 1.40 / (download) - annotate - [select for diffs], Tue Sep 5 01:24:52 2000 UTC (23 years, 7 months ago) by soren
Branch: MAIN
Changes since 1.39: +1 -2 lines
Diff to previous 1.39 (colored)

Back out (most of) previous. I was using an 1.5 asm.h and hadn't
noticed cgd's fix..

Revision 1.39 / (download) - annotate - [select for diffs], Tue Sep 5 00:55:48 2000 UTC (23 years, 7 months ago) by soren
Branch: MAIN
Changes since 1.38: +2 -1 lines
Diff to previous 1.38 (colored)

Add nop after PANIC macros.

Revision 1.38 / (download) - annotate - [select for diffs], Thu Aug 24 05:32:00 2000 UTC (23 years, 8 months ago) by uch
Branch: MAIN
Changes since 1.37: +181 -63 lines
Diff to previous 1.37 (colored)

Rewrote TX39 series cache routines.

Revision 1.37 / (download) - annotate - [select for diffs], Thu Jul 20 18:14:47 2000 UTC (23 years, 9 months ago) by jeffs
Branch: MAIN
Changes since 1.36: +7 -7 lines
Diff to previous 1.36 (colored)

Include kgdb hooks in trap.c.  Include bits of DDB code for kgdb also.  Remove
some local prototypes that are in headers now.

Revision 1.36 / (download) - annotate - [select for diffs], Mon Jul 10 16:23:19 2000 UTC (23 years, 9 months ago) by uch
Branch: MAIN
Changes since 1.35: +27 -18 lines
Diff to previous 1.35 (colored)

use mips3 cache op.
invalidate -> write-back invalidate
(although NetBSD/hpcmips run on write-through mode.)
suggested by cgd.

Revision 1.35 / (download) - annotate - [select for diffs], Mon Jun 26 02:55:46 2000 UTC (23 years, 9 months ago) by nisimura
Branch: MAIN
Changes since 1.34: +1 -29 lines
Diff to previous 1.34 (colored)

Abandon {mips1,mips3}_TBRPL()s which have little gain.  They were
expected to be better than MachTLBUpdate(). After all, TLBUpdate()
is rather harmful and should be replaced with TBIS().

Revision 1.34 / (download) - annotate - [select for diffs], Mon May 29 23:40:04 2000 UTC (23 years, 10 months ago) by simonb
Branch: MAIN
CVS Tags: netbsd-1-5-base, netbsd-1-5-RELEASE, netbsd-1-5-PATCH003, netbsd-1-5-PATCH002, netbsd-1-5-PATCH001, netbsd-1-5-BETA2, netbsd-1-5-BETA, netbsd-1-5-ALPHA2, netbsd-1-5
Changes since 1.33: +31 -31 lines
Diff to previous 1.33 (colored)

A few more white-space bogons.

Revision 1.33 / (download) - annotate - [select for diffs], Sat May 27 02:13:46 2000 UTC (23 years, 10 months ago) by soren
Branch: MAIN
CVS Tags: minoura-xpg4dl-base
Branch point for: minoura-xpg4dl
Changes since 1.32: +3 -2 lines
Diff to previous 1.32 (colored)

Match a comment with the MIPS3 version.

Revision 1.32 / (download) - annotate - [select for diffs], Sun May 21 03:23:16 2000 UTC (23 years, 11 months ago) by soren
Branch: MAIN
Changes since 1.31: +2 -1 lines
Diff to previous 1.31 (colored)

Include opt_cputype.h.

Revision 1.31 / (download) - annotate - [select for diffs], Wed May 10 01:34:14 2000 UTC (23 years, 11 months ago) by nisimura
Branch: MAIN
Changes since 1.30: +8 -1 lines
Diff to previous 1.30 (colored)

Have mips_locoresw[] of 3 entry pointer array for different
implementation of locore routines between MIPS1 and MIPS3.  It's
independent from mips_locore_jumpvec_t which is for cache/TLB
manipulating routines peculiar to processor designs.  mips_locore_jumpvec_t
will be replaced with "processor closures" encapsulating implementation
parameters (cpuinfo) and pointers to conventaion routines (cpuops),
eventually.

Revision 1.30 / (download) - annotate - [select for diffs], Sun Apr 16 09:00:26 2000 UTC (24 years ago) by nisimura
Branch: MAIN
Changes since 1.29: +29 -1 lines
Diff to previous 1.29 (colored)

Introduce MIPS_TBRPL() which replaces a TLB entry of given vaddr
with new entryHi and entryLo pair iff found in TLB.  Works only
for KSEG2 this moment.  mips3 version will follow.

Revision 1.29 / (download) - annotate - [select for diffs], Tue Apr 11 04:53:57 2000 UTC (24 years ago) by nisimura
Branch: MAIN
Changes since 1.28: +14 -14 lines
Diff to previous 1.28 (colored)

Abandon rather random distinctions in andi/addiu coding and make
them consistent with and/addu instrunction mnemonics which produce
exactly same binaries.

Revision 1.28 / (download) - annotate - [select for diffs], Tue Apr 11 02:30:17 2000 UTC (24 years ago) by nisimura
Branch: MAIN
Changes since 1.27: +7 -5 lines
Diff to previous 1.27 (colored)

Introduce cpu_intr() whose body is now provided by target ports in
their own ways.  Ugly fixup #define in machine/intr.h have gone.
mips_hardware_intr global variable patch work has gone.

Revision 1.27 / (download) - annotate - [select for diffs], Tue Apr 11 01:32:19 2000 UTC (24 years ago) by nisimura
Branch: MAIN
Changes since 1.26: +1 -228 lines
Diff to previous 1.26 (colored)

Remove various TLB manipulation routines which have been unused
long time, commented out and is unlikely useful; TLBWriteIndexed(),
TLBWriteRandom(), TLBFlush(), TLBFlushPID() and TLBFind().

Revision 1.26 / (download) - annotate - [select for diffs], Mon Apr 10 11:38:16 2000 UTC (24 years ago) by nisimura
Branch: MAIN
Changes since 1.25: +51 -49 lines
Diff to previous 1.25 (colored)

- Fix a bug in mips1_TBIAP() misbehaving like as mips1_TBIA().
- Adjust comments to reflect what it does.

Revision 1.25 / (download) - annotate - [select for diffs], Mon Apr 10 04:59:47 2000 UTC (24 years ago) by nisimura
Branch: MAIN
Changes since 1.24: +40 -45 lines
Diff to previous 1.24 (colored)

Make (sure) ASID management same as what NetBSD/alpha does for ASN.
ASID#0 is reserved for pmap0 shared between proc0 and kthreads,
and every TLB for KSEG2 has G (global) bit to have wildcard match
regardless of the process' ASID.   MIPS1 would flush TLBs belong
to user spaces upon ASID generation bump.  Change for MIPS3 is
to be done.

Revision 1.24 / (download) - annotate - [select for diffs], Mon Mar 27 05:23:43 2000 UTC (24 years ago) by nisimura
Branch: MAIN
Changes since 1.23: +17 -30 lines
Diff to previous 1.23 (colored)

- Rename some of TLB ops to have handy abbrivations hired from VAX and
  ALPHA; mips1_TBIA, mips1_TBIAP, mips1_TBIS.
- Make sure TBIA and TBIAP ops to have an argument for the size of TLB
  which varies across even for MIPS1 implementations.
- Nuke the unused cpu_isa field from processor personality list.

- XXX XXX XXX
  it's less-than-optimal and likely a mistake to have TLBUpdate().
  It's costy to try to invalidate a single TLB entry whenver a certain
  PTE is going to be modified by traversing the entire TLB looking
  for the modified PTE because the PTE in question is not in TLB in
  most cases.  ASID bump could do the invalidation smartly.  Solution
  is planned for now.

Revision 1.23 / (download) - annotate - [select for diffs], Sat Mar 4 11:37:31 2000 UTC (24 years, 1 month ago) by nisimura
Branch: MAIN
Changes since 1.22: +1 -24 lines
Diff to previous 1.22 (colored)

Remove #ifdef'ed out PMAX_CACHEFLUSH_FORCES_WBFLUSH codes in cache
flush ops which has had no effect for long time.

Revision 1.22 / (download) - annotate - [select for diffs], Wed Feb 23 17:04:06 2000 UTC (24 years, 2 months ago) by mhitch
Branch: MAIN
Changes since 1.21: +2 -2 lines
Diff to previous 1.21 (colored)

Loading the exception return PC in k0 before restoring the status register
(which disables the interrupts) is *not* a good idea.  k0 (and k1) is used
by the kernel code such as the TLB miss handler, and the interrupt entry.
If an interrupt occurs after loading k0 and before the SR gets interrupts
disabled, k0 will be clobbered and when used to load the PC on exit from
the exception handler, results in various hangs and crashes.

Revision 1.21 / (download) - annotate - [select for diffs], Sat Feb 19 01:56:21 2000 UTC (24 years, 2 months ago) by mycroft
Branch: MAIN
Changes since 1.20: +2 -2 lines
Diff to previous 1.20 (colored)

Disable the sN,sp,gp register restore code for now, as it seems to collide with
something else.

Revision 1.20 / (download) - annotate - [select for diffs], Fri Feb 18 18:36:41 2000 UTC (24 years, 2 months ago) by thorpej
Branch: MAIN
Changes since 1.19: +13 -14 lines
Diff to previous 1.19 (colored)

On exception return, use k1 to restore the saved registers, so that we
don't stomp on the return address in k0.  Also, don't need to account
for any load delays, as the last register restored (gp) isn't used in
the subsequent instruction.

Revision 1.19 / (download) - annotate - [select for diffs], Fri Feb 18 03:46:43 2000 UTC (24 years, 2 months ago) by mycroft
Branch: MAIN
Changes since 1.18: +13 -12 lines
Diff to previous 1.18 (colored)

Adjust previous change for R3000 load delay slot.

Revision 1.18 / (download) - annotate - [select for diffs], Fri Feb 18 00:15:15 2000 UTC (24 years, 2 months ago) by mycroft
Branch: MAIN
Changes since 1.17: +27 -8 lines
Diff to previous 1.17 (colored)

Make the MIPS1 and MIPS3 code more similar.
XXX Needs testing on MIPS1.

Revision 1.17 / (download) - annotate - [select for diffs], Mon Nov 29 11:12:14 1999 UTC (24 years, 4 months ago) by uch
Branch: MAIN
CVS Tags: wrstuden-devbsize-base, wrstuden-devbsize-19991221, chs-ubc2-newbase
Changes since 1.16: +178 -2 lines
Diff to previous 1.16 (colored)

TX3912/22 support. ENABLE_MIPS_TX3900 enables it.

Revision 1.16 / (download) - annotate - [select for diffs], Wed Nov 10 08:06:11 1999 UTC (24 years, 5 months ago) by nisimura
Branch: MAIN
CVS Tags: fvdl-softdep-base
Changes since 1.15: +1 -12 lines
Diff to previous 1.15 (colored)

Remove a small scale 'improvement' for TLB mod exception which is now
found harmful.  Fix panics on MIPS1 only kernels.

Revision 1.15 / (download) - annotate - [select for diffs], Fri Jun 18 08:17:50 1999 UTC (24 years, 10 months ago) by nisimura
Branch: MAIN
CVS Tags: comdex-fall-1999-base, comdex-fall-1999, chs-ubc2-base
Branch point for: wrstuden-devbsize, thorpej_scsipi, fvdl-softdep
Changes since 1.14: +7 -77 lines
Diff to previous 1.14 (colored)

- Fix an large error I made last month in TLB mod improvement, still
wondering why not I was immediately blown away.
- Continuing invastigations on VM related panics on very high loads.

Revision 1.14 / (download) - annotate - [select for diffs], Mon May 31 06:10:32 1999 UTC (24 years, 10 months ago) by nisimura
Branch: MAIN
Changes since 1.13: +27 -30 lines
Diff to previous 1.13 (colored)

- A little attention for TLBUpdate().

Revision 1.13 / (download) - annotate - [select for diffs], Sat May 29 09:38:28 1999 UTC (24 years, 10 months ago) by nisimura
Branch: MAIN
Changes since 1.12: +28 -9 lines
Diff to previous 1.12 (colored)

- Make a modification to reduce the cost of TLBmod exception handling.
TLBUpdate() routine is used for dual purposes.  In TLBmod case, just ok
to call 'tlbwi' (as designed).  Result in saving of extraneous execution
path.  MIPS1 only this moment.

Revision 1.12 / (download) - annotate - [select for diffs], Sat May 22 02:35:35 1999 UTC (24 years, 11 months ago) by nisimura
Branch: MAIN
Changes since 1.11: +3 -3 lines
Diff to previous 1.11 (colored)

- Backout the last code change.  I found it broke pmax kernel.  It's
retained for future use of pmap.new.c, though.

> New codes always use current ASID holded in EntryHi register.

Revision 1.11 / (download) - annotate - [select for diffs], Fri May 21 06:36:37 1999 UTC (24 years, 11 months ago) by nisimura
Branch: MAIN
Changes since 1.10: +8 -8 lines
Diff to previous 1.10 (colored)

- Typos, I made...

Revision 1.10 / (download) - annotate - [select for diffs], Fri May 21 06:01:14 1999 UTC (24 years, 11 months ago) by nisimura
Branch: MAIN
Changes since 1.9: +126 -50 lines
Diff to previous 1.9 (colored)

- Now completing MIPS1 side change.  Introduce MIPS_TBIS and MIPS_TBDATA
(correct name, vax?) replacing mips1_TLBFlushAddr and mips1_TLBUpdate,
respectively.  New codes always use current ASID holded in EntryHi
register.  In most occations, the register already contains a necessary
value before (re-)written, ugh.  'sva | asid' ops for their arguments are
now verbose, to be removed when MIPS3 side changes are done.

Revision 1.9 / (download) - annotate - [select for diffs], Wed May 19 07:08:43 1999 UTC (24 years, 11 months ago) by nisimura
Branch: MAIN
Changes since 1.8: +65 -34 lines
Diff to previous 1.8 (colored)

- Implement MIPS_TBIAP() which invalidates all TLB entries belong to
per process user spaces, replacing mips1_TBLFlush().  This reserves
kernel space TLB entries when TLBPID generation number about to wrap.
- Correct comments a bit, nuke unused routines.

Revision 1.8 / (download) - annotate - [select for diffs], Sat Apr 24 08:10:40 1999 UTC (25 years ago) by simonb
Branch: MAIN
Changes since 1.7: +9 -9 lines
Diff to previous 1.7 (colored)

Nuke register and remove trailling white space.

Revision 1.7 / (download) - annotate - [select for diffs], Sun Feb 28 21:53:00 1999 UTC (25 years, 1 month ago) by jonathan
Branch: MAIN
CVS Tags: netbsd-1-4-base, netbsd-1-4-RELEASE, netbsd-1-4-PATCH003, netbsd-1-4-PATCH002, netbsd-1-4-PATCH001, netbsd-1-4, kame_14_19990705, kame_14_19990628, kame_141_19991130, kame
Branch point for: chs-ubc2
Changes since 1.6: +5 -5 lines
Diff to previous 1.6 (colored)

Garbage-collect pmax writebuffer drain when invalidating caches, pass 0:
Change `#ifdef pmax' to `#ifdef PMAX_CACHEFLUSH_FORCES_WBFLUSH'.

Revision 1.6 / (download) - annotate - [select for diffs], Mon Feb 22 00:21:39 1999 UTC (25 years, 2 months ago) by jonathan
Branch: MAIN
Changes since 1.5: +3 -3 lines
Diff to previous 1.5 (colored)

Cannot do mcount() profiling in TLB exception-handler code.

Revision 1.5 / (download) - annotate - [select for diffs], Tue Feb 16 08:35:35 1999 UTC (25 years, 2 months ago) by jonathan
Branch: MAIN
Changes since 1.4: +8 -11 lines
Diff to previous 1.4 (colored)

Use VECTOR() and VECTOR_END() in mips1 locore code.

Revision 1.4 / (download) - annotate - [select for diffs], Sat Jan 16 08:45:53 1999 UTC (25 years, 3 months ago) by nisimura
Branch: MAIN
Changes since 1.3: +48 -62 lines
Diff to previous 1.3 (colored)

- Make cpu_switch() a normal call; formally it was splitted into halves.
- Fix an error in mips3_cpu_switch_resume(); ASID was not set correctly.
- Remove global variable 'curpcb' reference in mips1_proc_trampoline().
- Restore 'cpuregs.h'.

Revision 1.3 / (download) - annotate - [select for diffs], Fri Jan 15 22:26:43 1999 UTC (25 years, 3 months ago) by castor
Branch: MAIN
Changes since 1.2: +410 -490 lines
Diff to previous 1.2 (colored)

* Add prototype for mips1_clean_tlb
* Add the correct version of locore_mips1.S [ See previous revision for
	description of changes ]
* Use defopt'ed MIPS3_L2CACHE_ABSENT in mips_machdep.c and pmap.c
	to avoid generating extraneous code.
* GC pmap_set_referenced in pmap.c

Revision 1.2 / (download) - annotate - [select for diffs], Fri Jan 15 01:23:13 1999 UTC (25 years, 3 months ago) by castor
Branch: MAIN
Changes since 1.1: +1856 -0 lines
Diff to previous 1.1 (colored)

* Elimination of UADDR/KERNELSTACK

   Affected files:
	include/mips_param.h, include/pcb.h,
	mips/locore_mips1.S, mips/locore_mips3.S,
	mips/mips_machdep.c, mips/vm_machdep.c

   Issue:

So far, NetBSD/mips has not successfully got rid of fixed-address
kernel stack.  USPACE (two 4KB pages) of each process has two distinct
KSEG2 addresses, both refer to a single physical storage; one address
for fixed range [ UADDR .. KERNELSTACK ), and another for "normal" KSEG2
address which was allocated by kernel memory manager and unique to each
others of processes.

"Doubly mapped" USPACE complicates context switch.  Both address ranges
have to be managed with a special care of "wired" TLB entries which
are never replaced until next context switch to ensure no TLB miss for
USPACE access.  It's equally crumbersome that MIPS processor's cache
machinary gets be confused about USPACE contents because there are two
distinct KSEG2 addresses to manipulate one physical storage.

   Solution:

Purge KERNELSTACK constant for kernel stack pointer and replace
it with process unique values.  Kernel stack bottom is located at
'curproc->p_addr + USPACE'.  Context switch is simplified as it unloads
half of TLB hardwiring burden.  It just manages the unique KSEG2 address
of each USPACE to be wired.  As the side effect, switch_exit() has no
MIPS processor ISA dependent code anymore.  It switchs kernel stack to
proc0's USPACE which has KSEG0 address and no need of TLB entry.

* Extensive use of 'genassym.cf'

To hide target port dependent and/or processor register size dependent
constants from assembler routines, 'genassym.cf' now has an extentive
set of definitions for various constants and offset values of
structural objects.  This change will contribute possible NetBSD/mips64
portability too.

* Separation and rename of locore_r2000/_r4000.S

Those files are now indepedent standalones from locore.S to ease
maintainance works, and renamed to match MIPS processor ISA version.

* Changes in kernel mode exception handlers

Kernel mode exception handlers hold exception contexts by pushing a
certain set of register values on stack for resuming kernel mode
processing.  This context is now represented with 'struct trapframe',
which is smaller than full scale (user mode) exception context 'struct
frame'.  Stack consumption of kernel mode exception services is now
similar to 4.4BSD/mips.

* Relocation of exception frame

User mode context 'struct frame' is moved to the very bottom of kernel
stack at 'curproc->p_addr + USPACE - sizeof(struct frame)'  This change
saves a bit of instructions on every return to user processes as it
eliminates reference to global variable 'curpcb' each time.

* Refurblished DDB backtrace routine

It's a growing concern to maintain stacktrace() code correctly.  It
could be simplified by enforcing special arrangements for some of
obscure locore routines which violate usual coding conventions.

New backtrace code searchs for certain instructions peculiar to any of
function tails.  Specifically, "jr ra" for normal function returns, "jr
k0" for MIPS1 exception handlers and "eret" for MIPS3 handlers.

* Support for 64-bit safe user code
    Affected Files:
	${ARCH}/include/pubassym.cf lib/libc/arch/mips/gen/*setjmp*
	include/setjmp.h mips/include/[lots] mips/mips/[lots]

    Solution:

	We define macros REG_L/REG_S and SZREG for loading and storing
	registers and for the size of registers.  The exact meaning
	of these is controlled by a macro (currently _MIPS64) which
	allows one to treat the registers as either 32-bit or 64-bit.
	There are data types mips_reg_t and mips_fpreg_t which represent
	the true register sizes, and avoid confusing register_t.

	We needed a way to dynamically gen the structure sizes of things
	like sigcontext for setjmp.h, so we defined a pubassym.cf for
	libc routines like setjmp and longjmp.

	NetBSD/mips allows ${ARCH}'s to be defined which preserve
	all 64-bits of registers across user context switches.  There
	are still a few niceties to clean up for kernel mode context
	switches.

* Support for QED 52xx processors
    Affected Files:
	mips/locore_mips3.S mips/pmap.c include/locore.h

    Issue:
	The QED 52xx family of processors are targeted at low cost
	embedded systems, (i.e. CPUs ~$30) for systems like routers, printers,
	etc.  We have added preliminary support for some of the idiosyncrasies
	of this processor, e.g. no L2 cache, etc.  More work needs to be
	done here because with a modest 2-way  L1 cache, some of the rampant
	flushing has significant performance implications.  However,
	it doesn't crash, which is a start.

    Solution:
	A routine for flushing the cache based on virtual addresses was added;
	a routine which deals with the two-way set associativity of the
	5230 L1 cache was added, accomodations to 5230's instruction hazards
	were added.


* TLB Miss code for mips3/mips4 processors cleaned up significantly.
    Affected Files:
	mips/locore_mips3.S mips/vm_machdep.c include/locore.h mips_machdep.c
    Issue:
	The TLB Miss handler exceeded the allowed size, which wasn't
	a problem because there was no handler for when the processor
	was in 64-bit mode.  The handler for invalid TLB exceptions
	also appears to have much vestigial code, which made it
	difficult to understand.

    Solution:
	Use the XCONTEXT register to store a pointer to the segment
	map table, this coupled with removing some dead code allows
	the handlers to fit.

Revision 1.1, Thu Oct 15 03:19:54 1998 UTC (25 years, 6 months ago) by nisimura
Branch: MAIN
Branch point for: nisimura-pmax-wscons
FILE REMOVED

file locore_mips1.S was initially added on branch nisimura-pmax-wscons.

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