CVS log for src/sys/arch/mips/mips/lock_stubs_llsc.S

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Default branch: MAIN

Revision 1.17 / (download) - annotate - [select for diffs], Sun Feb 27 19:22:29 2022 UTC (11 months, 1 week ago) by riastradh
Branch: MAIN
CVS Tags: netbsd-10-base, netbsd-10, bouyer-sunxi-drm-base, bouyer-sunxi-drm, HEAD
Changes since 1.16: +4 -4 lines
Diff to previous 1.16 (colored)

mips: Issue a sync plunger at the end of mutex_spin_exit.

Same as mutex_exit.  Relevant only on cnMIPS where the store buffers
get clogged.  Recommended by the Cavium documentation.  No semantic
change, only performance -- this only adds a barrier in some cases
where there was none before, so it can't hurt correctness.

Revision 1.16 / (download) - annotate - [select for diffs], Sun Feb 27 19:22:02 2022 UTC (11 months, 1 week ago) by riastradh
Branch: MAIN
Changes since 1.15: +2 -3 lines
Diff to previous 1.15 (colored)

mips: Omit needless SYNC in mutex_exit.

This change deletes a memory barrier.  However, it should be safe:
The semantic requirement for this is already provided by the SYNC_REL
above, before the ll.  And as currently defined, SYNC_REL is at least
as strong as SYNC, so this change can't hurt correctness on its own
(barring CPU errata, which would apply to other users of SYNC_REL and
can be addressed in the definition of SYNC_REL).

Later, perhaps we can relax SYNC_REL to syncw on Octeon if we prove
that it is correct (e.g., if Octeon follows the SPARCv9 partial store
order semantics).

Nix now-unused SYNC macro in asm.h.

Revision 1.15 / (download) - annotate - [select for diffs], Sun Feb 27 19:21:53 2022 UTC (11 months, 1 week ago) by riastradh
Branch: MAIN
Changes since 1.14: +24 -9 lines
Diff to previous 1.14 (colored)

mips: Membar audit.

This change should be safe because it doesn't remove or weaken any
memory barriers, but does add, clarify, or strengthen barriers.

Goals:

- Make sure mutex_enter/exit and mutex_spin_enter/exit have
  acquire/release semantics.

- New macros make maintenance easier and purpose clearer:

  . SYNC_ACQ is for load-before-load/store barrier, and BDSYNC_ACQ
    for a branch delay slot -- currently defined as plain sync for MP
    and nothing, or nop, for UP; thus it is no weaker than SYNC and
    BDSYNC as currently defined, which is syncw on Octeon, plain sync
    on non-Octeon MP, and nothing/nop on UP.

    It is not clear to me whether load-then-syncw or ll/sc-then-syncw
    or even bare load provides load-acquire semantics on Octeon -- if
    no, this will fix bugs; if yes (like it is on SPARC PSO), we can
    relax SYNC_ACQ to be syncw or nothing later.

  . SYNC_REL is for load/store-before-store barrier -- currently
    defined as plain sync for MP and nothing for UP.

    It is not clear to me whether syncw-then-store is enough for
    store-release on Octeon -- if no, we can leave this as is; if
    yes, we can relax SYNC_REL to be syncw on Octeon.

  . SYNC_PLUNGER is there to flush clogged Cavium store buffers, and
    BDSYNC_PLUNGER for a branch delay slot -- syncw on Octeon,
    nothing or nop on non-Octeon.

    => This is not necessary (or, as far as I'm aware, sufficient)
       for acquire semantics -- it serves only to flush store buffers
       where stores might otherwise linger for hundreds of thousands
       of cycles, which would, e.g., cause spin locks to be held for
       unreasonably long durations.

  Newerish revisions of the MIPS ISA also have finer-grained sync
  variants that could be plopped in here.

Mechanism:

Insert these barriers in the right places, replacing only those where
the definition is currently equivalent, so this change is safe.

- Replace #ifdef _MIPS_ARCH_OCTEONP / syncw / #endif at the end of
  atomic_cas_* by SYNC_PLUNGER, which is `sync 4' (a.k.a. syncw) if
  __OCTEON__ and empty otherwise.

  => From what I can tell, __OCTEON__ is defined in at least as many
     contexts as _MIPS_ARCH_OCTEONP -- i.e., there are some Octeons
     with no _MIPS_ARCH_OCTEONP, but I don't know if any of them are
     relevant to us or ever saw the light of day outside Cavium; we
     seem to buid with `-march=octeonp' so this is unlikely to make a
     difference.  If it turns out that we do care, well, now there's
     a central place to make the distinction for sync instructions.

- Replace post-ll/sc SYNC by SYNC_ACQ in _atomic_cas_*, which are
  internal kernel versions used in sys/arch/mips/include/lock.h where
  it assumes they have load-acquire semantics.  Should move this to
  lock.h later, since we _don't_ define __HAVE_ATOMIC_AS_MEMBAR on
  MIPS and so the extra barrier might be costly.

- Insert SYNC_REL before ll/sc, and replace post-ll/sc SYNC by
  SYNC_ACQ, in _ucas_*, which is used without any barriers in futex
  code and doesn't mention barriers in the man page so I have to
  assume it is required to be a release/acquire barrier.

- Change BDSYNC to BDSYNC_ACQ in mutex_enter and mutex_spin_enter.
  This is necessary to provide load-acquire semantics -- unclear if
  it was provided already by syncw on Octeon, but it seems more
  likely that either (a) no sync or syncw is needed at all, or (b)
  syncw is not enough and sync is needed, since syncw is only a
  store-before-store ordering barrier.

- Insert SYNC_REL before ll/sc in mutex_exit and mutex_spin_exit.
  This is currently redundant with the SYNC already there, but
  SYNC_REL more clearly identifies the necessary semantics in case we
  want to define it differently on different systems, and having a
  sync in the middle of an ll/sc is a bit weird and possibly not a
  good idea, so I intend to (carefully) remove the redundant SYNC in
  a later change.

- Change BDSYNC to BDSYNC_PLUNGER at the end of mutex_exit.  This has
  no semantic change right now -- it's syncw on Octeon, sync on
  non-Octeon MP, nop on UP -- but we can relax it later to nop on
  non-Cavium MP.

- Leave LLSCSYNC in for now -- it is apparently there for a Cavium
  erratum, but I'm not sure what the erratum is, exactly, and I have
  no reference for it.  I suspect these can be safely removed, but we
  might have to double up some other syncw instructions -- Linux uses
  it only in store-release sequences, not at the head of every ll/sc.

Revision 1.14 / (download) - annotate - [select for diffs], Sun Feb 27 19:21:44 2022 UTC (11 months, 1 week ago) by riastradh
Branch: MAIN
Changes since 1.13: +3 -3 lines
Diff to previous 1.13 (colored)

mips: Make sure that mutex_spin_exit works even if !DIAGNOSTIC.

The critical store has been under #ifdef DIAGNOSTIC since, uh, 2011.

Revision 1.13 / (download) - annotate - [select for diffs], Sat Sep 26 08:21:27 2020 UTC (2 years, 4 months ago) by simonb
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex2-base, thorpej-futex2, thorpej-futex-base, thorpej-futex, thorpej-cfargs2-base, thorpej-cfargs2, thorpej-cfargs-base, thorpej-cfargs, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x
Changes since 1.12: +3 -3 lines
Diff to previous 1.12 (colored)

Expose the atomicvec vectors via EXPORT_OBJECT so ksyms(4) address
lookups can find them.

Revision 1.12 / (download) - annotate - [select for diffs], Sun Aug 9 08:33:52 2020 UTC (2 years, 5 months ago) by skrll
Branch: MAIN
Changes since 1.11: +3 -12 lines
Diff to previous 1.11 (colored)

This file is only ever used when MULTIPROCESSOR so unifdef MULTIPROCESSOR

Revision 1.11 / (download) - annotate - [select for diffs], Thu Aug 6 10:00:21 2020 UTC (2 years, 5 months ago) by skrll
Branch: MAIN
Changes since 1.10: +9 -16 lines
Diff to previous 1.10 (colored)

Centralise SYNC/BDSYNC in asm.h and introduce a new LLCSCSYNC and use it
before any ll/sc sequences.

Define LLSCSYNC as syncw; syncw for cnMIPS - issue two as early cnMIPS
has errat{um,a} that means the first can fail.

Revision 1.10 / (download) - annotate - [select for diffs], Sat Aug 1 07:09:41 2020 UTC (2 years, 6 months ago) by simonb
Branch: MAIN
Changes since 1.9: +4 -4 lines
Diff to previous 1.9 (colored)

Add a comment to say that an Octeon "sync 4" is "syncw" - sync all writes.

Revision 1.8.4.1 / (download) - annotate - [select for diffs], Mon Jun 10 22:06:30 2019 UTC (3 years, 7 months ago) by christos
Branch: phil-wifi
Changes since 1.8: +24 -18 lines
Diff to previous 1.8 (colored) next main 1.9 (colored)

Sync with HEAD

Revision 1.9 / (download) - annotate - [select for diffs], Sat Apr 6 03:06:26 2019 UTC (3 years, 10 months ago) by thorpej
Branch: MAIN
CVS Tags: phil-wifi-20200421, phil-wifi-20200411, phil-wifi-20200406, phil-wifi-20191119, phil-wifi-20190609, netbsd-9-base, netbsd-9-3-RELEASE, netbsd-9-2-RELEASE, netbsd-9-1-RELEASE, netbsd-9-0-RELEASE, netbsd-9-0-RC2, netbsd-9-0-RC1, netbsd-9, isaki-audio2-base, isaki-audio2, is-mlppp-base, is-mlppp, bouyer-xenpvh-base2, bouyer-xenpvh-base1, bouyer-xenpvh-base, bouyer-xenpvh, ad-namecache-base3, ad-namecache-base2, ad-namecache-base1, ad-namecache-base, ad-namecache
Changes since 1.8: +24 -18 lines
Diff to previous 1.8 (colored)

Overhaul the API used to fetch and store individual memory cells in
userspace.  The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms.  The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).

Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.

Welcome to NetBSD 8.99.37.

Revision 1.2.12.1 / (download) - annotate - [select for diffs], Sun Dec 3 11:36:28 2017 UTC (5 years, 2 months ago) by jdolecek
Branch: tls-maxphys
Changes since 1.2: +9 -12 lines
Diff to previous 1.2 (colored) next main 1.3 (colored)

update from HEAD

Revision 1.2.30.4 / (download) - annotate - [select for diffs], Mon Aug 28 17:51:45 2017 UTC (5 years, 5 months ago) by skrll
Branch: nick-nhusb
Changes since 1.2.30.3: +2 -11 lines
Diff to previous 1.2.30.3 (colored) to branchpoint 1.2 (colored) next main 1.3 (colored)

Sync with HEAD

Revision 1.8 / (download) - annotate - [select for diffs], Thu Aug 24 14:26:16 2017 UTC (5 years, 5 months ago) by maya
Branch: MAIN
CVS Tags: tls-maxphys-base-20171202, phil-wifi-base, pgoyette-compat-merge-20190127, pgoyette-compat-base, pgoyette-compat-20190127, pgoyette-compat-20190118, pgoyette-compat-1226, pgoyette-compat-1126, pgoyette-compat-1020, pgoyette-compat-0930, pgoyette-compat-0906, pgoyette-compat-0728, pgoyette-compat-0625, pgoyette-compat-0521, pgoyette-compat-0502, pgoyette-compat-0422, pgoyette-compat-0415, pgoyette-compat-0407, pgoyette-compat-0330, pgoyette-compat-0322, pgoyette-compat-0315, pgoyette-compat, nick-nhusb-base-20170825
Branch point for: phil-wifi
Changes since 1.7: +2 -11 lines
Diff to previous 1.7 (colored)

Eliminate redundant load delays.

Machines that need load delays do not have ll/sc instructions.

Revision 1.2.30.3 / (download) - annotate - [select for diffs], Wed Oct 5 20:55:32 2016 UTC (6 years, 4 months ago) by skrll
Branch: nick-nhusb
Changes since 1.2.30.2: +5 -3 lines
Diff to previous 1.2.30.2 (colored) to branchpoint 1.2 (colored)

Sync with HEAD

Revision 1.7 / (download) - annotate - [select for diffs], Fri Aug 19 10:05:35 2016 UTC (6 years, 5 months ago) by skrll
Branch: MAIN
CVS Tags: prg-localcount2-base3, prg-localcount2-base2, prg-localcount2-base1, prg-localcount2-base, prg-localcount2, pgoyette-localcount-20170426, pgoyette-localcount-20170320, pgoyette-localcount-20170107, pgoyette-localcount-20161104, perseant-stdc-iso10646-base, perseant-stdc-iso10646, nick-nhusb-base-20170204, nick-nhusb-base-20161204, nick-nhusb-base-20161004, netbsd-8-base, netbsd-8-2-RELEASE, netbsd-8-1-RELEASE, netbsd-8-1-RC1, netbsd-8-0-RELEASE, netbsd-8-0-RC2, netbsd-8-0-RC1, netbsd-8, matt-nb8-mediatek-base, matt-nb8-mediatek, localcount-20160914, jdolecek-ncq-base, jdolecek-ncq, bouyer-socketcan-base1, bouyer-socketcan-base, bouyer-socketcan
Changes since 1.6: +3 -3 lines
Diff to previous 1.6 (colored)

Trailing whitespace

Revision 1.5.2.1 / (download) - annotate - [select for diffs], Sat Aug 6 00:19:06 2016 UTC (6 years, 6 months ago) by pgoyette
Branch: pgoyette-localcount
Changes since 1.5: +3 -1 lines
Diff to previous 1.5 (colored) next main 1.6 (colored)

Sync with HEAD

Revision 1.6 / (download) - annotate - [select for diffs], Wed Jul 27 09:32:35 2016 UTC (6 years, 6 months ago) by skrll
Branch: MAIN
CVS Tags: pgoyette-localcount-20160806
Changes since 1.5: +3 -1 lines
Diff to previous 1.5 (colored)

Sprinle RCSID

Revision 1.5 / (download) - annotate - [select for diffs], Mon Jul 11 16:15:36 2016 UTC (6 years, 6 months ago) by matt
Branch: MAIN
CVS Tags: pgoyette-localcount-base, pgoyette-localcount-20160726
Branch point for: pgoyette-localcount
Changes since 1.4: +3 -3 lines
Diff to previous 1.4 (colored)

Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch

Revision 1.2.30.2 / (download) - annotate - [select for diffs], Tue Sep 22 12:05:47 2015 UTC (7 years, 4 months ago) by skrll
Branch: nick-nhusb
Changes since 1.2.30.1: +2 -3 lines
Diff to previous 1.2.30.1 (colored) to branchpoint 1.2 (colored)

Sync with HEAD

Revision 1.4 / (download) - annotate - [select for diffs], Sun Jun 7 06:07:49 2015 UTC (7 years, 8 months ago) by matt
Branch: MAIN
CVS Tags: nick-nhusb-base-20160907, nick-nhusb-base-20160529, nick-nhusb-base-20160422, nick-nhusb-base-20160319, nick-nhusb-base-20151226, nick-nhusb-base-20150921
Changes since 1.3: +1 -2 lines
Diff to previous 1.3 (colored)

assembly no longer include <machine/cpu.h>.  Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h.  <mips/mips_param.h> no
longer include <machine/cpu.h>

Revision 1.2.30.1 / (download) - annotate - [select for diffs], Sat Jun 6 14:40:02 2015 UTC (7 years, 8 months ago) by skrll
Branch: nick-nhusb
Changes since 1.2: +6 -1 lines
Diff to previous 1.2 (colored)

Sync with HEAD

Revision 1.3 / (download) - annotate - [select for diffs], Thu Jun 4 02:28:06 2015 UTC (7 years, 8 months ago) by matt
Branch: MAIN
CVS Tags: nick-nhusb-base-20150606
Changes since 1.2: +6 -1 lines
Diff to previous 1.2 (colored)

Use syncw on OCTEON

More <machine/ include cleanup

Revision 1.1.10.2 / (download) - annotate - [select for diffs], Mon Jun 6 09:06:06 2011 UTC (11 years, 8 months ago) by jruoho
Branch: jruoho-x86intr
Changes since 1.1.10.1: +376 -0 lines
Diff to previous 1.1.10.1 (colored) to branchpoint 1.1 (colored) next main 1.2 (colored)

Sync with HEAD.

Revision 1.1.6.3 / (download) - annotate - [select for diffs], Thu May 26 19:21:56 2011 UTC (11 years, 8 months ago) by matt
Branch: matt-nb5-mips64
Changes since 1.1.6.2: +2 -2 lines
Diff to previous 1.1.6.2 (colored) to branchpoint 1.1 (colored) next main 1.2 (colored)

Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP).  This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand.  If in the miss handlers, the TLB is already
locked let trap deal with the exeception.

Revision 1.1.6.2 / (download) - annotate - [select for diffs], Fri Apr 29 08:26:26 2011 UTC (11 years, 9 months ago) by matt
Branch: matt-nb5-mips64
Changes since 1.1.6.1: +376 -0 lines
Diff to previous 1.1.6.1 (colored) to branchpoint 1.1 (colored)

Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code.  (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.

Revision 1.1.4.2 / (download) - annotate - [select for diffs], Sat Mar 5 20:51:06 2011 UTC (11 years, 11 months ago) by rmind
Branch: rmind-uvmplock
Changes since 1.1.4.1: +376 -0 lines
Diff to previous 1.1.4.1 (colored) to branchpoint 1.1 (colored) next main 1.2 (colored)

sync with head

Revision 1.1.2.2 / (download) - annotate - [select for diffs], Sat Mar 5 15:09:49 2011 UTC (11 years, 11 months ago) by bouyer
Branch: bouyer-quota2
Changes since 1.1.2.1: +376 -0 lines
Diff to previous 1.1.2.1 (colored) to branchpoint 1.1 (colored) next main 1.2 (colored)

Sync with HEAD

Revision 1.1.10.1, Sun Feb 20 07:45:47 2011 UTC (11 years, 11 months ago) by jruoho
Branch: jruoho-x86intr
Changes since 1.1: +0 -376 lines
FILE REMOVED

file lock_stubs_llsc.S was added on branch jruoho-x86intr on 2011-06-06 09:06:06 +0000

Revision 1.1.6.1, Sun Feb 20 07:45:47 2011 UTC (11 years, 11 months ago) by matt
Branch: matt-nb5-mips64
Changes since 1.1: +0 -376 lines
FILE REMOVED

file lock_stubs_llsc.S was added on branch matt-nb5-mips64 on 2011-04-29 08:26:26 +0000

Revision 1.1.4.1, Sun Feb 20 07:45:47 2011 UTC (11 years, 11 months ago) by rmind
Branch: rmind-uvmplock
Changes since 1.1: +0 -376 lines
FILE REMOVED

file lock_stubs_llsc.S was added on branch rmind-uvmplock on 2011-03-05 20:51:06 +0000

Revision 1.1.2.1, Sun Feb 20 07:45:47 2011 UTC (11 years, 11 months ago) by bouyer
Branch: bouyer-quota2
Changes since 1.1: +0 -376 lines
FILE REMOVED

file lock_stubs_llsc.S was added on branch bouyer-quota2 on 2011-03-05 15:09:49 +0000

Revision 1.1 / (download) - annotate - [select for diffs], Sun Feb 20 07:45:47 2011 UTC (11 years, 11 months ago) by matt
Branch: MAIN
CVS Tags: rmind-uvmplock-nbase, rmind-uvmplock-base, jym-xensuspend-nbase, jym-xensuspend-base, cherry-xenmp-base, cherry-xenmp, bouyer-quota2-nbase
Branch point for: rmind-uvmplock, matt-nb5-mips64, jruoho-x86intr, bouyer-quota2

Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU

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