CVS log for src/sys/arch/mips/include/proc.h

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Keyword substitution: kv
Default branch: MAIN

Sync w/ HEAD.

don't expose vaddr_t to userland.

include machine/vmparam.h vs mips/vmparam.h to make sure we get
platform-specific defines first.

fixes build issue for playstation2.

Define a UPAGES_MAX constant to size the a md_upte array in MIPS's
struct mdlwp.  This is exposed to userland, so we can't use something
based on PAGE_SIZE.

Use a 16kB USPACE (and larger kernel stack) for LP64 kernels.  Invert
the logic for setting the USPACE size.  Define a desired USPACE size
(16kB for LP64, 8kB otherwise) then divide by PAGE_SIZE to get UPAGES.

Fixes random segmap lossage, since the uarea usually sits immediately
above the segmap for a process.  Thanks to mrg@, skrll@ and dholland@
for testing, debugging and general help tracking down this problem.

#define<tab>
Nuke trailing whitespace.

update from HEAD

Sync with HEAD

Make vmparam.h change work with RUMP

Make these play nice with modules.

Sync with HEAD.

Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code.  (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.

sync with head

Sync with HEAD

Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU

Retire struct user, remove sys/user.h inclusions.  Note sys/user.h header
as obsolete.  Remove USER_TO_UAREA/UAREA_TO_USER macros.

Various #include fixes and review by matt@.

Add support for setting/clearing PK_32 on _LP64 kernels.  Make cpu_proc_fork
a real function and add it to vm_machdep.c and let it copy PK_32 on fork.
Properly clear/set PK_32 depending on ABI in setregs.  Lack of PX_32 use
tracked down by Cliff Neighbors.  [Ya! ps now works!]

Add kernel support for MIPS TLS.  Use rdhwr rt, $29 as defined by the MIPS
TLS spec so that Linux MIPS binaries will work.  Use sysarch(MIPS_TINFOSET, v)
to set the pointer.

sync with head

Change md_astpending to u_int

Split FPU support into separate file and keep internals private to that file.
Make it MPSAFE.  Change interface to be very similar to what's used on other
architectures.
Add l_md.md_fpcpu to mdlwp (needed for MPSAFE)
Move pridtab from <mips/cpu.h> to <mips/locore.h>
Add initial common IPI dispatcher.
Split cpu_* routines from mips_machdep.c into cpu_subr.c
Add cpu_startup_common which has the code replicated in half-dozen
plus machdep.c files.

Merge frame into trapframe.  While this costs a bit more stack space on
kernel exceptions, the resulting simplifications are worth it.  This is
a step to fast softints and kernel preemption.

trapframe now includes a struct reg instead of a separate array of registers.

Please segtab lookups into separate file.
Add mips_add_physload
Add mips_init_lwp0_uarea
cleanup lwp0/cpu_info_store initialization.

Merge from matt-nb5-mips64
Merge mips-specific arch files.

Use lwp_getpcb() on mips, powerpc and sh3, clean from struct user usage.

sync with head

Make sure this is quad-word (16 byte) aligned.  Thus when one is allocated
on the stack, the stack stays 16 byte aligned.

No need for md_fancy anymore since p_trace_enabled already has what we want.

Change md_regs in mdlwp to struct frame * from void *.  Every use just casts
it to struct frame * anyways so enforce the type.
Add p_abi which indicates the ABI of the process.

include mips/vmparam.h to get PAGE_SIZE

sync with head.

Only include md_uptes if USPACE > PAGE_SIZE

sync with HEAD

sync with head

Sync with HEAD.

Sync with HEAD.

Sync with HEAD.

Sync with HEAD

s/proc/lwp/ in comment

Change last argument for plain/fancy syscall to vaddr_t (since it's the
address of the opcode).  Add a md_abi field.

sync with head.

Merge newlock2 to head.

The TLB miss handler doesn't need to worry about RAS, oops.

Make mips systems work.

Checkpoint work in progress.

sync with head.

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

Merge the nathanw_sa branch.

md_ss_addr is now vaddr_t.

Catch up to -current

Make md_ss_addr a vaddr_t.

Catch up to -current.
(CVS: It's not just a program. It's an adventure!)

Catch up with -current.

ANSIfy.

Sync kqueue branch with -current.

#include <sys/param.h> which is required for definition of UPAGES

forward decl of "struct proc" should be "struct lwp"

Split mdproc components into lwp-specific structure struct mdlwp

file proc.h was added on branch nathanw_sa on 2001-11-17 23:18:22 +0000

R5900 support.
 COP0_SYNC
	In R5900 mtc0, tlbr, tlbp, tlbwi, tlbwr must be followed by sync.p.
	if defined MIPS3_5900, COP0_SYNC is defined as sync.p. else nothing.
 IPL_ICU_MASK
	mask interrupt directly ICU instead of SR.IM.
	I've added this feature to support software interrupt for R5900.
	and this option may be useful for platform which has cascaded ICU.

Sync with head (for UBC+NFS fixes, mostly).

New syscall entry implementation based on the Alpha version
as hacked by mycroft.
- Use syscall_intern() to give a process a plain or fancy
  syscall based on ktrace flags.
- Avoid copying from the trapframe into a local array as much
  as possible.

Yields roughly 5% improvement on a 25MHz R3000 (DECstation 5000/200)
on a simple syscall benchmark.

There's still some work that can be done using __HAVE_MINIMAL_EMUL.

Make the astpending flag per-process.

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

Don't `extern' function declarations.  While we're there, remove trailing
blank lines and white space.

* Create mips_reg_t data type to allow register size to be
  decoupled from long or int or long long.  Define macros in asm.h to facilitate
  choosing these on a port by port basis.

* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
  to be calculated at system build time.

* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
  for the architecture.  For 64-bit oriented systems set the Status Register
  to allow 64-bit instructions.

* Remove UADDR related macros because kernel U structure is now mapped
  normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors

- Forgot to commit many files for vm_offset_t purge last Monday.

DDB for mips.
  Add DDB interface to /sys/arch/mips/mips..
  Rework heuristic stack traceback to work with DDB.
  Add hooks  to print exception log from DDB.
  Add hooks from pmax console drivers:   call Debugger()
  after break from serial console, or 'DO' key from LK-xxx.

From Toru Nishimura:  user pcb/proc changes for exception handling and
removing access through UADDR.

Add #ifdef _KERNEL/#endif around prototype of mips single-step emulator.

Add "struct proc;" inside the ifdef: <sys/proc.h> includes <machine/proc.h>
before declaring struct proc.

Rename cpu_singlstep() to mips_singlestep() and add prototype.
(it's not part of the standard interface to MD code.)

XXX Consider moving into process_machdep.c when the mips3 changes are merged.

new RCS ID format.

bsd 4.4-lite pmax port as ported to NetBSD

upgrade to bsd 4.4-lite code base. only mod is rcsids

pmax code from <ralphc@pyramid.com> & <rick@snowhite.cis.uoguelph.ca>

Initial revision