CVS log for src/sys/arch/mips/include/mips_param.h

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Default branch: MAIN

remove duplicate the article in comments.

Sync w/ HEAD.

sync with head

Include "opt_param.h" (ifdef _KERNEL_OPT) everywhere that MSGBUFSIZE is
referenced since some sources include <machine/param.h>.

fix "uname -p" on mips n32.

this has been returning "mipsn64eb" on my edgerouter4 with the
32 bit uname binary.

introduce o32, n32, and n64 versions of MACHINE_ARCH, and use
them appropriately in PROC_MACHINE_ARCH32().  now o32, n32 and
n64 "uname -p" all return different values.

Sync with HEAD.

KNG

Make MACHINE_ARCH for n64 binaries mipsn64e[bl] instead of mips64e[bl] to
differentiate them from n32/o32 binaries.

Define a UPAGES_MAX constant to size the a md_upte array in MIPS's
struct mdlwp.  This is exposed to userland, so we can't use something
based on PAGE_SIZE.

Use a 16kB USPACE (and larger kernel stack) for LP64 kernels.  Invert
the logic for setting the USPACE size.  Define a desired USPACE size
(16kB for LP64, 8kB otherwise) then divide by PAGE_SIZE to get UPAGES.

Fixes random segmap lossage, since the uarea usually sits immediately
above the segmap for a process.  Thanks to mrg@, skrll@ and dholland@
for testing, debugging and general help tracking down this problem.

#define<tab>
Nuke trailing whitespace.

Add a space in a comment.

Add a comment to CACHE_LINE_SIZE / COHERENCY_UNIT size defines

On second thoughts this can't be conditional so define CACHE_LINE_SIZE /
COHERENCY_UNIT as 128 for all mips.

Define CACHE_LINE_SIZE / COHERENCY_UNIT as 128 for MIPS64_OCTEON

Mostly merge changes from HEAD upto 20200411

Whitespace and whitespace consistency

Sync with HEAD

#define<tab> for consistency

update from HEAD

Sync with HEAD

Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch

Sync with HEAD

Use (uint64_t) to avoid 32-bit overflow

Don't include <machine/param.h> in .S files, get the needed values from assym.h
Define NBPG as UL to avoid integer over with NBXSEG on LP64 systems.
(.S files don't like numbers with UL appended to them).

assembly no longer include <machine/cpu.h>.  Instead MIPS_CURLWP is gotten
from regdef.h and everything else from assym.h.  <mips/mips_param.h> no
longer include <machine/cpu.h>

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

resync from head

add generic copyrights so FreeBSD can use them.

Make MIPS use a multi-level page table for the kernel address space.
(just like the user address does).   XXX fix mips1

sync with head

Make sure we don't overflow a 32-bit integer.

merge to -current.

Add ALIGNBYTES32/ALIGN32 for netbsd32.

Use and define ALIGN() ALIGN_POINTER() and STACK_ALIGN() consistently,
and avoid definining them in 10 different places if not needed.

Change CMSG_SPACE and CMSG_LEN to provide Integer Constant Expressions
again. This was changed in sys/socket.h r1.51 to work around fallout
from the IPv6 aux data migration. It broke the historic ABI on some
platforms. This commit restores compatibility for netbsd32 code on such
platforms and provides a template for future changes to the CMSG_*
alignment. Revert PCC/Clang workarounds in postfix and tmux.

Add ALIGNBYTES32/ALIGN32 (same as ALIGNBYTES/ALIGN).

Deal with not defining PAGE_SIZE or PAGE_SHIFT for non-kernel inclusion.

Make these play nice with modules.

Use MIPS_PAGE_SHIFT to define the page size to be used from a config file.
Add support for tracking which colors have been used for an EXECPAGE.

Add __cacheline_aligned and __read_mostly from -HEAD.

Add support for 8KB pages.

Sync with HEAD.

sync with head (and fix few botches with this)

sync with head

Sync with HEAD

If _KERNEL is not defined, force MACHINE to be "mips".  Userland should be
using uname/sysctl to get this value.

Major merge forward from matt-nb5-mips64.
New fixup code.
New common SPL code.
New common interrupt code.
Move related variables into structures.
Cleanup locore (move MD variable into it).
Kill StudlyCaps
Use PCU for FPU

Support user VAs > 4GB (but less than 1TB for now) using a 3 level page table.
Add debug code to help find redundant faults (PMAP_FAULTINFO).

Sync with HEAD.

sync with head

Remove separate mb_map. The nmbclusters is computed at boot time based
on the amount of physical memory and limited by NMBCLUSTERS if present.
Architectures without direct mapping also limit it based on the kmem_map
size, which is used as backing store. On i386 and ARM, the maximum KVA
used for mbuf clusters is limited to 64MB by default.

The old default limits and limits based on GATEWAY have been removed.
key_registered_sb_max is hard-wired to a value derived from 2048
clusters.

Add __HAVE_FAST_SOFTINTS support.
Add routine to remap an uarea via a direct-mapped address.  This avoids
TLB machinations when swtching to/from the softint thread.  This can only
be done for lwp which won't exit.

Merge from matt-nb5-mips64
Merge mips-specific arch files.

Add MACHINE32_ARCH definitions.

Derive NBSEG and SEGSHIFT from NBPG and PGSHIFT.

Move MACHINE_ARCH definition to <mips/mips_param.h>
Move mbuf related defines to <mips/mips_param.h>

Add a default MSIZE/MCLBYTES block here since each mips port does the same
thing.

sync with head.

Move MID_MACHINE to <mips/mips_param.h> and use local values so we don't
need to include exec_aout.h

Beginning of large-page support.

sync with head.

sync with head

sync with head.

- remove unused bdbtofsb.
- move the following macros from MD headers to sys/param.h.
	ctod
	dtoc
	ctob
	btoc
	dbtob
	btodb

Don't cast pointers using unsigned and/or int.  Use intptr_t or uintptr_t
as appropriate.

Sync with HEAD (for UBC fixes).

space -> TAB

Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.

Sync w/ netbsd-1-5-base.

make paddr_t 64bit on arc port by introducing _MIPS_PADDR_T_64BIT.

Nuke MIPS_16K_PAGE conditional which should be commited in.  It
was used for debugg'n purposes which only make senses on particular
hardware configurations and has never been intended to extend pagesize
of NetBSD/mips.

Don't pull in cpu.h in non-kernel code.

Update for the NKMEMPAGES changes.

Use the badaddr() prototype in mips/include/cpu.h by including
<machine/cpu.h> in mips/include/mips_param.h.  Remove duplicate
badaddr() prototypes from some pmax header files.

Pull up to last week's -current.

CL* discarding.

Changes for NetBSD/hpcmips.

	Support VR4100.
	Support 16KB page.
	Support CPU without FPU.

Fix virtual alias problem(physio() case).

[new options]

options		MIPS3_4100	/* VR4100 core */
options		MIPS_16K_PAGE	/* enable kernel support for 16k pages  */
options		SOFTFLOAT 	/* No FPU; avoid touching FPU registers */

Sync w/ -current.

Nuke register and remove trailling white space.

Split the "mips" MACHINE_ARCH for 1.4.  newsmips is "mipseb"; pmax is
"mipsel".

* Create mips_reg_t data type to allow register size to be
  decoupled from long or int or long long.  Define macros in asm.h to facilitate
  choosing these on a port by port basis.

* Create <machine/pubassym.h> mechanism to allow jmp_buf structure size
  to be calculated at system build time.

* Define _MIPS_BSD_SIM macro which specifies what calling style is appropritae
  for the architecture.  For 64-bit oriented systems set the Status Register
  to allow 64-bit instructions.

* Remove UADDR related macros because kernel U structure is now mapped
  normally.
* Separate cpu.h into cpu.h and cpuarch.h to keep things neat.
* Add support for QED 52xx processors

Changes to sys/arch/mips from ARC port, from Noriyuki Soda <soda@sra.co.jp>.
Adds (most) support for ARC platform to port-independent mips code.

Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by
comparison to the OpenBSD 2.1 codebase of Soda's ARC port.

Open issues:
 * Still no support for r4600 or mipsIV CPUs with two-way L1 cache.
   Code derived from Per Fogelstrom's OpenBSD source  doesn't work
   on mips3 pmaxes with L2 cache.

 * Still some port-specific  #ifdefs, for interrupt enable and
   pmax L2 cache-size.  Needs more thought, but overlaps with
   work-in-progress by Tohru and Tsubai on spl()s and related stuff.

Make spl(9) rountines target port dependent.  delay() is also port
dependent anticipating a target with high resolution timer available
for on-the-fly re-programming.  Enum decstation_t was removed from MI
trap.c.

Use a reasonable default for NKMEMCLUSTERS.  Previous default value wouldn't
run multi-user for very long at all, and every kernel configuration file
overrides it!

Update marc-pcmcia branch from trunk.

Move the definition of MSGBUFSIZE up to the machine-arch level if
possible. Pointed out by Bernd Ernesti.

Update marc-pcmcia branch from trunk.

Move SSIZE and DELAY() definitions to sys/arch/mips/include/mips_param.h.
Update comment in pmax/include/param.h (pr 3988).

DDB for mips.
  Add DDB interface to /sys/arch/mips/mips..
  Rework heuristic stack traceback to work with DDB.
  Add hooks  to print exception log from DDB.
  Add hooks from pmax console drivers:   call Debugger()
  after break from serial console, or 'DO' key from LK-xxx.

Garbage-collect non-jumptable prototype for wbflush().

Move MACHINE_ARCH and _MACHINE_ARCH from pmax/include/param.h to
mips/include/mips_param.h.  (They should be common to all mips ports.)

Merge in changes from Trunk

Define ALIGNED_POINTER
(missed when other <arch>/include/param.h files were updated)

Remove common-across-all-MIPS-cpu definitions (e.g., user-level-visible
page/segment size definitions and macros) from pmax/include/param.h,
and move them to mips/include/mips_param.h.