CVS log for src/sys/arch/mips/cavium/octeon_misc.c

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Default branch: MAIN

Revision 1.2 / (download) - annotate - [select for diffs], Sun Feb 6 20:20:19 2022 UTC (11 months, 3 weeks ago) by andvar
Branch: MAIN
CVS Tags: netbsd-10-base, netbsd-10, bouyer-sunxi-drm-base, bouyer-sunxi-drm, HEAD
Changes since 1.1: +3 -3 lines
Diff to previous 1.1 (colored)

fix various typos in comments, log messages and documentation.
mainly s/aparently/apparently/ and s/implmented/implemented/.

Revision 1.1 / (download) - annotate - [select for diffs], Mon Jun 15 07:48:12 2020 UTC (2 years, 7 months ago) by simonb
Branch: MAIN
CVS Tags: thorpej-i2c-spi-conf2-base, thorpej-i2c-spi-conf2, thorpej-i2c-spi-conf-base, thorpej-i2c-spi-conf, thorpej-futex2-base, thorpej-futex2, thorpej-futex-base, thorpej-futex, thorpej-cfargs2-base, thorpej-cfargs2, thorpej-cfargs-base, thorpej-cfargs, cjep_sun2x-base1, cjep_sun2x-base, cjep_sun2x, cjep_staticlib_x-base1, cjep_staticlib_x-base, cjep_staticlib_x

Finish CPU core support for Octeon Cavium CN70XX:
 - decode actual CPU name
 - per CPU core reset logic (partially adapted from OpenBSD)
 - handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)

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