CVS log for src/sys/arch/ia64/ia64/machdep.c

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Pull up following revision(s) (requested by riastradh in ticket #1859):

	sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
	sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
	sys/arch/aarch64/aarch64/locore.S: revision 1.91
	sys/arch/mips/include/asm.h: revision 1.74
	sys/arch/hppa/include/cpu.h: revision 1.13
	sys/arch/arm/arm/armv6_start.S: revision 1.38
	 (applied also to sys/arch/arm/cortex/a9_mpsubr.S,
	 sys/arch/arm/cortex/a9_mpsubr.S,
	 sys/arch/arm/cortex/cortex_init.S)
	sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
	sys/arch/mips/mips/locore.S: revision 1.229
	sys/arch/alpha/include/asm.h: revision 1.45
	 (applied to sys/arch/alpha/alpha/multiproc.s)
	sys/arch/sparc64/sparc64/locore.s: revision 1.432
	sys/arch/vax/vax/subr.S: revision 1.42
	sys/arch/mips/mips/locore_mips3.S: revision 1.116
	sys/arch/ia64/ia64/machdep.c: revision 1.44
	sys/arch/arm/arm32/cpuswitch.S: revision 1.106
	sys/arch/sparc/sparc/locore.s: revision 1.284
	(all via patch)

aarch64: Add missing barriers in cpu_switchto.
Details in comments.

Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.

PR kern/57240

alpha: Add missing barriers in cpu_switchto.
Details in comments.

arm32: Add missing barriers in cpu_switchto.
Details in comments.

hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?

ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)

mips: Add missing barriers in cpu_switchto.
Details in comments.

powerpc: Add missing barriers in cpu_switchto.
Details in comments.

sparc: Add missing barriers in cpu_switchto.

sparc64: Add missing barriers in cpu_switchto.
Details in comments.

vax: Note where cpu_switchto needs barriers.

Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.

Pull up following revision(s) (requested by riastradh in ticket #1676):

	sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
	sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
	sys/arch/aarch64/aarch64/locore.S: revision 1.91
	sys/arch/mips/include/asm.h: revision 1.74
	sys/arch/hppa/include/cpu.h: revision 1.13
	sys/arch/arm/arm/armv6_start.S: revision 1.38
	sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
	sys/arch/mips/mips/locore.S: revision 1.229
	sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
	sys/arch/alpha/include/asm.h: revision 1.45
	sys/arch/sparc64/sparc64/locore.s: revision 1.432
	sys/arch/vax/vax/subr.S: revision 1.42
	sys/arch/mips/mips/locore_mips3.S: revision 1.116
	sys/arch/ia64/ia64/machdep.c: revision 1.44
	sys/arch/arm/arm32/cpuswitch.S: revision 1.106
	sys/arch/sparc/sparc/locore.s: revision 1.284
	(all via patch)

aarch64: Add missing barriers in cpu_switchto.
Details in comments.

Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.

PR kern/57240

alpha: Add missing barriers in cpu_switchto.
Details in comments.

arm32: Add missing barriers in cpu_switchto.
Details in comments.

hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?

ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)

mips: Add missing barriers in cpu_switchto.
Details in comments.

powerpc: Add missing barriers in cpu_switchto.
Details in comments.

sparc: Add missing barriers in cpu_switchto.

sparc64: Add missing barriers in cpu_switchto.
Details in comments.

vax: Note where cpu_switchto needs barriers.

Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.

Pull up following revision(s) (requested by riastradh in ticket #264):

	sys/arch/ia64/ia64/vm_machdep.c: revision 1.18
	sys/arch/powerpc/powerpc/locore_subr.S: revision 1.67
	sys/arch/aarch64/aarch64/locore.S: revision 1.91
	sys/arch/mips/include/asm.h: revision 1.74
	sys/arch/hppa/include/cpu.h: revision 1.13
	sys/arch/arm/arm/armv6_start.S: revision 1.38
	sys/arch/evbmips/ingenic/cpu_startup.S: revision 1.2
	sys/arch/mips/mips/locore.S: revision 1.229
	sys/arch/aarch64/aarch64/cpuswitch.S: revision 1.40
	sys/arch/alpha/include/asm.h: revision 1.45
	sys/arch/sparc64/sparc64/locore.s: revision 1.432
	sys/arch/vax/vax/subr.S: revision 1.42
	sys/arch/mips/mips/locore_mips3.S: revision 1.116
	sys/arch/riscv/riscv/cpu_switch.S: revision 1.3
	sys/arch/ia64/ia64/machdep.c: revision 1.44
	sys/arch/arm/arm32/cpuswitch.S: revision 1.106
	sys/arch/sparc/sparc/locore.s: revision 1.284

aarch64: Add missing barriers in cpu_switchto.
Details in comments.

Note: This is a conservative change that inserts a barrier where
there was a comment saying none is needed, which is probably correct.
The goal of this change is to systematically add barriers to be
confident in correctness; subsequent changes may remove some bariers,
as an optimization, with an explanation of why each barrier is not
needed.

PR kern/57240

alpha: Add missing barriers in cpu_switchto.
Details in comments.

arm32: Add missing barriers in cpu_switchto.
Details in comments.

hppa: Add missing barriers in cpu_switchto.
Not sure hppa has ever had working MULTIPROCESSOR, so maybe no
pullups needed?

ia64: Add missing barriers in cpu_switchto.
(ia64 has never really worked, so no pullups needed, right?)

mips: Add missing barriers in cpu_switchto.
Details in comments.

powerpc: Add missing barriers in cpu_switchto.
Details in comments.

riscv: Add missing barriers in cpu_switchto.
Details in comments.

sparc: Add missing barriers in cpu_switchto.

sparc64: Add missing barriers in cpu_switchto.
Details in comments.

vax: Note where cpu_switchto needs barriers.

Not sure vax has ever had working MULTIPROCESSOR, though, and I'm not
even sure how to spell store-before-load barriers on VAX, so no
functional change for now.

ia64: Add missing barriers in cpu_switchto.

(ia64 has never really worked, so no pullups needed, right?)

PR kern/57240

Sync with HEAD

In map_vhpt(), read pmap_vhpt_log2size before any memory translation
instructions to avoid "Data Nested TLB faults" with GCC 7.4.0

Overhaul the API used to fetch and store individual memory cells in
userspace.  The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms.  The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).

Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.

Welcome to NetBSD 8.99.37.

Sync with HEAD

Add DPRINTF function, use kstack variable for proc0 memory, reorder some functions so ci initialized before use

Sync with HEAD, resolve a couple of conflicts

enable some incorrectly commented-out code

- When forking, use own register stack for each thread
- For UAREA, arrange layout same as FreeBSD for now to hopefully
  ease porting woes.  add some related macros
  locore.S is incorrectly assuming same layout and seems painful
  to change bspstore in startup
- use ia64_init_return same as FreeBSD
- change some "printf" to "panic" for incompleted items

context switching is still broken but maybe less so

update from HEAD

Sync with HEAD

Sync with HEAD

Sync with HEAD

Add more from FreeBSD

Sync with HEAD

Sync with HEAD.  (Note that most of these changes are simply $NetBSD$
tag issues.)

"Make NetBSD great again!"

Introduce uvm_hotplug(9) to the kernel.

Many thanks, in no particular order to:

TNF, for funding the project.

Chuck Silvers - for multiple API reviews and feedback.
Nick Hudson - for testing on multiple architectures and bugfix patches.
Everyone who helped with boot testing.

KeK (http://www.kek.org.in) for hosting the primary developers.

switch all ports to use uvm_init.c:uvm_md_init()

uvm_setpagesize() is now subsumed within this funciton.

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Tweak the argument order passed to the elf executable entry point (usually "__start"),
so as to make call to the C function ___start() easier from assembler.
We setup the memory stack frame for ___start(), before calling it.

resync with head

sync with head

sync with (a bit old) head

Call main() in locore.S.  like other arch.

Resync to 2012-11-19 00:00:00 UTC

add a stub cpu_mcontext_validate().

sync with head

Remove declartions of physmem

sync with head

sync to -current.

Remove COMPAT_SA / KERN_SA.  Welcome to 6.99.3!
Approved by core@.

fix build errors with gcc 4.5.

Catchup with rmind-uvmplock merge.

Welcome to 5.99.53!  Merge rmind-uvmplock branch:

- Reorganize locking in UVM and provide extra serialisation for pmap(9).
  New lock order: [vmpage-owner-lock] -> pmap-lock.

- Simplify locking in some pmap(9) modules by removing P->V locking.

- Use lock object on vmobjlock (and thus vnode_t::v_interlock) to share
  the locks amongst UVM objects where necessary (tmpfs, layerfs, unionfs).

- Rewrite and optimise x86 TLB shootdown code, make it simpler and cleaner.
  Add TLBSTATS option for x86 to collect statistics about TLB shootdowns.

- Unify /dev/mem et al in MI code and provide required locking (removes
  kernel-lock on some ports).  Also, avoid cache-aliasing issues.

Thanks to Andrew Doran and Joerg Sonnenberger, as their initial patches
formed the core changes of this branch.

Sync with HEAD.

sync with head

Sync with HEAD

Refactor ps_strings access. Based on PK_32, write either the normal
version or the 32bit compat layout in execve1. Introduce a new function
copyin_psstrings for reading it back from userland and converting it to
the native layout. Refactor procfs to share most of the code with the
kern.proc_args sysctl handler.

This material is based upon work partially supported by
The NetBSD Foundation under a contract with Joerg Sonnenberger.

Typon.

Pull in uvm/uvm.h for vm_nphysseg.

Use more VM_PHYSMEM_*() accessors.  No functional changes.

Sync with HEAD.

sync with head.

sync with head

Move identifycpu() into cpu.c.  Our cpu* says:
  cpu0 at mainbus0: ProcessorID 0, Id 0, Eid 0
  cpu0: McKinley (1000.00-MHz Itanium 2)
  cpu0: Origin "GenuineIntel",  Revision 7
  cpu0: Features 0x1

Sync with HEAD.

Always use struct vm_physseg *vm_physmem_ptrs[] in MD code.

Unify /dev/{mem,kmem,zero,null} implementations in MI code.  Based on patch
from Joerg Sonnenberger, proposed on tech-kern@, in February 2008.

Work and depression still in progress.

sync with head

Remove separate mb_map. The nmbclusters is computed at boot time based
on the amount of physical memory and limited by NMBCLUSTERS if present.
Architectures without direct mapping also limit it based on the kmem_map
size, which is used as backing store. On i386 and ARM, the maximum KVA
used for mbuf clusters is limited to 64MB by default.

The old default limits and limits based on GATEWAY have been removed.
key_registered_sb_max is hard-wired to a value derived from 2048
clusters.

Change u_long to vaddr_t/vsize_t in exec code where appropriate (mostly
involves setregs and vmcmds).  Should result in no code differences.

Pass pcb_fpcpu_slock correctly, since pcb0 is a pointer.
Fixes ia64 build (hi matt@).

- Use uvm_lwp_setuarea() instead of directly setting address to lwp_t::l_addr.
- Replace most remaining uses of l_addr with uvm_lwp_getuarea() or lwp_getpcb().
- Amend assembly in ports where it accesses PCB via struct user.
- Rename L_ADDR to L_PCB in few places.  Reduce sys/user.h inclusions.

Kill proc0paddr.  Use lwp0.l_addr instead.

Use lwp_getpcb() on hppa and ia64, clean from struct user usage.

sync with head

Typo fix: Mhz -> MHz

No functional change intended.

sync with head.

Fix little bit, and add a few files.
  current status is to see following thread.
    http://mail-index.netbsd.org/port-ia64/2009/06/18/msg000102.html
Also call banner().

Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.

sync with head.

Sync with HEAD.

bzero -> memset

Ansify function definitions w/o arguments. Generated with sed.

Sync with HEAD.

Use "defopt MODULAR" in sys/conf/files, and #include "opt_modular.h"
in all kernel sources that use the MODULAR option.
Proposed in tech-kern on 18 Jan 2009.

Sync with HEAD.

Sync with HEAD.

Update haad-dm branch to haad-dm-base2.

As discussed on tech-kern: mutex_init is too heavyweight for early bootstrap
phases, so move the initialization of the ksyms mutex back into main via
a function called ksyms_init. Rename the existing (but quite different)
ksyms_init* variations into ksyms_addsyms_elf() and ksyms_addsyms_explicit()
and adapt machdep code accordingly.

Remove LKMs and switch to the module framework, pass 1.

Proposed on tech-kern@.

Sync with HEAD.

Merge wrstuden-revivesa into HEAD.

Sync with wrstuden-revivesa-base-2.

Sync with head.

Sync with HEAD.

Replce exec_map with a pool. Proposed on tech-kern@, reviewed by chs@.

Re-add cpu_upcall() and page fault code. i386 kernels now compile.
They don't boot, but that seems to be a consequence of current from the
day this branch was started.

Sync with HEAD.

sync with head.

sync with head.

Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.

Also, kern_sa.c has received partial cleanup. There's still more
to do, though.

Remove clause 3 and 4 from TNF licenses

Sync with HEAD.

sync with head.

sync with head.

sync with HEAD

Make ia64 kernel of GENERIC.SKI config compile.
Only compile tested.

sync with head.

Sync with HEAD.

Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

TRUE -> true, FALSE -> false

sync with head.

Merge newlock2 to head.

Remove support for SA. Ok core@.

sync with head.

sync with head.

sync with head

file machdep.c was added on branch rpaulo-netinet-merge-pcb on 2006-09-09 02:40:23 +0000

fix unaligned vendor string array. showed up during a gcc4 compile.

sync with head

Merge from HEAD.

towards exec(): first round at fixing USPACE

sync with head.

Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.

Sync with head.

sync with head - hopefully this will work

sync with head

file machdep.c was added on branch yamt-lazymbuf on 2006-06-21 14:52:47 +0000

file machdep.c was added on branch peter-altq on 2006-05-24 15:47:59 +0000

file machdep.c was added on branch simonb-timecounters on 2006-04-22 11:37:36 +0000

file machdep.c was added on branch elad-kernelauth on 2006-04-19 02:32:51 +0000

file machdep.c was added on branch yamt-pdpolicy on 2006-04-11 11:53:27 +0000

Initial import of arch/ia64 sources.
These sources are ported from FreeBSD/ia64 code.
See individual source files for credits.
In addition, code from NetBSD/alpha NetBSD/sparc64,
NetBSD/i386 and NetBSD/amd64 were used as templates,
along with my own additions.