CVS log for src/sys/arch/i386/i386/trap.c

Up to [cvs.NetBSD.org] / src / sys / arch / i386 / i386

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Keyword substitution: kv
Default branch: MAIN

Arrange to update cached LWP credentials in userret() rather than during
syscall/trap entry, eliminating a test+branch on every syscall/trap.

This wasn't possible in the 3.99.x timeframe when l->l_cred came about
because there wasn't a reliable/timely way to force an ONPROC LWP running on
a remote CPU into the kernel (which is just about the only new thing in
this scheme).

x86: Split most of pmap.h into pmap_private.h or vmparam.h.

This way pmap.h only contains the MD definition of the MI pmap(9)
API, which loads of things in the kernel rely on, so changing x86
pmap internals no longer requires recompiling the entire kernel every
time.

Callers needing these internals must now use machine/pmap_private.h.
Note: This is not x86/pmap_private.h because it contains three parts:

1. CPU-specific (different for i386/amd64) definitions used by...

2. common definitions, including Xenisms like xpmap_ptetomach,
   further used by...

3. more CPU-specific inlines for pmap_pte_* operations

So {amd64,i386}/pmap_private.h defines 1, includes x86/pmap_private.h
for 2, and then defines 3.  Maybe we should split that out into a new
pmap_pte.h to reduce this trouble.

No functional change intended, other than that some .c files must
include machine/pmap_private.h when previously uvm/uvm_pmap.h
polluted the namespace with pmap internals.

Note: This migrates part of i386/pmap.h into i386/vmparam.h --
specifically the parts that are needed for several constants defined
in vmparam.h:

VM_MAXUSER_ADDRESS
VM_MAX_ADDRESS
VM_MAX_KERNEL_ADDRESS
VM_MIN_KERNEL_ADDRESS

Since i386 needs PDP_SIZE in vmparam.h, I added it there on amd64
too, just to keep things parallel.

x86: rename PGEX_X -> PGEX_I

To match the x86 specification and the other OSes.

- fix lcall test
- refactor all the TRAP_SIGDEBUG printfs and use hexdump like we did on
  amd64

PR/55547: Dan Plassche: Fix BSD/OS binary emulation.
Centralize lcall sniffer and recognize the BSD/OS flavor.

Introduce per-cpu IDTs

This is realized by following modifications:
- Add IDT pages and its allocation maps for each cpu in "struct cpu_info"
- Load per-cpu IDTs at cpu_init_idt(struct cpu_info*)
- Copy the IDT entries for cpu0 to other CPUs at attach
   - These are, for example, exceptions, db, system calls, etc.

And, added a kernel option named PCPU_IDT to enable the feature.

Mostly merge changes from HEAD upto 20200411

Merge changes from current as of 20200406

mi_userret(): take care of calling preempt(), set spc_curpriority directly,
and remove MD code that does the same.

Use common code for SMEP/SMAP panic to print more information and
allow debugging.

Sync with HEAD

 Use PRIxREGISTER suggested by Kamil.

Overhaul the API used to fetch and store individual memory cells in
userspace.  The old fetch(9) and store(9) APIs (fubyte(), fuword(),
subyte(), suword(), etc.) are retired and replaced with new ufetch(9)
and ustore(9) APIs that can return proper error codes, etc. and are
implemented consistently across all platforms.  The interrupt-safe
variants are no longer supported (and several of the existing attempts
at fuswintr(), etc. were buggy and not actually interrupt-safe).

Also augmement the ucas(9) API, making it consistently available on
all plaforms, supporting uniprocessor and multiprocessor systems, even
those that do not have CAS or LL/SC primitives.

Welcome to NetBSD 8.99.37.

s/ the the / the /

We reorganise definitions for XEN source support as follows:

XEN - common sources required for baseline XEN support.
XENPV - sources required for support of XEN in PV mode.
XENPVHVM - sources required for support for XEN in HVM mode.
XENPVH - sources required for support for XEN in PVH mode.

- add or adjust /* FALLTHROUGH */ where appropriate
- add __unreachable() after functions that can return but won't in
  this case, and thus can't be marked __dead easily

Pull up following revision(s) (requested by taca in ticket #945):

	sys/arch/i386/i386/trap.c: revision 1.290

Don't use a const variable as an array size, because it is not a
constant expression and will cause the array to needlessly become a
variable-size one.  Fixes "error: stack protector not protecting local
variables: variable length buffer [-Werror=stack-protector]" when
building i386 with MKDEBUG=YES -V COPTS="-g".

Sync with HEAD

Rework dbregs, to switch the registers during context switches, and not on
each user->kernel transition via userret. Reloads of DR6/DR7 are expensive
on both native and xen.

Sync with HEAD

Fix compilation on Xen.

Mitigation for CVE-2018-8897 on i386. Contrary to amd64 there is no clear
way to determine if we are in kernel mode but with the user context; so we
go the hard way, and scan the IDT.

On i386 the bug is less of a problem, since we don't have GSBASE. All an
attacker can do is panicking the system.

Unconditionally print the trap like we do for amdt64 (Dimitris Karagkasidis)

Add SMAP support for i386.

update from HEAD

Remove the second argument from USERMODE and KERNELMODE, it is unused
now that we don't have vm86 anymore.

Don't use a const variable as an array size, because it is not a
constant expression and will cause the array to needlessly become a
variable-size one.  Fixes "error: stack protector not protecting local
variables: variable length buffer [-Werror=stack-protector]" when
building i386 with MKDEBUG=YES -V COPTS="-g".

Sync with HEAD

Remove vm86. Simplifies a number of critical places.

Pass 2.

Pull up following revision(s) (requested by maxv in ticket #1464):

	sys/arch/i386/i386/trap.c:     revision 1.288		(patch)
	sys/arch/i386/i386/machdep.c:  revision 1.783		(patch)
	sys/arch/i386/i386/locore.S:   revision 1.146		(patch)
	sys/arch/amd64/amd64/locore.S: revision 1.122,1.124	(patch)
	sys/arch/amd64/amd64/machdep.c revision 1.254		(patch)
	sys/arch/amd64/amd64/trap.c:   revision 1.95-1.96	(patch)

Remove the osyscall call gate and emulate it. There is a
one-instruction race in it that could panic the kernel.

Restore the ability to run netbsd 1.0 32-bit executables by checking
for the relevant lcall instruction in the trap handler and treating it
as a syscall.

Pull up following revision(s) (requested by maxv in ticket #1464):

	sys/arch/i386/i386/trap.c:     revision 1.288		(patch)
	sys/arch/i386/i386/machdep.c:  revision 1.783		(patch)
	sys/arch/i386/i386/locore.S:   revision 1.146		(patch)
	sys/arch/amd64/amd64/locore.S: revision 1.122,1.124	(patch)
	sys/arch/amd64/amd64/machdep.c revision 1.254		(patch)
	sys/arch/amd64/amd64/trap.c:   revision 1.95-1.96	(patch)

Remove the osyscall call gate and emulate it. There is a
one-instruction race in it that could panic the kernel.

Restore the ability to run netbsd 1.0 32-bit executables by checking
for the relevant lcall instruction in the trap handler and treating it
as a syscall.

Pull up following revision(s) (requested by maxv in ticket #1464):

	sys/arch/i386/i386/trap.c:     revision 1.288		(patch)
	sys/arch/i386/i386/machdep.c:  revision 1.783		(patch)
	sys/arch/i386/i386/locore.S:   revision 1.146		(patch)
	sys/arch/amd64/amd64/locore.S: revision 1.122,1.124	(patch)
	sys/arch/amd64/amd64/machdep.c revision 1.254		(patch)
	sys/arch/amd64/amd64/trap.c:   revision 1.95-1.96	(patch)

Remove the osyscall call gate and emulate it. There is a
one-instruction race in it that could panic the kernel.

Restore the ability to run netbsd 1.0 32-bit executables by checking
for the relevant lcall instruction in the trap handler and treating it
as a syscall.

Pull up following revision(s) (requested by maxv in ticket #1441):
	sys/arch/i386/i386/trap.c: revision 1.288 via patch
	sys/arch/i386/i386/machdep.c: revision 1.783 via patch
	sys/arch/i386/i386/locore.S: revision 1.146 via patch
	sys/arch/amd64/amd64/locore.S: revision 1.124 via patch
Remove the osyscall call gate on i386, and emulate it. There is a one-
instruction race in it that could panic the kernel.

Pull up following revision(s) (requested by maxv in ticket #1441):
	sys/arch/i386/i386/trap.c: revision 1.288 via patch
	sys/arch/i386/i386/machdep.c: revision 1.783 via patch
	sys/arch/i386/i386/locore.S: revision 1.146 via patch
	sys/arch/amd64/amd64/locore.S: revision 1.124 via patch
Remove the osyscall call gate on i386, and emulate it. There is a one-
instruction race in it that could panic the kernel.

Pull up following revision(s) (requested by maxv in ticket #1441):
	sys/arch/i386/i386/trap.c: revision 1.288 via patch
	sys/arch/i386/i386/machdep.c: revision 1.783 via patch
	sys/arch/i386/i386/locore.S: revision 1.146 via patch
	sys/arch/amd64/amd64/locore.S: revision 1.124 via patch
Remove the osyscall call gate on i386, and emulate it. There is a one-
instruction race in it that could panic the kernel.

Pull up following revision(s) (requested by maxv in ticket #88):
	sys/arch/amd64/amd64/locore.S: revision 1.124
	sys/arch/i386/i386/locore.S: revision 1.146
	sys/arch/i386/i386/machdep.c: revision 1.783
	sys/arch/i386/i386/trap.c: revision 1.288
Remove the osyscall call gate on i386, and emulate it. There is a one-
instruction race in it that could panic the kernel.

Remove the osyscall call gate on i386, and emulate it. There is a one-
instruction race in it that could panic the kernel.

Sync with HEAD

Pull up following revision(s) (requested by maxv in ticket #1446):
	sys/arch/amd64/amd64/trap.c: revision 1.94
	sys/arch/i386/i386/trap.c: revision 1.287
Mmh, allow iret to be handled when an #SS fault (T_STKFLT) happens. Even
if the sdm is far from being clear, it appears that iret can trigger an #SS
fault if %ss points to a writable but non-present segment; in which case
the kernel would panic, thinking the fault was internal to it.
In particular, userland can create a broken segment in the ldt with
USER_LDT, update its %ss with setcontext and trigger the panic. I don't
think amd64 is affected since USER_LDT does not exist there, and the
changes on tf_ss seem correct - but I'm still adding T_STKFLT for safety.

Pull up following revision(s) (requested by maxv in ticket #1446):
	sys/arch/amd64/amd64/trap.c: revision 1.94
	sys/arch/i386/i386/trap.c: revision 1.287
Mmh, allow iret to be handled when an #SS fault (T_STKFLT) happens. Even
if the sdm is far from being clear, it appears that iret can trigger an #SS
fault if %ss points to a writable but non-present segment; in which case
the kernel would panic, thinking the fault was internal to it.
In particular, userland can create a broken segment in the ldt with
USER_LDT, update its %ss with setcontext and trigger the panic. I don't
think amd64 is affected since USER_LDT does not exist there, and the
changes on tf_ss seem correct - but I'm still adding T_STKFLT for safety.

Pull up following revision(s) (requested by maxv in ticket #1446):
	sys/arch/amd64/amd64/trap.c: revision 1.94
	sys/arch/i386/i386/trap.c: revision 1.287
Mmh, allow iret to be handled when an #SS fault (T_STKFLT) happens. Even
if the sdm is far from being clear, it appears that iret can trigger an #SS
fault if %ss points to a writable but non-present segment; in which case
the kernel would panic, thinking the fault was internal to it.
In particular, userland can create a broken segment in the ldt with
USER_LDT, update its %ss with setcontext and trigger the panic. I don't
think amd64 is affected since USER_LDT does not exist there, and the
changes on tf_ss seem correct - but I'm still adding T_STKFLT for safety.

Pull up following revision(s) (requested by maxv in ticket #1391):
	sys/arch/amd64/amd64/trap.c: revision 1.94
	sys/arch/i386/i386/trap.c: revision 1.287
Mmh, allow iret to be handled when an #SS fault (T_STKFLT) happens. Even
if the sdm is far from being clear, it appears that iret can trigger an #SS
fault if %ss points to a writable but non-present segment; in which case
the kernel would panic, thinking the fault was internal to it.
In particular, userland can create a broken segment in the ldt with
USER_LDT, update its %ss with setcontext and trigger the panic. I don't
think amd64 is affected since USER_LDT does not exist there, and the
changes on tf_ss seem correct - but I'm still adding T_STKFLT for safety.

Pull up following revision(s) (requested by maxv in ticket #1391):
	sys/arch/amd64/amd64/trap.c: revision 1.94
	sys/arch/i386/i386/trap.c: revision 1.287
Mmh, allow iret to be handled when an #SS fault (T_STKFLT) happens. Even
if the sdm is far from being clear, it appears that iret can trigger an #SS
fault if %ss points to a writable but non-present segment; in which case
the kernel would panic, thinking the fault was internal to it.
In particular, userland can create a broken segment in the ldt with
USER_LDT, update its %ss with setcontext and trigger the panic. I don't
think amd64 is affected since USER_LDT does not exist there, and the
changes on tf_ss seem correct - but I'm still adding T_STKFLT for safety.

Pull up following revision(s) (requested by maxv in ticket #1391):
	sys/arch/amd64/amd64/trap.c: revision 1.94
	sys/arch/i386/i386/trap.c: revision 1.287
Mmh, allow iret to be handled when an #SS fault (T_STKFLT) happens. Even
if the sdm is far from being clear, it appears that iret can trigger an #SS
fault if %ss points to a writable but non-present segment; in which case
the kernel would panic, thinking the fault was internal to it.
In particular, userland can create a broken segment in the ldt with
USER_LDT, update its %ss with setcontext and trigger the panic. I don't
think amd64 is affected since USER_LDT does not exist there, and the
changes on tf_ss seem correct - but I'm still adding T_STKFLT for safety.

Sync with HEAD

Mmh, allow iret to be handled when an #SS fault (T_STKFLT) happens. Even
if the sdm is far from being clear, it appears that iret can trigger an #SS
fault if %ss points to a writable but non-present segment; in which case
the kernel would panic, thinking the fault was internal to it.

In particular, userland can create a broken segment in the ldt with
USER_LDT, update its %ss with setcontext and trigger the panic. I don't
think amd64 is affected since USER_LDT does not exist there, and the
changes on tf_ss seem correct - but I'm still adding T_STKFLT for safety.

Use frame_dump if TRAP_SIGDEBUG is enabled

This unbreaks the build of i386 ALL kernel.

improve readability of TRAP_SIGDEBUG info.
also print the trapframe info like amd64 does.

Introduce PT_GETDBREGS and PT_SETDBREGS in ptrace(2) on i386 and amd64

This interface is modeled after FreeBSD API with the usage.

This replaced previous watchpoint API. The previous one was introduced
recently in NetBSD-current and remove its spurs without any
backward-compatibility.

Design choices for Debug Register accessors:
 - exec() (TRAP_EXEC event) must remove debug registers from LWP
 - debug registers are only per-LWP, not per-process globally
 - debug registers must not be inherited after (v)forking a process
 - debug registers must not be inherited after forking a thread
 - a debugger is responsible to set global watchpoints/breakpoints with the
   debug registers, to achieve this PTRACE_LWP_CREATE/PTRACE_LWP_EXIT event
   monitoring function is designed to be used
 - debug register traps must generate SIGTRAP with si_code TRAP_DBREG
 - debugger is responsible to retrieve debug register state to distinguish
   the exact debug register trap (DR6 is Status Register on x86)
 - kernel must not remove debug register traps after triggering a trap event
   a debugger is responsible to detach this trap with appropriate PT_SETDBREGS
   call (DR7 is Control Register on x86)
 - debug registers must not be exposed in mcontext
 - userland must not be allowed to set a trap on the kernel

Implementation notes on i386 and amd64:
 - the initial state of debug register is retrieved on boot and this value is
   stored in a local copy (initdbregs), this value is used to initialize dbreg
   context after PT_GETDBREGS
 - struct dbregs is stored in pcb as a pointer and by default not initialized
 - reserved registers (DR4-DR5, DR9-DR15) are ignored

Further ideas:
 - restrict this interface with securelevel

Tested on real hardware i386 (Intel Pentium IV) and amd64 (Intel i7).

This commit enables 390 debug register ATF tests in kernel/arch/x86.
All tests are passing.

This commit does not cover netbsd32 compat code. Currently other interface
PT_GET_SIGINFO/PT_SET_SIGINFO is required in netbsd32 compat code in order to
validate reliably PT_GETDBREGS/PT_SETDBREGS.

This implementation does not cover FreeBSD specific defines in their
<x86/reg.h>: DBREG_DR7_LOCAL_ENABLE, DBREG_DR7_GLOBAL_ENABLE, DBREG_DR7_LEN_1
etc. These values tend to be reinvented by each tracer on its own. GNU
Debugger (GDB) works with NetBSD debug registers after adding this patch:

--- gdb/amd64bsd-nat.c.orig	2016-02-10 03:19:39.000000000 +0000
+++ gdb/amd64bsd-nat.c
@@ -167,6 +167,10 @@ amd64bsd_target (void)

 #ifdef HAVE_PT_GETDBREGS

+#ifndef DBREG_DRX
+#define	DBREG_DRX(d,x)	((d)->dr[(x)])
+#endif
+
 static unsigned long
 amd64bsd_dr_get (ptid_t ptid, int regnum)
 {


Another reason to stop introducing unpopular defines covering machine
specific register macros is that these value varies across generations of
the same CPU family.

GDB demo:
  (gdb) c
  Continuing.

  Watchpoint 2: traceme

  Old value = 0
  New value = 16
  main (argc=1, argv=0x7f7fff79fe30) at test.c:8
  8               printf("traceme=%d\n", traceme);

(Currently the GDB interface is not reliable due to NetBSD support bugs)

Sponsored by <The NetBSD Foundation>

Add new si_code TRAP_DBREG

It replaces previous TRAP_HWWPT and is designed to be used for debug
register traps (both watchpoints and breakpoints).

TRAP_HWWPT wasn't documented in siginfo(2) neither noted in doc/CHANGES -
- document it and add new entry in CHANGES. This move is a step towards
switch the watchpoint ptrace(2) api to PT_*DBREGS.

This code was introduced recently and has no impact on stable releases.

Sponsored by <The NetBSD Foundation>

Sync with HEAD

Embed hardware trap and its type that fired (x86), information for tracers

Now x86 throws SIGTRAP on hardware exception with:
 - si_code TRAP_HWWPT - dedicated for hw assisted watchpoint interface
 - si_trap - unchanged (T_TRCTRAP)
 - si_trap2 - watchpoint number that fired
 - si_trap3 - watchpoint specific event description

x86 returns in si_trap3 one of the field from <x86/dbregs.h>
 - X86_HW_WATCHPOINT_EVENT_FIRED - watchpoint fired
 - X86_HW_WATCHPOINT_EVENT_FIRED_AND_SSTEP - watchpoint fired under PT_STEP

Othe changes:
 - restrict more code from <x86/dbregs.h> to _KERNEL

Sponsored bt <The NetBSD Foundation>

Sync with HEAD.  (Note that most of these changes are simply $NetBSD$
tag issues.)

Torn down KSTACK_CHECK_DR0, i386-only feature to detect stack overflow

This feature was intended to detect stack overflow with CPU Debug Registers
(x86). It was never ported to other ports, neither amd64 and should be
adapted for SMP...

Currently there might be better ways to detect stack overflows like page
mapping protection. Since the number of Debug Registers is restricted
(4 on x86), torn it down completely.

This interface introduced helper functions for Debug Registers, they will
be replaced with the new <x86/dbregs.h> interface.

KSTACK_CHECK_DR0 was disabled by default and won't affect ordinary users.

Sponsored by <The NetBSD Foundation>

Sync with HEAD

Sync with HEAD

Revert my previous change. It is too severe: a fault might be happening in
the kernel page if the map is pageable - implying it is not pmap_kernel. I
thought it wouldn't be the case.

Put two KASSERTs, to make sure the fault is happening in the correct
half of the vm space when using special copy functions. It can detect
bugs where the kernel would fault when copying a kernel buffer which
it wrongly believes comes from userland.

This should be VM_MIN_KERNEL_ADDRESS, not KERNBASE.

Reduce the diff, and typo.

Sync with HEAD (as of 26th Dec)

Extend SMEP support to i386 (does not require PAE).

Sync with HEAD

fix TRAP_SIGDEBUG compilation

sync with amd64: SIGBUS for mmap out of range.

src is too big these days to tolerate superfluous apostrophes.  It's
"its", people!

Rebase to HEAD as of a few days ago.

sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs.  ("Protocol error: too many arguments")

sync with head

Mark a variable diagnostic-only, from John D. Baker.

Change i386 to use x86/fpu.c instead of i386/isa/npx.c
This changes the trap10 and trap13 code to call directly into fpu.c,
  removing all the code for T_ARITHTRAP, T_XMM and T_FPUNDA from i386/trap.c
Not all of the code thate appeared to handle fpu traps was ever called!
Most of the changes just replace the include of machine/npx.h with x86/fpu.h
  (or remove it entirely).

Remove the splurious check for EN_SW_DATACHAIN when looking at mxcsr traps.
The relevant bit is always masked out higher up.
The only place I can find a reference to a 'datachain' error is for the
  weitek 1167 fpu. Even the 8087 has the corresponding bit of the x87
  status reserved.
Quite why it has appeared here is anybodies guess.

Remove support for 'external' floating point units and the MS-DOS
  compatible method of handling floating point exceptions.
Make kernel support for teh fpu non-optional (486SX should still work).
Only 386 cpus support external fpu, and i386 support was removed years ago.
This means that the npx code no longer uses port 0xf0 or interupt 13.
All the "npx at isa" lines go from the configs, arch/i386/isa/npx.c
  is now mandatory for all i386 kernels.
I've renamed npxinit() to fpuinit() and npxinit_cpu() to fpuinit_cpu()
  to match the very similar amd64 functions.
The fpu of the boot cpu is now initialised by a direct call from
  cpu_configure(), this enables FP emulation for a 486SX.
  (for amd64 the cr0 values are set in locore.S and similar).
This fixes a long-standing bug in linux_setregs() - which did not
  save the fpu regsiters if they were active.
I've test booted a single cpu i386 kernel (using anita).
amd64 builds - none of teh changes should affect it.
The i386 XEN kernels build, but I'm not sure where they set cr0, and
  it might have got lost!

Flatten the floating point register structures bu moving the
  'environment' registers into the main strcuture.
There are x87 instructions that only affect the environment, but that
  is no real excuse for all the sub-structures.
Rename fields so that there are far fewer collisions between the two
  sets of field names.

Rename the fields of 'struct envxmm' (itself badly named) so that they
  are different from those used for the x87 fpu.
Use a union to describe the 64bit 'address' field so that it correctly
  spilt for 32bit binaries.
The freebsd emulation defined its own 'struct freebsd_env87' that the
  code just assumed matched the netbsd one.
  Since this is a hardware structure, just use the netbsd one.
This shouldn't change the binaries except that 'en_fos' used to be
  incorrectly a 32bit field.

resync with head

sync with (a bit old) head

#ifdef - #endif-ed. NMCA, NISA, NNPX, NIOAPIC, LAPIC, MPBIOS and MULTIPROCESSOR.

Resync to 2012-11-19 00:00:00 UTC

sync with head

Remove all references to KVM86.
It was only ever used by APMBIOS - and then only if an option was selected.
Probably didn't work well at all!

trap: move out info printing to trap_print() on amd64, reduce the differences
between amd64 and i386, add lowest kernel stack address.

sync with head

sync to -current.

Remove COMPAT_SA / KERN_SA.  Welcome to 6.99.3!
Approved by core@.

Apply patch, requested by jmcneill in ticket #1668:
	sys/arch/amd64/amd64/syscall.c			patch
	sys/arch/i386/i386/syscall.c			patch
	sys/arch/i386/i386/trap.c			patch
	sys/kern/kern_sig.c				patch
	sys/kern/kern_sleepq.c				patch
	sys/kern/kern_subr.c				patch
	sys/kern/sys_process.c				patch
	sys/secmodel/bsd44/secmodel_bsd44_suser.c	patch
	sys/sys/proc.h					patch
	sys/sys/ptrace.h				patch

arch/i386/i386/machdep.c, arch/amd64/amd64/machdep.c (from
arch/x86/x86/machdep.c) by christos:
Remove code that was used to avoid register spills. setcontext(2) can change
the registers, so re-fetching will produce the wrong result for trace_exit().
arch/i386/i386/trap.c by reinoud:
Fix the illegal instruction return address. It was using the value of the
cpu's %cr2 register but thats not valid:

CR2 Contains a value called Page Fault Linear Address (PFLA). When a page
fault occurs, the address the program attempted to access is stored in the CR2
register.

And this is thus NOT the illegal instruction address!
kern/kern_sig.c by christos:
PR kern/45327: Jared McNeill: ptrace: siginfo doesn't work with traced processes
When saving the signal in p->p_xstat, clear it from the pending mask, but
don't remove it from the siginfo queue, so that next time the debugger
delivers it, the original information is found.
When posting a signal from the debugger l->l_sigpendset is not set, so we
use the process pending signal and add it back to the process pending set.
Split sigget into sigget() and siggetinfo(). When a signal comes from the
debugger (l->l_sigpendset == NULL), using siggetinfo() try to fetch the
siginfo information from l->l_sigpend and then from p->p_sigpend if it
was not found. This allows us to pass siginfo information for traps from
the debugger.
don't delete signal from the debugger.
kern/kern_sleepq.c by christos:
PR kern/40594: Antti Kantee: Don't call issignal() here to determine what errno
to set for the interrupted syscall, because issignal() will consume the signal
and it will not be delivered to the process afterwards. Instead call
sigispending() (which now returns the first pending signal) and does not
consume the signal.
We need to process SA_STOP signals immediately, and not deliver them to
the process. Instead of re-structuring the code to do that, call issignal()
like before in that case. (tail -F /file^Zfg should not get interrupted).
kern/kern_subr.c by jmcneill, christos:
PR kern/45312: ptrace: PT_SETREGS can't alter system calls

Add a new PT_SYSCALLEMU request that cancels the current syscall, for
use with PT_SYSCALL.
For PT_SYSCALLEMU, no need to stop again on syscall exit.
ifdef unused variable with -UPTRACE

kern/sys_process.c, sys/proc.h, sys/ptrace.h, secmodel/bsd44/secmodel_bsd44_suser.c by jmcneill, christos:
PR kern/43681: PT_SYSCALL appears to be broken

sys_ptrace: For PT_CONTINUE/PT_SYSCALL/PT_DETACH, modify the p_trace_enabled
flag of the target process, not the calling process.
Process the signal now, otherwise calling issignal() and ignoring
the return will lose the signal if it came from the debugger
(issignal() clears p->p_xstat)
PR kern/45312: ptrace: PT_SETREGS can't alter system calls

Add a new PT_SYSCALLEMU request that cancels the current syscall, for
use with PT_SYSCALL.
PR kern/45330: ptrace: signals can alter syscall return values

process_stoptrace: defer signal processing to userret, ok christos@

Fix the illegal instruction return address. It was using the value of the
cpu's %cr2 register but thats not valid:

CR2 Contains a value called Page Fault Linear Address (PFLA). When a page
fault occurs, the address the program attempted to access is stored in the CR2
register.

And this is thus NOT the illegal instruction address!

Sync with HEAD.

bring matt-nb5-mips64 up to date with netbsd-5-1-RELEASE (except compat).

Sync with head.

sync with head

Clean up excessive #ifdef'age of NMI trap handling for amd64/i386/xen.
Handle NMI in all Xen kernels.

sync with head

Sync with HEAD

Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits.  Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

Sync with HEAD

Sync with HEAD.

sync with head.

Fix several panics that can be caused by applications using
bad segment register values with setcontext() or sigreturn().

PR/43655: Taylor R Campbell: Incorrect siginfo code's for integer zero
divide and overflow.

Apply patches (requested by chs in ticket #1424):
	sys/arch/amd64/amd64/netbsd32_machdep.c:         patch
	sys/arch/i386/i386/trap.c:                       patch
Fix several panics that can be caused by applications using
bad segment register values with setcontext() or sigreturn().

Apply patches (requested by chs in ticket #1424):
	sys/arch/amd64/amd64/netbsd32_machdep.c:         patch
	sys/arch/i386/i386/trap.c:                       patch
Fix several panics that can be caused by applications using
bad segment register values with setcontext() or sigreturn().

sync with head

Pull up following revision(s) (requested by riz in ticket #1401):
	sys/arch/i386/i386/trap.c: revisions 1.251-1.253 via patch
	sys/arch/i386/i386/vector.S: revisions 1.50-1.51 via patch
If we fault on the 'iret' during return to userpace (eg if %eip is outside
the bounds of %cs) then hack the stack to contain a normal fault frame
for the signal setup code (etc).
Previously the code assumed that the original user trap frame was still
present - at it is for faults when loading the segment registers.
--
If we fault on the iret during return to userspace, see if we need to
do a lazy update of %cs to make the stack executable.
If a change is made, just retry the failing sequence.
Signal handlers as gcc nested local functions now work!
--
Fix 'fault on load of %gs during retirn to userspace' to look for the
 correct instruction bytes.
Take the 'fault on load segment register' through the same path as 'fault
 on iret' so we don't have to fixup the broken stackframe that contains a
 mix of user and kernel registers,
Update comments about how the faults during return to userspace are processed.
Setting an invalid %gs in the saved context of a signal handler causes
 a SIGSEGV handler to be entered with what look like valid registers.

Pull up following revision(s) (requested by riz in ticket #1401):
	sys/arch/i386/i386/trap.c: revisions 1.251-1.253 via patch
	sys/arch/i386/i386/vector.S: revisions 1.50-1.51 via patch
If we fault on the 'iret' during return to userpace (eg if %eip is outside
the bounds of %cs) then hack the stack to contain a normal fault frame
for the signal setup code (etc).
Previously the code assumed that the original user trap frame was still
present - at it is for faults when loading the segment registers.
--
If we fault on the iret during return to userspace, see if we need to
do a lazy update of %cs to make the stack executable.
If a change is made, just retry the failing sequence.
Signal handlers as gcc nested local functions now work!
--
Fix 'fault on load of %gs during retirn to userspace' to look for the
 correct instruction bytes.
Take the 'fault on load segment register' through the same path as 'fault
 on iret' so we don't have to fixup the broken stackframe that contains a
 mix of user and kernel registers,
Update comments about how the faults during return to userspace are processed.
Setting an invalid %gs in the saved context of a signal handler causes
 a SIGSEGV handler to be entered with what look like valid registers.

Enable the NX bit feature for Xen i386pae and amd64 kernels.

Tested with Xen 3.1 and Xen 3.3, dom0 and domU, by bouyer@ and jym@.

Ok bouyer@.

Sync with HEAD.

Remove lwp_uc_pool, replace it with kmem(9), plus add some consistency.
As discussed, a while ago, with ad@.

sync with head

DTrace: missed the opt_dtrace.h include for these.

Add the DTrace hooks to the kernel (KDTRACE_HOOKS config option).
DTrace adds a pointer to the lwp and proc structures which it uses to
manage its state.  These are opaque from the kernel perspective to keep
the kernel free of CDDL code. The state arenas are kmem_alloced and freed
as proccesses and threads are created and destoyed.

Also add a check for trap06 (privileged/illegal instruction) so that
DTrace can check for D scripts that may have triggered the trap so it
can clean up after them and resume normal operation.

Ok with core@.

Fix 'fault on load of %gs during retirn to userspace' to look for the
  correct instruction bytes.
Take the 'fault on load segment register' through the same path as 'fault
  on iret' so we don't have to fixup the broken stackframe that contains a
  mix of user and kernel registers,
Update comments about how the faults during return to userspace are processed.
Setting an invalid %gs in the saved context of a signal handler causes
  a SIGSEGV handler to be entered with what look like valid registers.

If we fault on the iret during return to userspace, see if we need to
do a lazy update of %cs to make the stack executable.
If a change is made, just retry the failing sequence.
Signal handlers as gcc nested local functions now work!

If we fault on the 'iret' during return to userpace (eg if %eip is outside
the bounds of %cs) then hack the stack to contain a normal fault frame
for the signal setup code (etc).
Previously the code assumed that the original user trap frame was still
present - at it is for faults when loading the segment registers.

Use lwp_getpcb() on x86 MD code, clean from struct user usage.

return_address(9) can be called from interrupt context; handle its
page faults appropriately.

Sync with HEAD.

Improve readability of trap() by extracting two subroutines,
trap_print() and check_dr0().

sync with head.

Reduce the difference between i386 and amd64 trap handler.
No functional changes intended.

Fix KASSERT(1);

remove Xen2 support.
ok bouyer@

Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.

sync with head.

Sync with HEAD.

Pull up following revision(s) (requested by mrg in ticket #609):
	sys/arch/i386/i386/vector.S: revision 1.44
	sys/arch/i386/i386/trap.c: revision 1.244
remove a bunch of special casing to handle improperly set segment
registers.  if we faulted trying to set them, just fall into
"we_re_toast", and arrange for a SEGV to be delivered to the
userland process.  fixes kernel mode faults.
from andrew doran.

remove a bunch of special casing to handle improperly set segment
registers.  if we faulted trying to set them, just fall into
"we_re_toast", and arrange for a SEGV to be delivered to the
userland process.  fixes kernel mode faults.

from andrew doran.

Change about 4500 of the K&R function definitions to ANSI ones.
There are still about 1600 left, but they have ',' or /* ... */
in the actual variable definitions - which my awk script doesn't handle.
There are also many that need () -> (void).
(The script does handle misordered arguments.)

Sync with HEAD.

- rewrite x86 nmi dispatcher so that establish and disesablish are safe
  on a running system.
- adapt existing users of the api.  (elan)
- adapt tprof_pmi driver to use the api.

Sync with HEAD.

Sync with HEAD.

Merge wrstuden-revivesa into HEAD.

Hand-merge files that didn't merge right in recent sync w/ current.

Sync w/ -current. 34 merge conflicts to follow.

Re-add cpu_upcall() and page fault code. i386 kernels now compile.
They don't boot, but that seems to be a consequence of current from the
day this branch was started.

sync with head

Sync with HEAD.

Make trap counters per-cpu, like syscalls.

Since breakpoints don't work, dump basic info about the trap before
entering the debugger. Sometimes ddb only makes the situation worse.

Don't try to resolve pagefaults from interrupt mode; it can result in a
LOCKDEBUG panic, or the machine getting really confused. Instead, panic
at the earliest oppertunity.

sync with head.

sync with head.

Initial checkin of re-adding SA. Everything except kern_sa.c
compiles in GENERIC for i386. This is still a work-in-progress, but
this checkin covers most of the mechanical work (changing signalling
to be able to accomidate SA's process-wide signalling and re-adding
includes of sys/sa.h and savar.h). Subsequent changes will be much
more interesting.

Also, kern_sa.c has received partial cleanup. There's still more
to do, though.

Remove clause 3 and 4 from TNF licenses

Make pagefaults in kernel mode preemption safe.

trap: ignore T_ASTFLT if KVM86MODE.
revealed by the recent per-cpu runqueue change.

sync with HEAD

Sync with HEAD.

Sync with HEAD.

sync with head

Move the nmi_dispatch() call with respect to the #ifdef garbage so
that Xen kernels will compile again.

Add primitive routines to establish NMI handlers on i386.

TBD: synchronize (dis)establishment of handlers.

Sync with HEAD

Remove options MATH_EMULATE.

sync with HEAD

Sync with HEAD

Merge vmlocking2 to head.

a simple performance monitor based profiler, inspired from linux oprofile.

always consider T_NMI as !T_USER regardless of trapframe.

Back out the dumppcb changes for the time being.

- Dump basic trap and register info before entering the debugger, in
  case ddb screws the machine up further.
- Fill dumppcb asap so that gdb has less chance to get confused.

Sync with HEAD.

Sync with HEAD.

sync with head

Pull the vmlocking changes into a new branch.

Merge from vmlocking.

Sync with HEAD.

Sync with HEAD.

Sync with HEAD.

Don't clear ci_want_resched in MD code; it's done in mi_switch().

instead of setting pcb_onfault on every calls of copyin and friends,
make the fault handler investigate program counter of faulting code.
inspired from linux.

- merge {i386,xen}/i386/trap.c.
- add a comment about a hack for xen2.

Sync with HEAD.

Sync with HEAD.

Sync with HEAD

Remove support for 80386 level CPUs. PR port-i386/36163.

Sync with HEAD

sync with HEAD

trap

- Don't clear ci_want_resched here.
- Don't acquire kernel_lock for delayed profiling updates.

Sync with HEAD.

sync with head.

Make ras_lookup() lockless.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree.  Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches.  The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Sync with head.

sync with head.

Sync with HEAD

Sync with HEAD.

Fix DEBUG builds and use %lx to print vaddr_t.

x86 changes for pcc and LKMs.

- Replace most inline assembly with proper functions. As a side effect
  this reduces the size of amd64 GENERIC by about 120kB, and i386 by a
  smaller amount. Nearly all of the inlines did something slow, or something
  that does not need to be fast.
- Make curcpu() and curlwp functions proper, unless __GNUC__ && _KERNEL.
  In that case make them inlines. Makes curlwp LKM and preemption safe.
- Make bus_space and bus_dma more LKM friendly.
- Share a few more files between the ports.
- Other minor changes.

sync with head.

- Remove most calls to get kernel_lock during fault handling.
- By default start new LWPs without kernel_lock. Those returning to
  userspace don't need it.

Sync with HEAD.

Sync with HEAD.

Sync with HEAD.

Use __arraycount().

Sync with head.

Sync with head.

Update to HEAD.

merge yamt-idlelwp branch.  asked by core@.  some ports still needs work.

from doc/BRANCHES:

	idle lwp, and some changes depending on it.

	1. separate context switching and thread scheduling.
	   (cf. gmcgarry_ctxsw)
	2. implement idle lwp.
	3. clean up related MD/MI interfaces.
	4. make scheduler(s) modular.

Pull in the initial set of changes for the vmlocking branch.

Sync with HEAD.

Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

sync with head.

- separate context switching and thread scheduling.
- introduce idle lwp.
- change some related MD/MI interfaces and implement i386 version.

Merge newlock2 to head.

Remove support for SA. Ok core@.

Sync with head.

Checkpoint work in progress.

support kvm68 is MP systems. From Pierre Pronchery

sync with head.

Checkpoint work in progress.

Sync with head.

Checkpoint work in progress.

sync with head

- Remove sched_lock assertion.
- Update for need_proftick() change.

Coverity CID 3664/2964: Add KASSERTS before dereferencing l, p; these really
can't be NULL at this point, but adding the checks does not hurt
(from Arnaud Lacombe)

sync with head

sync with head

Use the LWP cached credentials where sane.

- Hold a reference to the process credentials in each struct lwp.
- Update the reference on syscall and user trap if p_cred has changed.
- Collect accounting flags in the LWP, and collate on LWP exit.

sync with head.

Sync with head.

Merge 2006-05-24 NetBSD-current into the "peter-altq" branch.

sync with head.

integrate kauth.

- Move kauth_cred_t declaration to <sys/types.h>
- Cleanup struct ucred; forward declarations that are unused.
- Don't include <sys/kauth.h> in any header, but include it in the c files
  that need it.

Approved by core.

Sync with head.

sync with head - hopefully this will work

Coverity CID 1096: l cannot be NULL for USER traps. Add KASSERT for it.

Coverity CID 1095: p cannot be NULL for user traps. Add KASSERT.

sync with head.

adapt to uvm_fault() interface cleanup: kill the useless 3rd argument

Adapt to kernel authorization KPI.

I expect *some* lossage here...

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

Sync with HEAD. Here we go again...

Pull up following revision(s) (requested by christos in ticket #880):
	sys/arch/i386/i386/vector.S: revision 1.20
	sys/arch/i386/i386/trap.c: revision 1.205
handle MMX faults as floating exceptions. Tested by Hauke Fath; matlab
passes all its regression suite without panicking the kernel.

Pull up following revision(s) (requested by christos in ticket #5923):
	sys/arch/i386/i386/vector.S: revision 1.20
	sys/arch/i386/i386/trap.c: revision 1.205
handle MMX faults as floating exceptions. Tested by Hauke Fath; matlab
passes all its regression suite without panicking the kernel.

Pull up following revision(s) (requested by christos in ticket #5923):
	sys/arch/i386/i386/vector.S: revision 1.20
	sys/arch/i386/i386/trap.c: revision 1.205
handle MMX faults as floating exceptions. Tested by Hauke Fath; matlab
passes all its regression suite without panicking the kernel.

handle MMX faults as floating exceptions. Tested by Hauke Fath; matlab
passes all its regression suite without panicking the kernel.

sync with -current

sync with head.  xen and whitespace.  xen part is not finished.

Sync with HEAD.

Hi Perry!

Copyright maintenance.

Minor cleanup in ksiginfo setup code.

Fix the sync with head I botched.

Sync with HEAD.

Sync with HEAD

use uvm_grow() to update stack segment size on stack page fault instead
of MD code

Sync with HEAD.

Check DDB before KGDB; if both are enabled, it's more useful to go to
DDB, because you can get to KGDB from there, but not the other way
around.

Sync with HEAD

add kernel part of concurrency support for SA on MP systems
- move per VP data into struct sadata_vp referenced from l->l_savp
  * VP id
  * lock on VP data
  * LWP on VP
  * recently blocked LWP on VP
  * queue of LWPs woken which ran on this VP before sleep
  * faultaddr
  * LWP cache for upcalls
  * upcall queue
- add current concurrency and requested concurrency variables
- make process exit run LWP on all VPs
- make signal delivery consider all VPs
- make timer events consider all VPs
- add sa_newsavp to allocate new sadata_vp structure
- add sa_increaseconcurrency to prepare new VP
- make sys_sa_setconcurrency request new VP or wakeup idle VP
- make sa_yield lower current concurrency
- set sa_cpu = VP id in upcalls
- maintain cached LWPs per VP

before resuming from failure during return to user mode,
- clear PSL_NT.  it can be set by userland because setting it
  isn't a privileged operation.
  (cf. DSA-336-1, CVE-2002-0429)
- set PSL_I.  otherwise, if SIGSEGV is ignored, we'll
  end up to infinite loop, generating the same traps, with
  interrupts disabled.

update trap(), resume_iret and friends to match with
the recent version of INTRFASTEXIT.
might be related to PR/24711.

Backout (part of) rev. 1.187, since the control no longer fall through.

defer pmap switching until it's really needed
to avoid frequent loading of cr3 register, which involves tlb flush.

with some fixes/improvements from Stephan Uphoff and Bang Jun-Young.

signal SIGSEGV/SEGV_ACCERR if non-executable stack is jumped to

Remove p_nras from struct proc - use LIST_EMPTY(&p->p_raslist) instead.
Remove p_raslock and rename p_lwplock p_lock (one lock is enough).
Simplify window test when adding a ras and correct test on VM_MAXUSER_ADDRESS.
Avoid unpredictable branch in i386 locore.S
(pad fields left in struct proc to avoid kernel bump)

Nuke __P().

Remove bogus initializers.

Add a missing default.

Fix uninitialized variable warnings

* Shuffle some data structures so, and add a flags word to ksiginfo_t.
  Right now the only flag is used to indicate if a ksiginfo_t is a
  result of a trap.  Add a predicate macro to test for this flag.
* Add initialization macros for ksiginfo_t's.
* Add accssor macro for ksi_trap.  Expands to 0 if the ksiginfo_t was
  not the result of a trap.  This matches the sigcontext trapcode semantics.
* In kpsendsig(), use KSI_TRAP_P() to select the lwp that gets the signal.
  Inspired by Matthias Drochner's fix to kpsendsig(), but correctly handles
  the case of non-trap-generated signals that have a > 0 si_code.

This patch fixes a signal delivery problem with threaded programs noted by
Matthias Drochner on tech-kern.

As discussed on tech-kern.  Reviewed and OK's by Christos.

add MD part of SA/pthread pagefault handling on i386

Set si_code for T_PROTFLT|T_USER. Pointed out by enamicode.

SA_SIGINFO changes.

add support for non-executable mappings (where the hardware allows this)
and make the stack and heap non-executable by default.  the changes
fall into two basic catagories:

 - pmap and trap-handler changes.  these are all MD:
   = alpha: we already track per-page execute permission with the (software)
	PG_EXEC bit, so just have the trap handler pay attention to it.
   = i386: use a new GDT segment for %cs for processes that have no
	executable mappings above a certain threshold (currently the
	bottom of the stack).  track per-page execute permission with
	the last unused PTE bit.
   = powerpc/ibm4xx: just use the hardware exec bit.
   = powerpc/oea: we already track per-page exec bits, but the hardware only
	implements non-exec mappings at the segment level.  so track the
	number of executable mappings in each segment and turn on the no-exec
	segment bit iff the count is 0.  adjust the trap handler to deal.
   = sparc (sun4m): fix our use of the hardware protection bits.
	fix the trap handler to recognize text faults.
   = sparc64: split the existing unified TSB into data and instruction TSBs,
	and only load TTEs into the appropriate TSB(s) for the permissions.
	fix the trap handler to check for execute permission.
   = not yet implemented: amd64, hppa, sh5

 - changes in all the emulations that put a signal trampoline on the stack.
   instead, we now put the trampoline into a uvm_aobj and map that into
   the process separately.

originally from openbsd, adapted for netbsd by me.

Pass pointers to frames from assembly, do not use the 'frame on stack
as argument passed by value' trick, as gcc 3.3.x makes (valid) assumptions
about the stack that will not be true. Costs 2 instructions per trap/syscall
on i386, 4 per interrupt for MP. One instruction per trap/syscall on amd64,
2 per interrupt for MP. I expect gcc 3.3.1 to make up for this by better
optimization (it'd better..)

While here, make amd64 compile again by using subr_mbr_disk.c

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

Make sure to include opt_foo.h if a defflag option FOO is used.

tweak previous; use '%#x' instead of '0x%x' (and the lx equivalents)

Prefix a hex error number with "0x".

remove L_BIGLOCK check for kernel-mode pagefaults in trap().
syscall() and its variants actually does copyin() without biglock.

ok'ed by Frank van der Linden.

Adapt for move of files to arch/x86.

Merge the nathanw_sa branch.

In the SA universe, the switch-to-this-LWP decision is made at a
different level than where preempt() calls are made, which renders
the "newlwp" argument useless.  Replace it with a "more work to do"
boolean argument.  Returning to userspace preempt() calls pass 0.
"Voluntary" preemptions in e.g. uiomove() pass 1.  This will be used
to indicate to the SA subsystem that the LWP is not yet finished in
the kernel.

Collapse the SA vs. non-SA cases of preempt() together, making the
conditional code block much smaller, and don't call sa_preempt() if
more work is to come.

NOTE: THIS IS NOT A COMPLETE FIX TO THE preempt()-in-uiomove() PROBLEM
THAT CURRENTLY EXISTS FOR SA PROCESSES.

Merge pcred and ucred, and poolify.  TBD: check backward compatibility
and factor-out some higher-level functionality.

KERNEL_PROC_LOCK takes a lwp, not a proc.

Sync with HEAD.

Unlock the kernel lock in startlwp() before returning to userland.

Unlock the kernel lock in upcallret().

New interrupt code. The basic idea behind it is to hide the differences
in interrupt controllers in struct pic, and try to keep as much
common code as possible. At the lowest (asm) level, this is done
with CPP macros.

The main structure is now struct intrsource, describing an established
interrupt line, of any kind (soft/hard local apic/legacy apic/IO apic).
For quick masking, there may be a maximum of 32 sources per CPU.
Sources can be assigned to any CPU in the MP case, though currently they
all go to the boot CPU.

LWPify multiprocessor code

The kernel lock must be held around ADDUPROF.

Catch up to -current

Check for an error in {f,s}uwintr before checking (if MULTIPROCESSOR)
if the kernel lock is held, otherwise a fatal trap will be erronerously
signaled for cases like profile calls from statclock().

constify trap_type[]

update trap_type[] according to include/trap.h contents

Catch up to -current.

sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work

Add wrapper for trap() to be used for traps that come in via a TSS.

Merge Bill Sommerfeld's i386 MP branch. This code has some known
caveats, but works quite well in a lot of MP cases, and all
UP cases that I have tested. Parts of this will hopefully be
reworked in the not-too-distant future.

remove trailing \n in panic().  approved perry.

Catch up to -current.

sync kqueue branch with HEAD

SMP branch resync.  Mostly RAS support.

catch up with -current.

RAS support for i386.

Booby-trap KVM86 so it's clear what needs work.

merged with -current as of today.
rearranged gdt init to deal with KVM86 changes; however, KVM86 has no
chance of working yet; good thing it's not part of GENERIC

Catch up to -current.

catch up with -current.

No longer need to pull in lwp.h; proc.h pulls it in for us.

call kvm86's GPF handler

add KSTACK_CHECK_DR0.

Remove some debugging printf's of mine.

Curproc->curlwp renaming.

Change uses of "curproc->l_proc" back to "curproc", which is more like the
original use. Bare uses of "curproc" are now "curlwp".

"curproc" is now #defined in proc.h as ((curlwp) ? (curlwp)->l_proc) : NULL)
so that it is always safe to reference curproc (*de*referencing curproc
is another story, but that's always been true).

fetch cr2 (faulting address) before attempting to lock, in case that
lock becomes a sleep lock some day..

Catch up with -current.

Catch up to -current.

Resynch with mainline.

Fix a null pointer dereference if curproc == NULL.
Fixes PR port-i386/15638.

save cr2 for the benefit of linux emulation, and normalize use of pcb
in trap(), i.e. always initialize *pcb and use it instead of doing it
sometimes.

allow writing to write-only mappings.  fixes PR 3493.

Sync kqueue branch with -current.

Catch up to -current.

Set up per-cpu GDT.
Use %fs for per-cpu data access.

Yet another mergeup.

New work:
 - Frank van der Linden's tlb shootdown fix.
Mainline functionality merged:
 - IrDA
 - Kernel RCSID's
 - Transmeta CPU support
 - ACPI
 - XMM register access through procfs

The upcallret() function is given the lwp of curproc as its argument; update
declaration, and actually use the argument, instead of using curproc(!).

add RCSID

Remove an unused variable in startlwp().

A few files and lwp/proc conversions I missed in the last big update.
GENERIC runs again.

Catch up to -current.

Complete merge with -current

checkpoint merge-in-progress from mainline.

Add an e_trapsignal member to struct emul, so that emulated processes can
send the appropriate signal depending on the trap type.

Pull up revision 1.160 (via patch, requested by sommerfeld):
  Add %fs/%gs to trap frame and save/restore them on trap/interupt/
  syscall entry from userspace.

  Remove special-case ``by hand'' validation of %fs/%gs register
  values s well as special handling of them in various signal
  handling paths.  Now, like %ds and %es, they are validated by
  the hardware on return to userland.

  This paves the way for the use of %fs for per-cpu data on multi-
  processor systems, and fixes an otherwise difficult-to-fix
  interaction between threads/clone(2) and USER_LDT.

Add %fs/%gs to trap frame and save/restore them on
trap/interrupt/syscall entry from userspace.

Remove special-case "by hand" validation of fs/gs register values as
well as special handling of them in various signal handling paths.

Now, like %ds and %es, they are validated by the hardware on return to
userland.

This paves the way for the use of %fs for per-cpu data on
multiprocessor systems, and fixes an otherwise difficult-to-fix
interaction between threads/clone(2) and USER_LDT.

Discussed in advance with Frank van der Linden.

Pull up revision 1.159 (requested by sommerfeld):
  Replace magic numbers in trap code with offsetof().
  Deal better with traps during register restore.
  Explain a bit more about what is going on here.

Replace magic numbers in trap code with offsetof()
Deal better with traps during register restore.
Explain a bit more about what's going on here.

replace vm_map{,_entry}_t with struct vm_map{,_entry} *.

add missing   #include "opt_kgdb.h"

Merge sommerfeld_i386mp_1 branch with -current as of today.
GENERIC.MP kernel boots and runs multiuser on my ABIT BP6

Catch up with -current.