Annotation of src/sys/arch/i386/i386/locore.S, Revision 1.70
1.70 ! ad 1: /* $NetBSD: locore.S,v 1.69 2008/04/28 20:23:24 martin Exp $ */
1.53 yamt 2:
3: /*
4: * Copyright-o-rama!
5: */
6:
7: /*
1.62 bouyer 8: * Copyright (c) 2006 Manuel Bouyer.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by Manuel Bouyer.
21: * 4. The name of the author may not be used to endorse or promote products
22: * derived from this software without specific prior written permission.
23: *
24: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34: *
35: */
36:
37: /*
1.53 yamt 38: * Copyright (c) 2001 Wasabi Systems, Inc.
39: * All rights reserved.
40: *
41: * Written by Frank van der Linden for Wasabi Systems, Inc.
42: *
43: * Redistribution and use in source and binary forms, with or without
44: * modification, are permitted provided that the following conditions
45: * are met:
46: * 1. Redistributions of source code must retain the above copyright
47: * notice, this list of conditions and the following disclaimer.
48: * 2. Redistributions in binary form must reproduce the above copyright
49: * notice, this list of conditions and the following disclaimer in the
50: * documentation and/or other materials provided with the distribution.
51: * 3. All advertising materials mentioning features or use of this software
52: * must display the following acknowledgement:
53: * This product includes software developed for the NetBSD Project by
54: * Wasabi Systems, Inc.
55: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
56: * or promote products derived from this software without specific prior
57: * written permission.
58: *
59: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
60: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
61: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
62: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
63: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
64: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
65: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
66: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
67: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
68: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
69: * POSSIBILITY OF SUCH DAMAGE.
70: */
71:
1.1 fvdl 72:
73: /*-
1.48 yamt 74: * Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc.
1.1 fvdl 75: * All rights reserved.
76: *
77: * This code is derived from software contributed to The NetBSD Foundation
78: * by Charles M. Hannum.
79: *
80: * Redistribution and use in source and binary forms, with or without
81: * modification, are permitted provided that the following conditions
82: * are met:
83: * 1. Redistributions of source code must retain the above copyright
84: * notice, this list of conditions and the following disclaimer.
85: * 2. Redistributions in binary form must reproduce the above copyright
86: * notice, this list of conditions and the following disclaimer in the
87: * documentation and/or other materials provided with the distribution.
88: *
89: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
90: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
91: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
92: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
93: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
94: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
95: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
96: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
97: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
98: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
99: * POSSIBILITY OF SUCH DAMAGE.
100: */
101:
102: /*-
103: * Copyright (c) 1990 The Regents of the University of California.
104: * All rights reserved.
105: *
106: * This code is derived from software contributed to Berkeley by
107: * William Jolitz.
108: *
109: * Redistribution and use in source and binary forms, with or without
110: * modification, are permitted provided that the following conditions
111: * are met:
112: * 1. Redistributions of source code must retain the above copyright
113: * notice, this list of conditions and the following disclaimer.
114: * 2. Redistributions in binary form must reproduce the above copyright
115: * notice, this list of conditions and the following disclaimer in the
116: * documentation and/or other materials provided with the distribution.
1.12 agc 117: * 3. Neither the name of the University nor the names of its contributors
1.1 fvdl 118: * may be used to endorse or promote products derived from this software
119: * without specific prior written permission.
120: *
121: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
122: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
123: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
124: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
125: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
126: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
127: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
128: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
129: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
130: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
131: * SUCH DAMAGE.
132: *
133: * @(#)locore.s 7.3 (Berkeley) 5/13/91
134: */
135:
1.59 lukem 136: #include <machine/asm.h>
1.70 ! ad 137: __KERNEL_RCSID(0, "$NetBSD: locore.S,v 1.69 2008/04/28 20:23:24 martin Exp $");
1.59 lukem 138:
1.18 christos 139: #include "opt_compat_oldboot.h"
1.1 fvdl 140: #include "opt_ddb.h"
141: #include "opt_realmem.h"
1.18 christos 142: #include "opt_vm86.h"
1.62 bouyer 143: #include "opt_xen.h"
1.1 fvdl 144:
145: #include "npx.h"
146: #include "assym.h"
147: #include "lapic.h"
148: #include "ioapic.h"
1.8 fvdl 149: #include "ksyms.h"
1.1 fvdl 150:
151: #include <sys/errno.h>
152: #include <sys/syscall.h>
153:
154: #include <machine/cputypes.h>
155: #include <machine/segments.h>
156: #include <machine/specialreg.h>
157: #include <machine/trap.h>
158: #include <machine/i82489reg.h>
1.48 yamt 159: #include <machine/frameasm.h>
160: #include <machine/i82489reg.h>
1.62 bouyer 161: #ifndef XEN
162: #include <machine/multiboot.h>
163: #endif
1.1 fvdl 164:
165: /* XXX temporary kluge; these should not be here */
166: /* Get definitions for IOM_BEGIN, IOM_END, and IOM_SIZE */
167: #include <dev/isa/isareg.h>
168:
1.62 bouyer 169: #ifdef XEN
170: /*
171: * Xen guest identifier and loader selection
172: */
173: .section __xen_guest
174: #ifdef XEN3
175: .ascii "GUEST_OS=netbsd,GUEST_VER=3.0,XEN_VER=xen-3.0"
176: #if defined(DOM0OPS) || !defined(XEN_COMPAT_030001)
177: .ascii ",VIRT_BASE=0xc0000000" /* KERNBASE */
178: .ascii ",ELF_PADDR_OFFSET=0xc0000000" /* KERNBASE */
179: #else
180: .ascii ",VIRT_BASE=0xc0100000" /* KERNTEXTOFF */
181: .ascii ",ELF_PADDR_OFFSET=0xc0100000" /* KERNTEXTOFF */
182: #endif
183: .ascii ",VIRT_ENTRY=0xc0100000" /* KERNTEXTOFF */
184: #if !defined(XEN_COMPAT_030001)
185: .ascii ",HYPERCALL_PAGE=0x00000101"
186: /* (???+HYPERCALL_PAGE_OFFSET)/PAGE_SIZE) */
187: #endif
1.66 bouyer 188: #ifdef PAE
189: .ascii ",PAE=yes[extended-cr3]"
190: #endif
1.62 bouyer 191: #else /* !XEN3 */
192: .ascii "GUEST_OS=netbsd,GUEST_VER=2.0,XEN_VER=2.0"
193: #endif /* XEN3 */
194: .ascii ",LOADER=generic"
195: #if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE)
196: .ascii ",BSD_SYMTAB=yes"
197: #endif
198: .byte 0
199: #endif
200:
1.1 fvdl 201: /*
202: * Initialization
203: */
204: .data
205:
206: .globl _C_LABEL(cpu)
1.38 jmmv 207: .globl _C_LABEL(esym)
208: .globl _C_LABEL(atdevbase)
1.40 yamt 209: .globl _C_LABEL(proc0uarea),_C_LABEL(PDPpaddr)
1.1 fvdl 210: .globl _C_LABEL(gdt)
211: .globl _C_LABEL(idt)
1.30 junyoung 212: .globl _C_LABEL(lapic_tpr)
213:
1.1 fvdl 214: #if NLAPIC > 0
215: #ifdef __ELF__
1.7 thorpej 216: .align PAGE_SIZE
1.1 fvdl 217: #else
218: .align 12
219: #endif
220: .globl _C_LABEL(local_apic), _C_LABEL(lapic_id)
221: _C_LABEL(local_apic):
222: .space LAPIC_ID
1.30 junyoung 223: _C_LABEL(lapic_id):
1.1 fvdl 224: .long 0x00000000
225: .space LAPIC_TPRI-(LAPIC_ID+4)
1.30 junyoung 226: _C_LABEL(lapic_tpr):
1.1 fvdl 227: .space LAPIC_PPRI-LAPIC_TPRI
1.30 junyoung 228: _C_LABEL(lapic_ppr):
1.1 fvdl 229: .space LAPIC_ISR-LAPIC_PPRI
230: _C_LABEL(lapic_isr):
1.7 thorpej 231: .space PAGE_SIZE-LAPIC_ISR
1.1 fvdl 232: #else
1.30 junyoung 233: _C_LABEL(lapic_tpr):
1.1 fvdl 234: .long 0
235: #endif
1.30 junyoung 236:
1.48 yamt 237: _C_LABEL(cpu): .long 0 # are we 80486, Pentium, or..
1.1 fvdl 238: _C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual
1.40 yamt 239: _C_LABEL(proc0uarea): .long 0
1.31 junyoung 240: _C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm
1.53 yamt 241: _C_LABEL(tablesize): .long 0
1.30 junyoung 242:
1.63 bouyer 243: .space 512
1.1 fvdl 244: tmpstk:
245:
1.62 bouyer 246: #ifndef XEN
1.35 yamt 247: #define _RELOC(x) ((x) - KERNBASE)
1.62 bouyer 248: #else
249: #define _RELOC(x) ((x))
250: #endif /* XEN */
1.1 fvdl 251: #define RELOC(x) _RELOC(_C_LABEL(x))
252:
253: .text
254: .globl _C_LABEL(kernel_text)
255: .set _C_LABEL(kernel_text),KERNTEXTOFF
256:
257: .globl start
1.62 bouyer 258: #ifndef XEN
1.1 fvdl 259: start: movw $0x1234,0x472 # warm boot
260:
1.37 jmmv 261: #if defined(MULTIBOOT)
262: jmp 1f
263:
264: .align 4
265: .globl Multiboot_Header
266: _C_LABEL(Multiboot_Header):
1.44 jmmv 267: #define MULTIBOOT_HEADER_FLAGS (MULTIBOOT_HEADER_WANT_MEMORY)
1.37 jmmv 268: .long MULTIBOOT_HEADER_MAGIC
269: .long MULTIBOOT_HEADER_FLAGS
270: .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
271:
272: 1:
273: /* Check if we are being executed by a Multiboot-compliant boot
274: * loader. */
275: cmpl $MULTIBOOT_INFO_MAGIC,%eax
276: jne 1f
277:
1.43 mrg 278: /*
279: * Indeed, a multiboot-compliant boot loader executed us. We copy
1.37 jmmv 280: * the received Multiboot information structure into kernel's data
281: * space to process it later -- after we are relocated. It will
1.43 mrg 282: * be safer to run complex C code than doing it at this point.
283: */
1.37 jmmv 284: pushl %ebx # Address of Multiboot information
285: call _C_LABEL(multiboot_pre_reloc)
286: addl $4,%esp
1.38 jmmv 287: jmp 2f
1.37 jmmv 288: #endif
289:
290: 1:
1.1 fvdl 291: /*
1.38 jmmv 292: * At this point, we know that a NetBSD-specific boot loader
293: * booted this kernel. The stack carries the following parameters:
1.41 jmmv 294: * (boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem),
1.38 jmmv 295: * 4 bytes each.
1.1 fvdl 296: */
1.38 jmmv 297: addl $4,%esp # Discard return address to boot loader
298: call _C_LABEL(native_loader)
299: addl $24,%esp
1.1 fvdl 300:
301: 2:
302: /* First, reset the PSL. */
303: pushl $PSL_MBO
304: popfl
305:
306: /* Clear segment registers; always null in proc0. */
307: xorl %eax,%eax
308: movw %ax,%fs
309: movw %ax,%gs
310: decl %eax
311: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
312:
313: /* Find out our CPU type. */
314:
315: try386: /* Try to toggle alignment check flag; does not exist on 386. */
316: pushfl
317: popl %eax
318: movl %eax,%ecx
319: orl $PSL_AC,%eax
320: pushl %eax
321: popfl
322: pushfl
323: popl %eax
324: xorl %ecx,%eax
325: andl $PSL_AC,%eax
326: pushl %ecx
327: popfl
328:
329: testl %eax,%eax
330: jnz try486
331:
332: /*
333: * Try the test of a NexGen CPU -- ZF will not change on a DIV
334: * instruction on a NexGen, it will on an i386. Documented in
335: * Nx586 Processor Recognition Application Note, NexGen, Inc.
336: */
337: movl $0x5555,%eax
338: xorl %edx,%edx
339: movl $2,%ecx
340: divl %ecx
341: jnz is386
342:
343: isnx586:
344: /*
345: * Don't try cpuid, as Nx586s reportedly don't support the
346: * PSL_ID bit.
347: */
348: movl $CPU_NX586,RELOC(cpu)
349: jmp 2f
350:
351: is386:
352: movl $CPU_386,RELOC(cpu)
353: jmp 2f
354:
355: try486: /* Try to toggle identification flag; does not exist on early 486s. */
356: pushfl
357: popl %eax
358: movl %eax,%ecx
359: xorl $PSL_ID,%eax
360: pushl %eax
361: popfl
362: pushfl
363: popl %eax
364: xorl %ecx,%eax
365: andl $PSL_ID,%eax
366: pushl %ecx
367: popfl
368:
369: testl %eax,%eax
370: jnz try586
371: is486: movl $CPU_486,RELOC(cpu)
372: /*
373: * Check Cyrix CPU
374: * Cyrix CPUs do not change the undefined flags following
375: * execution of the divide instruction which divides 5 by 2.
376: *
377: * Note: CPUID is enabled on M2, so it passes another way.
378: */
379: pushfl
380: movl $0x5555, %eax
381: xorl %edx, %edx
382: movl $2, %ecx
383: clc
384: divl %ecx
385: jnc trycyrix486
386: popfl
387: jmp 2f
388: trycyrix486:
389: movl $CPU_6x86,RELOC(cpu) # set CPU type
390: /*
391: * Check for Cyrix 486 CPU by seeing if the flags change during a
392: * divide. This is documented in the Cx486SLC/e SMM Programmer's
393: * Guide.
394: */
395: xorl %edx,%edx
396: cmpl %edx,%edx # set flags to known state
397: pushfl
398: popl %ecx # store flags in ecx
399: movl $-1,%eax
400: movl $4,%ebx
401: divl %ebx # do a long division
402: pushfl
403: popl %eax
404: xorl %ecx,%eax # are the flags different?
405: testl $0x8d5,%eax # only check C|PF|AF|Z|N|V
406: jne 2f # yes; must be Cyrix 6x86 CPU
407: movl $CPU_486DLC,RELOC(cpu) # set CPU type
408:
409: #ifndef CYRIX_CACHE_WORKS
410: /* Disable caching of the ISA hole only. */
411: invd
412: movb $CCR0,%al # Configuration Register index (CCR0)
413: outb %al,$0x22
414: inb $0x23,%al
415: orb $(CCR0_NC1|CCR0_BARB),%al
416: movb %al,%ah
417: movb $CCR0,%al
418: outb %al,$0x22
419: movb %ah,%al
420: outb %al,$0x23
421: invd
422: #else /* CYRIX_CACHE_WORKS */
423: /* Set cache parameters */
424: invd # Start with guaranteed clean cache
425: movb $CCR0,%al # Configuration Register index (CCR0)
426: outb %al,$0x22
427: inb $0x23,%al
428: andb $~CCR0_NC0,%al
429: #ifndef CYRIX_CACHE_REALLY_WORKS
430: orb $(CCR0_NC1|CCR0_BARB),%al
431: #else
432: orb $CCR0_NC1,%al
433: #endif
434: movb %al,%ah
435: movb $CCR0,%al
436: outb %al,$0x22
437: movb %ah,%al
438: outb %al,$0x23
439: /* clear non-cacheable region 1 */
440: movb $(NCR1+2),%al
441: outb %al,$0x22
442: movb $NCR_SIZE_0K,%al
443: outb %al,$0x23
444: /* clear non-cacheable region 2 */
445: movb $(NCR2+2),%al
446: outb %al,$0x22
447: movb $NCR_SIZE_0K,%al
448: outb %al,$0x23
449: /* clear non-cacheable region 3 */
450: movb $(NCR3+2),%al
451: outb %al,$0x22
452: movb $NCR_SIZE_0K,%al
453: outb %al,$0x23
454: /* clear non-cacheable region 4 */
455: movb $(NCR4+2),%al
456: outb %al,$0x22
457: movb $NCR_SIZE_0K,%al
458: outb %al,$0x23
459: /* enable caching in CR0 */
460: movl %cr0,%eax
461: andl $~(CR0_CD|CR0_NW),%eax
462: movl %eax,%cr0
463: invd
464: #endif /* CYRIX_CACHE_WORKS */
465:
466: jmp 2f
467:
468: try586: /* Use the `cpuid' instruction. */
469: xorl %eax,%eax
470: cpuid
471: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
472:
473: 2:
474: /*
475: * Finished with old stack; load new %esp now instead of later so we
476: * can trace this code without having to worry about the trace trap
477: * clobbering the memory test or the zeroing of the bss+bootstrap page
478: * tables.
479: *
480: * The boot program should check:
481: * text+data <= &stack_variable - more_space_for_stack
482: * text+data+bss+pad+space_for_page_tables <= end_of_memory
483: * Oops, the gdt is in the carcass of the boot program so clearing
484: * the rest of memory is still not possible.
485: */
486: movl $_RELOC(tmpstk),%esp # bootstrap stack end location
487:
488: /*
489: * Virtual address space of kernel:
490: *
1.53 yamt 491: * text | data | bss | [syms] | page dir | proc0 kstack | L1 ptp
1.1 fvdl 492: * 0 1 2 3
493: */
1.53 yamt 494:
495: #define PROC0_PDIR_OFF 0
496: #define PROC0_STK_OFF (PROC0_PDIR_OFF + PAGE_SIZE)
497: #define PROC0_PTP1_OFF (PROC0_STK_OFF + UPAGES * PAGE_SIZE)
498:
499: /*
500: * fillkpt
501: * eax = pte (page frame | control | status)
502: * ebx = page table address
503: * ecx = number of pages to map
504: */
505:
506: #define fillkpt \
507: 1: movl %eax,(%ebx) ; /* store phys addr */ \
508: addl $4,%ebx ; /* next pte/pde */ \
509: addl $PAGE_SIZE,%eax ; /* next phys page */ \
510: loop 1b ; \
511:
1.1 fvdl 512:
513: /* Find end of kernel image. */
514: movl $RELOC(end),%edi
1.8 fvdl 515: #if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE)
1.1 fvdl 516: /* Save the symbols (if loaded). */
517: movl RELOC(esym),%eax
518: testl %eax,%eax
519: jz 1f
1.35 yamt 520: subl $KERNBASE,%eax
1.1 fvdl 521: movl %eax,%edi
522: 1:
523: #endif
524:
1.53 yamt 525: /* Compute sizes */
1.1 fvdl 526: movl %edi,%esi # edi = esym ? esym : end
527: addl $PGOFSET,%esi # page align up
528: andl $~PGOFSET,%esi
529:
1.53 yamt 530: /* nkptp[1] = (esi + ~L2_FRAME) >> L2_SHIFT + 1; */
531: movl %esi,%eax
532: addl $~L2_FRAME,%eax
533: shrl $L2_SHIFT,%eax
534: incl %eax /* one more ptp for VAs stolen by bootstrap */
535: 1: movl %eax,RELOC(nkptp)+1*4
536:
537: /* tablesize = (1 + UPAGES + nkptp) << PGSHIFT; */
538: addl $(1+UPAGES),%eax
539: shll $PGSHIFT,%eax
540: movl %eax,RELOC(tablesize)
541:
542: /* ensure that nkptp covers bootstrap tables */
543: addl %esi,%eax
544: addl $~L2_FRAME,%eax
545: shrl $L2_SHIFT,%eax
546: incl %eax
547: cmpl %eax,RELOC(nkptp)+1*4
548: jnz 1b
549:
550: /* Clear tables */
551: movl %esi,%edi
1.1 fvdl 552: xorl %eax,%eax
553: cld
1.53 yamt 554: movl RELOC(tablesize),%ecx
555: shrl $2,%ecx
1.1 fvdl 556: rep
557: stosl
558:
1.53 yamt 559: leal (PROC0_PTP1_OFF)(%esi), %ebx
1.1 fvdl 560:
561: /*
562: * Build initial page tables.
563: */
1.53 yamt 564: /*
565: * Compute &__data_start - KERNBASE. This can't be > 4G,
566: * or we can't deal with it anyway, since we can't load it in
567: * 32 bit mode. So use the bottom 32 bits.
568: */
569: movl $RELOC(__data_start),%edx
1.1 fvdl 570: andl $~PGOFSET,%edx
1.30 junyoung 571:
1.53 yamt 572: /*
573: * Skip the first MB.
574: */
1.1 fvdl 575: movl $_RELOC(KERNTEXTOFF),%eax
576: movl %eax,%ecx
1.53 yamt 577: shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */
578: addl %ecx,%ebx
1.1 fvdl 579:
580: /* Map the kernel text read-only. */
581: movl %edx,%ecx
582: subl %eax,%ecx
583: shrl $PGSHIFT,%ecx
584: orl $(PG_V|PG_KR),%eax
585: fillkpt
586:
587: /* Map the data, BSS, and bootstrap tables read-write. */
588: leal (PG_V|PG_KW)(%edx),%eax
1.53 yamt 589: movl RELOC(tablesize),%ecx
1.1 fvdl 590: addl %esi,%ecx # end of tables
591: subl %edx,%ecx # subtract end of text
592: shrl $PGSHIFT,%ecx
593: fillkpt
594:
1.53 yamt 595: /* Map ISA I/O mem (later atdevbase) */
1.1 fvdl 596: movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax # having these bits set
597: movl $(IOM_SIZE>>PGSHIFT),%ecx # for this many pte s,
598: fillkpt
599:
600: /*
601: * Construct a page table directory.
602: */
1.53 yamt 603: /* Set up top level entries for identity mapping */
604: leal (PROC0_PDIR_OFF)(%esi),%ebx
605: leal (PROC0_PTP1_OFF)(%esi),%eax
606: orl $(PG_V|PG_KW), %eax
607: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 608: fillkpt
609:
1.53 yamt 610: /* Set up top level entries for actual kernel mapping */
611: leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*4)(%esi),%ebx
612: leal (PROC0_PTP1_OFF)(%esi),%eax
613: orl $(PG_V|PG_KW), %eax
614: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 615: fillkpt
616:
617: /* Install a PDE recursively mapping page directory as a page table! */
1.53 yamt 618: leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*4)(%esi),%ebx
619: leal (PROC0_PDIR_OFF)(%esi),%eax
620: orl $(PG_V|PG_KW),%eax
621: movl %eax,(%ebx)
622:
1.1 fvdl 623:
1.31 junyoung 624: /* Save phys. addr of PDP, for libkvm. */
625: movl %esi,RELOC(PDPpaddr)
1.1 fvdl 626:
1.53 yamt 627: /*
628: * Startup checklist:
629: * 1. Load %cr3 with pointer to PDIR.
630: */
1.1 fvdl 631: movl %esi,%eax # phys address of ptd in proc 0
632: movl %eax,%cr3 # load ptd addr into mmu
1.53 yamt 633:
634: /*
635: * 2. Enable paging and the rest of it.
636: */
1.1 fvdl 637: movl %cr0,%eax # get control word
638: # enable paging & NPX emulation
639: orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_EM|CR0_MP),%eax
640: movl %eax,%cr0 # and let's page NOW!
641:
642: pushl $begin # jump to high mem
643: ret
644:
645: begin:
1.53 yamt 646: /*
647: * We have arrived.
648: * There's no need anymore for the identity mapping in low
649: * memory, remove it.
650: */
651: movl _C_LABEL(nkptp)+1*4,%ecx
652: leal (PROC0_PDIR_OFF)(%esi),%ebx # old, phys address of PDIR
653: addl $(KERNBASE), %ebx # new, virtual address of PDIR
1.1 fvdl 654: 1: movl $0,(%ebx)
1.53 yamt 655: addl $4,%ebx
1.1 fvdl 656: loop 1b
657:
658: /* Relocate atdevbase. */
1.53 yamt 659: movl $KERNBASE,%edx
660: addl _C_LABEL(tablesize),%edx
1.1 fvdl 661: addl %esi,%edx
662: movl %edx,_C_LABEL(atdevbase)
663:
664: /* Set up bootstrap stack. */
1.53 yamt 665: leal (PROC0_STK_OFF+KERNBASE)(%esi),%eax
1.40 yamt 666: movl %eax,_C_LABEL(proc0uarea)
667: leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp
668: movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3
1.1 fvdl 669: xorl %ebp,%ebp # mark end of frames
670:
1.37 jmmv 671: #if defined(MULTIBOOT)
672: /* It is now safe to parse the Multiboot information structure
673: * we saved before from C code. Note that we cannot delay its
674: * parsing any more because initgdt (called below) needs to make
675: * use of this information. */
676: call _C_LABEL(multiboot_post_reloc)
677: #endif
678:
1.1 fvdl 679: subl $NGDT*8, %esp # space for temporary gdt
680: pushl %esp
681: call _C_LABEL(initgdt)
682: addl $4,%esp
1.30 junyoung 683:
1.53 yamt 684: movl _C_LABEL(tablesize),%eax
1.1 fvdl 685: addl %esi,%eax # skip past stack and page tables
686:
687: pushl %eax
688: call _C_LABEL(init386) # wire 386 chip for unix operation
689: addl $4+NGDT*8,%esp # pop temporary gdt
690:
691: #ifdef SAFARI_FIFO_HACK
692: movb $5,%al
693: movw $0x37b,%dx
694: outb %al,%dx
695: movw $0x37f,%dx
696: inb %dx,%al
697: movb %al,%cl
698:
699: orb $1,%cl
700:
701: movb $5,%al
702: movw $0x37b,%dx
703: outb %al,%dx
704: movw $0x37f,%dx
705: movb %cl,%al
706: outb %al,%dx
707: #endif /* SAFARI_FIFO_HACK */
708:
709: call _C_LABEL(main)
1.62 bouyer 710: #else /* XEN */
711: start:
712: /* First, reset the PSL. */
713: pushl $PSL_MBO
714: popfl
715:
716: cld
717: #ifdef XEN3
718: movl %esp, %ebx # save start of available space
719: #else
720: movl %esi,%ebx # save start_info pointer
721: #endif
722: movl $_RELOC(tmpstk),%esp # bootstrap stack end location
723:
724: /* Clear BSS first so that there are no surprises... */
725: xorl %eax,%eax
726: movl $RELOC(__bss_start),%edi
727: movl $RELOC(_end),%ecx
728: subl %edi,%ecx
729: rep stosb
730:
731: /* Copy the necessary stuff from start_info structure. */
732: /* We need to copy shared_info early, so that sti/cli work */
733: movl $RELOC(start_info_union),%edi
734: movl $128,%ecx
735: rep movsl
736:
737: /* Clear segment registers; always null in proc0. */
738: xorl %eax,%eax
739: movw %ax,%fs
740: movw %ax,%gs
741: decl %eax
742: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
743:
744: xorl %eax,%eax
745: cpuid
746: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
747:
748: call xen_pmap_bootstrap
749: /*
750: * First avail returned by xen_pmap_bootstrap in %eax
751: */
752: movl %eax, %esi;
753: movl %esi, _C_LABEL(proc0uarea)
754:
755: #define PROC0PDIR ((0) * PAGE_SIZE)
756: #define PROC0STACK ((1) * PAGE_SIZE)
757:
758: /* Set up bootstrap stack. */
759: leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp
760: xorl %ebp,%ebp # mark end of frames
761:
762: addl $USPACE, %esi
763: subl $KERNBASE, %esi #init386 want a physical address
764: pushl %esi
765: call _C_LABEL(init386) # wire 386 chip for unix operation
766: addl $4,%esp
767: call _C_LABEL(main)
768:
769: #if defined(XEN3) && !defined(XEN_COMPAT_030001)
770: /* space for the hypercall call page */
771: #define HYPERCALL_PAGE_OFFSET 0x1000
772: .org HYPERCALL_PAGE_OFFSET
773: ENTRY(hypercall_page)
774: .skip 0x1000
775: #endif /* defined(XEN3) && !defined(XEN_COMPAT_030001) */
776:
777: /*
778: * void lgdt_finish(void);
779: * Finish load a new GDT pointer (do any necessary cleanup).
780: * XXX It's somewhat questionable whether reloading all the segment registers
781: * is necessary, since the actual descriptor data is not changed except by
782: * process creation and exit, both of which clean up via task switches. OTOH,
783: * this only happens at run time when the GDT is resized.
784: */
785: /* LINTSTUB: Func: void lgdt_finish(void) */
786: NENTRY(lgdt_finish)
787: movl $GSEL(GDATA_SEL, SEL_KPL),%eax
788: movw %ax,%ds
789: movw %ax,%es
790: movw %ax,%gs
791: movw %ax,%ss
792: movl $GSEL(GCPU_SEL, SEL_KPL),%eax
793: movw %ax,%fs
794: /* Reload code selector by doing intersegment return. */
795: popl %eax
796: pushl $GSEL(GCODE_SEL, SEL_KPL)
797: pushl %eax
798: lret
799:
800: #endif /* XEN */
1.1 fvdl 801:
802: /*
1.48 yamt 803: * void lwp_trampoline(void);
804: *
1.1 fvdl 805: * This is a trampoline function pushed onto the stack of a newly created
806: * process in order to do some additional setup. The trampoline is entered by
807: * cpu_switch()ing to the process, so we abuse the callee-saved registers used
808: * by cpu_switch() to store the information about the stub to call.
809: * NOTE: This function does not have a normal calling sequence!
810: */
1.48 yamt 811: NENTRY(lwp_trampoline)
1.68 ad 812: movl %ebp,%edi /* for .Lsyscall_checkast */
1.48 yamt 813: xorl %ebp,%ebp
1.68 ad 814: pushl %edi
1.48 yamt 815: pushl %eax
816: call _C_LABEL(lwp_startup)
817: addl $8,%esp
1.1 fvdl 818: pushl %ebx
819: call *%esi
820: addl $4,%esp
1.68 ad 821: jmp .Lsyscall_checkast
1.1 fvdl 822: /* NOTREACHED */
823:
824: /*
1.48 yamt 825: * sigcode()
826: *
827: * Signal trampoline; copied to top of user stack. Used only for
828: * compatibility with old releases of NetBSD.
1.1 fvdl 829: */
830: NENTRY(sigcode)
831: /*
832: * Handler has returned here as if we called it. The sigcontext
833: * is on the stack after the 3 args "we" pushed.
834: */
835: leal 12(%esp),%eax # get pointer to sigcontext
836: movl %eax,4(%esp) # put it in the argument slot
837: # fake return address already there
1.17 christos 838: movl $SYS_compat_16___sigreturn14,%eax
1.1 fvdl 839: int $0x80 # enter kernel with args on stack
840: movl $SYS_exit,%eax
841: int $0x80 # exit if sigreturn fails
842: .globl _C_LABEL(esigcode)
843: _C_LABEL(esigcode):
844:
845: /*
1.48 yamt 846: * int setjmp(label_t *)
847: *
848: * Used primarily by DDB.
1.1 fvdl 849: */
850: ENTRY(setjmp)
851: movl 4(%esp),%eax
852: movl %ebx,(%eax) # save ebx
853: movl %esp,4(%eax) # save esp
854: movl %ebp,8(%eax) # save ebp
855: movl %esi,12(%eax) # save esi
856: movl %edi,16(%eax) # save edi
857: movl (%esp),%edx # get rta
858: movl %edx,20(%eax) # save eip
1.48 yamt 859: xorl %eax,%eax # return 0
1.1 fvdl 860: ret
861:
1.48 yamt 862: /*
863: * int longjmp(label_t *)
864: *
865: * Used primarily by DDB.
866: */
1.1 fvdl 867: ENTRY(longjmp)
868: movl 4(%esp),%eax
869: movl (%eax),%ebx # restore ebx
870: movl 4(%eax),%esp # restore esp
871: movl 8(%eax),%ebp # restore ebp
872: movl 12(%eax),%esi # restore esi
873: movl 16(%eax),%edi # restore edi
874: movl 20(%eax),%edx # get rta
875: movl %edx,(%esp) # put in return frame
1.48 yamt 876: movl $1,%eax # return 1
1.1 fvdl 877: ret
878:
1.65 skrll 879: /*
880: * void dumpsys(void)
881: *
882: * Mimic cpu_switchto() for postmortem debugging.
883: */
1.64 skrll 884: ENTRY(dumpsys)
1.65 skrll 885: pushl %ebx # set up fake switchframe
886: pushl %esi # and save context
887: pushl %edi
888: movl %esp,_C_LABEL(dumppcb)+PCB_ESP
889: movl %ebp,_C_LABEL(dumppcb)+PCB_EBP
890: call _C_LABEL(dodumpsys) # dump!
891: addl $(3*4), %esp # unwind switchframe
1.64 skrll 892: ret
893:
1.1 fvdl 894: /*
1.58 ad 895: * struct lwp *cpu_switchto(struct lwp *oldlwp, struct newlwp,
896: * bool returning)
1.30 junyoung 897: *
1.48 yamt 898: * 1. if (oldlwp != NULL), save its context.
899: * 2. then, restore context of newlwp.
900: *
901: * Note that the stack frame layout is known to "struct switchframe" in
902: * <machine/frame.h> and to the code in cpu_lwp_fork() which initializes
1.5 thorpej 903: * it for a new lwp.
1.1 fvdl 904: */
1.48 yamt 905: ENTRY(cpu_switchto)
1.1 fvdl 906: pushl %ebx
907: pushl %esi
908: pushl %edi
909:
1.70 ! ad 910: #if defined(DIAGNOSTIC) && !defined(XEN)
! 911: cmpl $IPL_SCHED,CPUVAR(ILEVEL)
! 912: jbe 0f
! 913: pushl $.Lstr
! 914: call _C_LABEL(panic)
! 915: addl $4,%esp
! 916: .Lstr: .string "cpu_switcho: switching above IPL_SCHED\0"
! 917: 0:
! 918: #endif
! 919:
1.48 yamt 920: movl 16(%esp),%esi # oldlwp
921: movl 20(%esp),%edi # newlwp
1.58 ad 922: movl 24(%esp),%edx # returning
1.48 yamt 923: testl %esi,%esi
924: jz 1f
1.1 fvdl 925:
1.48 yamt 926: /* Save old context. */
927: movl L_ADDR(%esi),%eax
928: movl %esp,PCB_ESP(%eax)
929: movl %ebp,PCB_EBP(%eax)
930:
931: /* Switch to newlwp's stack. */
932: 1: movl L_ADDR(%edi),%ebx
933: movl PCB_EBP(%ebx),%ebp
934: movl PCB_ESP(%ebx),%esp
1.1 fvdl 935:
1.61 ad 936: /*
937: * Set curlwp. This must be globally visible in order to permit
938: * non-interlocked mutex release.
939: */
940: movl %edi,%ecx
941: xchgl %ecx,CPUVAR(CURLWP)
1.58 ad 942:
943: /* Skip the rest if returning to a pinned LWP. */
944: testl %edx,%edx
945: jnz 4f
946:
1.62 bouyer 947: #ifdef XEN
948: pushl %edi
949: call _C_LABEL(i386_switch_context)
950: addl $4,%esp
951: #else /* XEN */
1.60 yamt 952: /* Switch ring0 esp */
953: movl PCB_ESP0(%ebx),%eax
954: movl %eax,CPUVAR(ESP0)
1.1 fvdl 955:
956: /* Don't bother with the rest if switching to a system process. */
1.48 yamt 957: testl $LW_SYSTEM,L_FLAG(%edi)
958: jnz 4f
1.1 fvdl 959:
1.54 ad 960: /* Restore thread-private %fs/%gs descriptors. */
1.60 yamt 961: movl CPUVAR(GDT),%ecx
1.55 ad 962: movl PCB_FSD(%ebx), %eax
963: movl PCB_FSD+4(%ebx), %edx
1.54 ad 964: movl %eax, (GUFS_SEL*8)(%ecx)
965: movl %edx, (GUFS_SEL*8+4)(%ecx)
1.55 ad 966: movl PCB_GSD(%ebx), %eax
967: movl PCB_GSD+4(%ebx), %edx
1.54 ad 968: movl %eax, (GUGS_SEL*8)(%ecx)
969: movl %edx, (GUGS_SEL*8+4)(%ecx)
1.62 bouyer 970: #endif /* XEN */
1.54 ad 971:
1.60 yamt 972: /* Switch I/O bitmap */
973: movl PCB_IOMAP(%ebx),%eax
974: orl %eax,%eax
975: jnz,pn .Lcopy_iobitmap
976: movl $(IOMAP_INVALOFF << 16),CPUVAR(IOBASE)
977: .Liobitmap_done:
978:
1.56 ad 979: /* Is this process using RAS (restartable atomic sequences)? */
980: movl L_PROC(%edi),%eax
981: cmpl $0,P_RASLIST(%eax)
982: jne 5f
983:
1.48 yamt 984: /*
985: * Restore cr0 (including FPU state). Raise the IPL to IPL_IPI.
986: * FPU IPIs can alter the LWP's saved cr0. Dropping the priority
987: * is deferred until mi_switch(), when cpu_switchto() returns.
988: */
1.62 bouyer 989: 2:
990: #ifndef XEN
991: movl $IPL_IPI,CPUVAR(ILEVEL)
1.48 yamt 992: movl PCB_CR0(%ebx),%ecx
993: movl %cr0,%edx
1.1 fvdl 994:
1.30 junyoung 995: /*
1.22 wiz 996: * If our floating point registers are on a different CPU,
1.48 yamt 997: * set CR0_TS so we'll trap rather than reuse bogus state.
1.1 fvdl 998: */
1.48 yamt 999: movl PCB_FPCPU(%ebx),%eax
1000: cmpl CPUVAR(SELF),%eax
1001: je 3f
1.1 fvdl 1002: orl $CR0_TS,%ecx
1.48 yamt 1003:
1004: /* Reloading CR0 is very expensive - avoid if possible. */
1005: 3: cmpl %edx,%ecx
1006: je 4f
1.1 fvdl 1007: movl %ecx,%cr0
1.62 bouyer 1008: #endif /* XEN */
1.1 fvdl 1009:
1.48 yamt 1010: /* Return to the new LWP, returning 'oldlwp' in %eax. */
1011: 4: movl %esi,%eax
1.1 fvdl 1012: popl %edi
1013: popl %esi
1014: popl %ebx
1015: ret
1.20 dsl 1016:
1.48 yamt 1017: /* Check for restartable atomic sequences (RAS). */
1018: 5: movl L_MD_REGS(%edi),%ecx
1019: pushl TF_EIP(%ecx)
1.20 dsl 1020: pushl %eax
1021: call _C_LABEL(ras_lookup)
1022: addl $8,%esp
1023: cmpl $-1,%eax
1.48 yamt 1024: je 2b
1.49 ad 1025: movl L_MD_REGS(%edi),%ecx
1026: movl %eax,TF_EIP(%ecx)
1.48 yamt 1027: jmp 2b
1.1 fvdl 1028:
1.60 yamt 1029: .Lcopy_iobitmap:
1030: /* Copy I/O bitmap. */
1031: movl $(IOMAPSIZE/4),%ecx
1032: pushl %esi
1033: pushl %edi
1034: movl %eax,%esi /* pcb_iomap */
1035: movl CPUVAR(SELF),%edi
1036: leal CPU_INFO_IOMAP(%edi),%edi
1037: rep
1038: movsl
1039: popl %edi
1040: popl %esi
1041: movl $((CPU_INFO_IOMAP - CPU_INFO_TSS) << 16),CPUVAR(IOBASE)
1042: jmp .Liobitmap_done
1043:
1.1 fvdl 1044: /*
1045: * void savectx(struct pcb *pcb);
1.48 yamt 1046: *
1.1 fvdl 1047: * Update pcb, saving current processor state.
1048: */
1049: ENTRY(savectx)
1.47 skrll 1050: movl 4(%esp),%edx # edx = pcb
1.1 fvdl 1051: movl %esp,PCB_ESP(%edx)
1052: movl %ebp,PCB_EBP(%edx)
1053: ret
1054:
1055: /*
1.48 yamt 1056: * osyscall()
1057: *
1.1 fvdl 1058: * Old call gate entry for syscall
1059: */
1060: IDTVEC(osyscall)
1.48 yamt 1061: pushfl # set eflags in trap frame
1.1 fvdl 1062: popl 8(%esp)
1063: pushl $7 # size of instruction for restart
1064: jmp syscall1
1065:
1066: /*
1.48 yamt 1067: * syscall()
1068: *
1.1 fvdl 1069: * Trap gate entry for syscall
1070: */
1071: IDTVEC(syscall)
1072: pushl $2 # size of instruction for restart
1073: syscall1:
1074: pushl $T_ASTFLT # trap # for doing ASTs
1075: INTRENTRY
1076: #ifdef DIAGNOSTIC
1077: movl CPUVAR(ILEVEL),%ebx
1078: testl %ebx,%ebx
1079: jz 1f
1080: pushl $5f
1081: call _C_LABEL(printf)
1082: addl $4,%esp
1083: #ifdef DDB
1084: int $3
1085: #endif
1.30 junyoung 1086: 1:
1.1 fvdl 1087: #endif /* DIAGNOSTIC */
1.67 ad 1088: incl CPUVAR(NSYSCALL) # count it atomically
1.68 ad 1089: movl CPUVAR(CURLWP),%edi
1090: movl L_PROC(%edi),%edx
1091: movl %esp,L_MD_REGS(%edi) # save pointer to frame
1.15 fvdl 1092: pushl %esp
1.1 fvdl 1093: call *P_MD_SYSCALL(%edx) # get pointer to syscall() function
1.15 fvdl 1094: addl $4,%esp
1.27 yamt 1095: .Lsyscall_checkast:
1.24 yamt 1096: /* Check for ASTs on exit to user mode. */
1.62 bouyer 1097: CLI(%eax)
1.68 ad 1098: movl L_MD_ASTPENDING(%edi), %eax
1099: orl CPUVAR(WANT_PMAPLOAD), %eax
1.24 yamt 1100: jnz 9f
1.62 bouyer 1101: #ifdef XEN
1102: STIC(%eax)
1103: jz 14f
1104: call _C_LABEL(stipending)
1105: testl %eax,%eax
1106: jz 14f
1107: /* process pending interrupts */
1108: CLI(%eax)
1109: movl CPUVAR(ILEVEL), %ebx
1110: movl $.Lsyscall_resume, %esi # address to resume loop at
1111: .Lsyscall_resume:
1112: movl %ebx,%eax # get cpl
1113: movl CPUVAR(IUNMASK)(,%eax,4),%eax
1114: andl CPUVAR(IPENDING),%eax # any non-masked bits left?
1115: jz 17f
1116: bsrl %eax,%eax
1117: btrl %eax,CPUVAR(IPENDING)
1118: movl CPUVAR(ISOURCES)(,%eax,4),%eax
1119: jmp *IS_RESUME(%eax)
1120: 17: movl %ebx, CPUVAR(ILEVEL) #restore cpl
1121: jmp .Lsyscall_checkast
1122: 14:
1123: #endif /* XEN */
1.1 fvdl 1124: #ifndef DIAGNOSTIC
1.24 yamt 1125: INTRFASTEXIT
1.1 fvdl 1126: #else /* DIAGNOSTIC */
1.24 yamt 1127: cmpl $IPL_NONE,CPUVAR(ILEVEL)
1.1 fvdl 1128: jne 3f
1129: INTRFASTEXIT
1.62 bouyer 1130: 3: STI(%eax)
1.1 fvdl 1131: pushl $4f
1132: call _C_LABEL(printf)
1133: addl $4,%esp
1.58 ad 1134: pushl $IPL_NONE
1135: call _C_LABEL(spllower)
1136: addl $4,%esp
1.53 yamt 1137: jmp .Lsyscall_checkast
1.1 fvdl 1138: 4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n"
1.30 junyoung 1139: 5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n"
1.1 fvdl 1140: #endif /* DIAGNOSTIC */
1.68 ad 1141: 9:
1142: cmpl $0, CPUVAR(WANT_PMAPLOAD)
1143: jz 10f
1144: STI(%eax)
1.24 yamt 1145: call _C_LABEL(pmap_load)
1.27 yamt 1146: jmp .Lsyscall_checkast /* re-check ASTs */
1.68 ad 1147: 10:
1148: /* Always returning to user mode here. */
1149: movl $0, L_MD_ASTPENDING(%edi)
1150: STI(%eax)
1151: /* Pushed T_ASTFLT into tf_trapno on entry. */
1152: pushl %esp
1153: call _C_LABEL(trap)
1154: addl $4,%esp
1155: jmp .Lsyscall_checkast /* re-check ASTs */
1.1 fvdl 1156:
1157: #if NNPX > 0
1158: /*
1159: * Special interrupt handlers. Someday intr0-intr15 will be used to count
1160: * interrupts. We'll still need a special exception 16 handler. The busy
1161: * latch stuff in probintr() can be moved to npxprobe().
1162: */
1163:
1.48 yamt 1164: /*
1165: * void probeintr(void)
1166: */
1.1 fvdl 1167: NENTRY(probeintr)
1168: ss
1169: incl _C_LABEL(npx_intrs_while_probing)
1170: pushl %eax
1171: movb $0x20,%al # EOI (asm in strings loses cpp features)
1172: outb %al,$0xa0 # IO_ICU2
1173: outb %al,$0x20 # IO_ICU1
1174: movb $0,%al
1175: outb %al,$0xf0 # clear BUSY# latch
1176: popl %eax
1177: iret
1178:
1.48 yamt 1179: /*
1180: * void probetrap(void)
1181: */
1.1 fvdl 1182: NENTRY(probetrap)
1183: ss
1184: incl _C_LABEL(npx_traps_while_probing)
1185: fnclex
1186: iret
1187:
1.48 yamt 1188: /*
1189: * int npx586bug1(int a, int b)
1190: */
1.1 fvdl 1191: NENTRY(npx586bug1)
1192: fildl 4(%esp) # x
1193: fildl 8(%esp) # y
1194: fld %st(1)
1195: fdiv %st(1),%st # x/y
1196: fmulp %st,%st(1) # (x/y)*y
1197: fsubrp %st,%st(1) # x-(x/y)*y
1198: pushl $0
1199: fistpl (%esp)
1200: popl %eax
1201: ret
1202: #endif /* NNPX > 0 */
1.50 ad 1203:
1204: /*
1205: * void sse2_zero_page(void *pg)
1206: *
1207: * Zero a page without polluting the cache.
1208: */
1209: ENTRY(sse2_zero_page)
1210: pushl %ebp
1211: movl %esp,%ebp
1212: movl 8(%esp), %edx
1213: movl $PAGE_SIZE, %ecx
1214: xorl %eax, %eax
1215: .align 16
1216: 1:
1217: movnti %eax, 0(%edx)
1218: movnti %eax, 4(%edx)
1219: movnti %eax, 8(%edx)
1220: movnti %eax, 12(%edx)
1221: movnti %eax, 16(%edx)
1222: movnti %eax, 20(%edx)
1223: movnti %eax, 24(%edx)
1224: movnti %eax, 28(%edx)
1225: subl $32, %ecx
1226: leal 32(%edx), %edx
1227: jnz 1b
1228: sfence
1229: pop %ebp
1230: ret
1231:
1232: /*
1233: * void sse2_copy_page(void *src, void *dst)
1234: *
1235: * Copy a page without polluting the cache.
1236: */
1237: ENTRY(sse2_copy_page)
1238: pushl %ebp
1239: pushl %ebx
1240: pushl %esi
1241: pushl %edi
1242: movl 20(%esp), %esi
1243: movl 24(%esp), %edi
1244: movl $PAGE_SIZE, %ebp
1245: .align 16
1246: 1:
1247: movl 0(%esi), %eax
1248: movl 4(%esi), %ebx
1249: movl 8(%esi), %ecx
1250: movl 12(%esi), %edx
1251: movnti %eax, 0(%edi)
1252: movnti %ebx, 4(%edi)
1253: movnti %ecx, 8(%edi)
1254: movnti %edx, 12(%edi)
1255: subl $16, %ebp
1256: leal 16(%esi), %esi
1257: leal 16(%edi), %edi
1258: jnz 1b
1259: sfence
1260: popl %edi
1261: popl %esi
1262: popl %ebx
1263: popl %ebp
1264: ret
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