Annotation of src/sys/arch/i386/i386/locore.S, Revision 1.59
1.59 ! lukem 1: /* $NetBSD: locore.S,v 1.58 2007/12/03 19:06:36 ad Exp $ */
1.53 yamt 2:
3: /*
4: * Copyright-o-rama!
5: */
6:
7: /*
8: * Copyright (c) 2001 Wasabi Systems, Inc.
9: * All rights reserved.
10: *
11: * Written by Frank van der Linden for Wasabi Systems, Inc.
12: *
13: * Redistribution and use in source and binary forms, with or without
14: * modification, are permitted provided that the following conditions
15: * are met:
16: * 1. Redistributions of source code must retain the above copyright
17: * notice, this list of conditions and the following disclaimer.
18: * 2. Redistributions in binary form must reproduce the above copyright
19: * notice, this list of conditions and the following disclaimer in the
20: * documentation and/or other materials provided with the distribution.
21: * 3. All advertising materials mentioning features or use of this software
22: * must display the following acknowledgement:
23: * This product includes software developed for the NetBSD Project by
24: * Wasabi Systems, Inc.
25: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
26: * or promote products derived from this software without specific prior
27: * written permission.
28: *
29: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
31: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
32: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
33: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39: * POSSIBILITY OF SUCH DAMAGE.
40: */
41:
1.1 fvdl 42:
43: /*-
1.48 yamt 44: * Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc.
1.1 fvdl 45: * All rights reserved.
46: *
47: * This code is derived from software contributed to The NetBSD Foundation
48: * by Charles M. Hannum.
49: *
50: * Redistribution and use in source and binary forms, with or without
51: * modification, are permitted provided that the following conditions
52: * are met:
53: * 1. Redistributions of source code must retain the above copyright
54: * notice, this list of conditions and the following disclaimer.
55: * 2. Redistributions in binary form must reproduce the above copyright
56: * notice, this list of conditions and the following disclaimer in the
57: * documentation and/or other materials provided with the distribution.
58: * 3. All advertising materials mentioning features or use of this software
59: * must display the following acknowledgement:
60: * This product includes software developed by the NetBSD
61: * Foundation, Inc. and its contributors.
62: * 4. Neither the name of The NetBSD Foundation nor the names of its
63: * contributors may be used to endorse or promote products derived
64: * from this software without specific prior written permission.
65: *
66: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
67: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
68: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
69: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
70: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
71: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
72: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
73: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
74: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
75: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
76: * POSSIBILITY OF SUCH DAMAGE.
77: */
78:
79: /*-
80: * Copyright (c) 1990 The Regents of the University of California.
81: * All rights reserved.
82: *
83: * This code is derived from software contributed to Berkeley by
84: * William Jolitz.
85: *
86: * Redistribution and use in source and binary forms, with or without
87: * modification, are permitted provided that the following conditions
88: * are met:
89: * 1. Redistributions of source code must retain the above copyright
90: * notice, this list of conditions and the following disclaimer.
91: * 2. Redistributions in binary form must reproduce the above copyright
92: * notice, this list of conditions and the following disclaimer in the
93: * documentation and/or other materials provided with the distribution.
1.12 agc 94: * 3. Neither the name of the University nor the names of its contributors
1.1 fvdl 95: * may be used to endorse or promote products derived from this software
96: * without specific prior written permission.
97: *
98: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
99: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
100: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
101: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
102: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
103: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
104: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
105: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
106: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
107: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
108: * SUCH DAMAGE.
109: *
110: * @(#)locore.s 7.3 (Berkeley) 5/13/91
111: */
112:
1.59 ! lukem 113: #include <machine/asm.h>
! 114: __KERNEL_RCSID(0, "$NetBSD$");
! 115:
1.18 christos 116: #include "opt_compat_oldboot.h"
1.1 fvdl 117: #include "opt_ddb.h"
118: #include "opt_realmem.h"
1.18 christos 119: #include "opt_vm86.h"
1.1 fvdl 120:
121: #include "npx.h"
122: #include "assym.h"
123: #include "lapic.h"
124: #include "ioapic.h"
1.8 fvdl 125: #include "ksyms.h"
1.1 fvdl 126:
127: #include <sys/errno.h>
128: #include <sys/syscall.h>
129:
130: #include <machine/cputypes.h>
131: #include <machine/segments.h>
132: #include <machine/specialreg.h>
133: #include <machine/trap.h>
134: #include <machine/i82489reg.h>
1.37 jmmv 135: #include <machine/multiboot.h>
1.48 yamt 136: #include <machine/frameasm.h>
137: #include <machine/i82489reg.h>
1.1 fvdl 138:
139: /* XXX temporary kluge; these should not be here */
140: /* Get definitions for IOM_BEGIN, IOM_END, and IOM_SIZE */
141: #include <dev/isa/isareg.h>
142:
143: /*
144: * Initialization
145: */
146: .data
147:
148: .globl _C_LABEL(cpu)
1.38 jmmv 149: .globl _C_LABEL(esym)
150: .globl _C_LABEL(atdevbase)
1.40 yamt 151: .globl _C_LABEL(proc0uarea),_C_LABEL(PDPpaddr)
1.1 fvdl 152: .globl _C_LABEL(gdt)
153: .globl _C_LABEL(idt)
1.30 junyoung 154: .globl _C_LABEL(lapic_tpr)
155:
1.1 fvdl 156: #if NLAPIC > 0
157: #ifdef __ELF__
1.7 thorpej 158: .align PAGE_SIZE
1.1 fvdl 159: #else
160: .align 12
161: #endif
162: .globl _C_LABEL(local_apic), _C_LABEL(lapic_id)
163: _C_LABEL(local_apic):
164: .space LAPIC_ID
1.30 junyoung 165: _C_LABEL(lapic_id):
1.1 fvdl 166: .long 0x00000000
167: .space LAPIC_TPRI-(LAPIC_ID+4)
1.30 junyoung 168: _C_LABEL(lapic_tpr):
1.1 fvdl 169: .space LAPIC_PPRI-LAPIC_TPRI
1.30 junyoung 170: _C_LABEL(lapic_ppr):
1.1 fvdl 171: .space LAPIC_ISR-LAPIC_PPRI
172: _C_LABEL(lapic_isr):
1.7 thorpej 173: .space PAGE_SIZE-LAPIC_ISR
1.1 fvdl 174: #else
1.30 junyoung 175: _C_LABEL(lapic_tpr):
1.1 fvdl 176: .long 0
177: #endif
1.30 junyoung 178:
1.48 yamt 179: _C_LABEL(cpu): .long 0 # are we 80486, Pentium, or..
1.1 fvdl 180: _C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual
1.40 yamt 181: _C_LABEL(proc0uarea): .long 0
1.31 junyoung 182: _C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm
1.53 yamt 183: _C_LABEL(tablesize): .long 0
1.30 junyoung 184:
1.1 fvdl 185: .space 512
186: tmpstk:
187:
188:
1.35 yamt 189: #define _RELOC(x) ((x) - KERNBASE)
1.1 fvdl 190: #define RELOC(x) _RELOC(_C_LABEL(x))
191:
192: .text
193: .globl _C_LABEL(kernel_text)
194: .set _C_LABEL(kernel_text),KERNTEXTOFF
195:
196: .globl start
197: start: movw $0x1234,0x472 # warm boot
198:
1.37 jmmv 199: #if defined(MULTIBOOT)
200: jmp 1f
201:
202: .align 4
203: .globl Multiboot_Header
204: _C_LABEL(Multiboot_Header):
1.44 jmmv 205: #define MULTIBOOT_HEADER_FLAGS (MULTIBOOT_HEADER_WANT_MEMORY)
1.37 jmmv 206: .long MULTIBOOT_HEADER_MAGIC
207: .long MULTIBOOT_HEADER_FLAGS
208: .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
209:
210: 1:
211: /* Check if we are being executed by a Multiboot-compliant boot
212: * loader. */
213: cmpl $MULTIBOOT_INFO_MAGIC,%eax
214: jne 1f
215:
1.43 mrg 216: /*
217: * Indeed, a multiboot-compliant boot loader executed us. We copy
1.37 jmmv 218: * the received Multiboot information structure into kernel's data
219: * space to process it later -- after we are relocated. It will
1.43 mrg 220: * be safer to run complex C code than doing it at this point.
221: */
1.37 jmmv 222: pushl %ebx # Address of Multiboot information
223: call _C_LABEL(multiboot_pre_reloc)
224: addl $4,%esp
1.38 jmmv 225: jmp 2f
1.37 jmmv 226: #endif
227:
228: 1:
1.1 fvdl 229: /*
1.38 jmmv 230: * At this point, we know that a NetBSD-specific boot loader
231: * booted this kernel. The stack carries the following parameters:
1.41 jmmv 232: * (boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem),
1.38 jmmv 233: * 4 bytes each.
1.1 fvdl 234: */
1.38 jmmv 235: addl $4,%esp # Discard return address to boot loader
236: call _C_LABEL(native_loader)
237: addl $24,%esp
1.1 fvdl 238:
239: 2:
240: /* First, reset the PSL. */
241: pushl $PSL_MBO
242: popfl
243:
244: /* Clear segment registers; always null in proc0. */
245: xorl %eax,%eax
246: movw %ax,%fs
247: movw %ax,%gs
248: decl %eax
249: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
250:
251: /* Find out our CPU type. */
252:
253: try386: /* Try to toggle alignment check flag; does not exist on 386. */
254: pushfl
255: popl %eax
256: movl %eax,%ecx
257: orl $PSL_AC,%eax
258: pushl %eax
259: popfl
260: pushfl
261: popl %eax
262: xorl %ecx,%eax
263: andl $PSL_AC,%eax
264: pushl %ecx
265: popfl
266:
267: testl %eax,%eax
268: jnz try486
269:
270: /*
271: * Try the test of a NexGen CPU -- ZF will not change on a DIV
272: * instruction on a NexGen, it will on an i386. Documented in
273: * Nx586 Processor Recognition Application Note, NexGen, Inc.
274: */
275: movl $0x5555,%eax
276: xorl %edx,%edx
277: movl $2,%ecx
278: divl %ecx
279: jnz is386
280:
281: isnx586:
282: /*
283: * Don't try cpuid, as Nx586s reportedly don't support the
284: * PSL_ID bit.
285: */
286: movl $CPU_NX586,RELOC(cpu)
287: jmp 2f
288:
289: is386:
290: movl $CPU_386,RELOC(cpu)
291: jmp 2f
292:
293: try486: /* Try to toggle identification flag; does not exist on early 486s. */
294: pushfl
295: popl %eax
296: movl %eax,%ecx
297: xorl $PSL_ID,%eax
298: pushl %eax
299: popfl
300: pushfl
301: popl %eax
302: xorl %ecx,%eax
303: andl $PSL_ID,%eax
304: pushl %ecx
305: popfl
306:
307: testl %eax,%eax
308: jnz try586
309: is486: movl $CPU_486,RELOC(cpu)
310: /*
311: * Check Cyrix CPU
312: * Cyrix CPUs do not change the undefined flags following
313: * execution of the divide instruction which divides 5 by 2.
314: *
315: * Note: CPUID is enabled on M2, so it passes another way.
316: */
317: pushfl
318: movl $0x5555, %eax
319: xorl %edx, %edx
320: movl $2, %ecx
321: clc
322: divl %ecx
323: jnc trycyrix486
324: popfl
325: jmp 2f
326: trycyrix486:
327: movl $CPU_6x86,RELOC(cpu) # set CPU type
328: /*
329: * Check for Cyrix 486 CPU by seeing if the flags change during a
330: * divide. This is documented in the Cx486SLC/e SMM Programmer's
331: * Guide.
332: */
333: xorl %edx,%edx
334: cmpl %edx,%edx # set flags to known state
335: pushfl
336: popl %ecx # store flags in ecx
337: movl $-1,%eax
338: movl $4,%ebx
339: divl %ebx # do a long division
340: pushfl
341: popl %eax
342: xorl %ecx,%eax # are the flags different?
343: testl $0x8d5,%eax # only check C|PF|AF|Z|N|V
344: jne 2f # yes; must be Cyrix 6x86 CPU
345: movl $CPU_486DLC,RELOC(cpu) # set CPU type
346:
347: #ifndef CYRIX_CACHE_WORKS
348: /* Disable caching of the ISA hole only. */
349: invd
350: movb $CCR0,%al # Configuration Register index (CCR0)
351: outb %al,$0x22
352: inb $0x23,%al
353: orb $(CCR0_NC1|CCR0_BARB),%al
354: movb %al,%ah
355: movb $CCR0,%al
356: outb %al,$0x22
357: movb %ah,%al
358: outb %al,$0x23
359: invd
360: #else /* CYRIX_CACHE_WORKS */
361: /* Set cache parameters */
362: invd # Start with guaranteed clean cache
363: movb $CCR0,%al # Configuration Register index (CCR0)
364: outb %al,$0x22
365: inb $0x23,%al
366: andb $~CCR0_NC0,%al
367: #ifndef CYRIX_CACHE_REALLY_WORKS
368: orb $(CCR0_NC1|CCR0_BARB),%al
369: #else
370: orb $CCR0_NC1,%al
371: #endif
372: movb %al,%ah
373: movb $CCR0,%al
374: outb %al,$0x22
375: movb %ah,%al
376: outb %al,$0x23
377: /* clear non-cacheable region 1 */
378: movb $(NCR1+2),%al
379: outb %al,$0x22
380: movb $NCR_SIZE_0K,%al
381: outb %al,$0x23
382: /* clear non-cacheable region 2 */
383: movb $(NCR2+2),%al
384: outb %al,$0x22
385: movb $NCR_SIZE_0K,%al
386: outb %al,$0x23
387: /* clear non-cacheable region 3 */
388: movb $(NCR3+2),%al
389: outb %al,$0x22
390: movb $NCR_SIZE_0K,%al
391: outb %al,$0x23
392: /* clear non-cacheable region 4 */
393: movb $(NCR4+2),%al
394: outb %al,$0x22
395: movb $NCR_SIZE_0K,%al
396: outb %al,$0x23
397: /* enable caching in CR0 */
398: movl %cr0,%eax
399: andl $~(CR0_CD|CR0_NW),%eax
400: movl %eax,%cr0
401: invd
402: #endif /* CYRIX_CACHE_WORKS */
403:
404: jmp 2f
405:
406: try586: /* Use the `cpuid' instruction. */
407: xorl %eax,%eax
408: cpuid
409: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
410:
411: 2:
412: /*
413: * Finished with old stack; load new %esp now instead of later so we
414: * can trace this code without having to worry about the trace trap
415: * clobbering the memory test or the zeroing of the bss+bootstrap page
416: * tables.
417: *
418: * The boot program should check:
419: * text+data <= &stack_variable - more_space_for_stack
420: * text+data+bss+pad+space_for_page_tables <= end_of_memory
421: * Oops, the gdt is in the carcass of the boot program so clearing
422: * the rest of memory is still not possible.
423: */
424: movl $_RELOC(tmpstk),%esp # bootstrap stack end location
425:
426: /*
427: * Virtual address space of kernel:
428: *
1.53 yamt 429: * text | data | bss | [syms] | page dir | proc0 kstack | L1 ptp
1.1 fvdl 430: * 0 1 2 3
431: */
1.53 yamt 432:
433: #define PROC0_PDIR_OFF 0
434: #define PROC0_STK_OFF (PROC0_PDIR_OFF + PAGE_SIZE)
435: #define PROC0_PTP1_OFF (PROC0_STK_OFF + UPAGES * PAGE_SIZE)
436:
437: /*
438: * fillkpt
439: * eax = pte (page frame | control | status)
440: * ebx = page table address
441: * ecx = number of pages to map
442: */
443:
444: #define fillkpt \
445: 1: movl %eax,(%ebx) ; /* store phys addr */ \
446: addl $4,%ebx ; /* next pte/pde */ \
447: addl $PAGE_SIZE,%eax ; /* next phys page */ \
448: loop 1b ; \
449:
1.1 fvdl 450:
451: /* Find end of kernel image. */
452: movl $RELOC(end),%edi
1.8 fvdl 453: #if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE)
1.1 fvdl 454: /* Save the symbols (if loaded). */
455: movl RELOC(esym),%eax
456: testl %eax,%eax
457: jz 1f
1.35 yamt 458: subl $KERNBASE,%eax
1.1 fvdl 459: movl %eax,%edi
460: 1:
461: #endif
462:
1.53 yamt 463: /* Compute sizes */
1.1 fvdl 464: movl %edi,%esi # edi = esym ? esym : end
465: addl $PGOFSET,%esi # page align up
466: andl $~PGOFSET,%esi
467:
1.53 yamt 468: /* nkptp[1] = (esi + ~L2_FRAME) >> L2_SHIFT + 1; */
469: movl %esi,%eax
470: addl $~L2_FRAME,%eax
471: shrl $L2_SHIFT,%eax
472: incl %eax /* one more ptp for VAs stolen by bootstrap */
473: 1: movl %eax,RELOC(nkptp)+1*4
474:
475: /* tablesize = (1 + UPAGES + nkptp) << PGSHIFT; */
476: addl $(1+UPAGES),%eax
477: shll $PGSHIFT,%eax
478: movl %eax,RELOC(tablesize)
479:
480: /* ensure that nkptp covers bootstrap tables */
481: addl %esi,%eax
482: addl $~L2_FRAME,%eax
483: shrl $L2_SHIFT,%eax
484: incl %eax
485: cmpl %eax,RELOC(nkptp)+1*4
486: jnz 1b
487:
488: /* Clear tables */
489: movl %esi,%edi
1.1 fvdl 490: xorl %eax,%eax
491: cld
1.53 yamt 492: movl RELOC(tablesize),%ecx
493: shrl $2,%ecx
1.1 fvdl 494: rep
495: stosl
496:
1.53 yamt 497: leal (PROC0_PTP1_OFF)(%esi), %ebx
1.1 fvdl 498:
499: /*
500: * Build initial page tables.
501: */
1.53 yamt 502: /*
503: * Compute &__data_start - KERNBASE. This can't be > 4G,
504: * or we can't deal with it anyway, since we can't load it in
505: * 32 bit mode. So use the bottom 32 bits.
506: */
507: movl $RELOC(__data_start),%edx
1.1 fvdl 508: andl $~PGOFSET,%edx
1.30 junyoung 509:
1.53 yamt 510: /*
511: * Skip the first MB.
512: */
1.1 fvdl 513: movl $_RELOC(KERNTEXTOFF),%eax
514: movl %eax,%ecx
1.53 yamt 515: shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */
516: addl %ecx,%ebx
1.1 fvdl 517:
518: /* Map the kernel text read-only. */
519: movl %edx,%ecx
520: subl %eax,%ecx
521: shrl $PGSHIFT,%ecx
522: orl $(PG_V|PG_KR),%eax
523: fillkpt
524:
525: /* Map the data, BSS, and bootstrap tables read-write. */
526: leal (PG_V|PG_KW)(%edx),%eax
1.53 yamt 527: movl RELOC(tablesize),%ecx
1.1 fvdl 528: addl %esi,%ecx # end of tables
529: subl %edx,%ecx # subtract end of text
530: shrl $PGSHIFT,%ecx
531: fillkpt
532:
1.53 yamt 533: /* Map ISA I/O mem (later atdevbase) */
1.1 fvdl 534: movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax # having these bits set
535: movl $(IOM_SIZE>>PGSHIFT),%ecx # for this many pte s,
536: fillkpt
537:
538: /*
539: * Construct a page table directory.
540: */
1.53 yamt 541: /* Set up top level entries for identity mapping */
542: leal (PROC0_PDIR_OFF)(%esi),%ebx
543: leal (PROC0_PTP1_OFF)(%esi),%eax
544: orl $(PG_V|PG_KW), %eax
545: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 546: fillkpt
547:
1.53 yamt 548: /* Set up top level entries for actual kernel mapping */
549: leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*4)(%esi),%ebx
550: leal (PROC0_PTP1_OFF)(%esi),%eax
551: orl $(PG_V|PG_KW), %eax
552: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 553: fillkpt
554:
555: /* Install a PDE recursively mapping page directory as a page table! */
1.53 yamt 556: leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*4)(%esi),%ebx
557: leal (PROC0_PDIR_OFF)(%esi),%eax
558: orl $(PG_V|PG_KW),%eax
559: movl %eax,(%ebx)
560:
1.1 fvdl 561:
1.31 junyoung 562: /* Save phys. addr of PDP, for libkvm. */
563: movl %esi,RELOC(PDPpaddr)
1.1 fvdl 564:
1.53 yamt 565: /*
566: * Startup checklist:
567: * 1. Load %cr3 with pointer to PDIR.
568: */
1.1 fvdl 569: movl %esi,%eax # phys address of ptd in proc 0
570: movl %eax,%cr3 # load ptd addr into mmu
1.53 yamt 571:
572: /*
573: * 2. Enable paging and the rest of it.
574: */
1.1 fvdl 575: movl %cr0,%eax # get control word
576: # enable paging & NPX emulation
577: orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_EM|CR0_MP),%eax
578: movl %eax,%cr0 # and let's page NOW!
579:
580: pushl $begin # jump to high mem
581: ret
582:
583: begin:
1.53 yamt 584: /*
585: * We have arrived.
586: * There's no need anymore for the identity mapping in low
587: * memory, remove it.
588: */
589: movl _C_LABEL(nkptp)+1*4,%ecx
590: leal (PROC0_PDIR_OFF)(%esi),%ebx # old, phys address of PDIR
591: addl $(KERNBASE), %ebx # new, virtual address of PDIR
1.1 fvdl 592: 1: movl $0,(%ebx)
1.53 yamt 593: addl $4,%ebx
1.1 fvdl 594: loop 1b
595:
596: /* Relocate atdevbase. */
1.53 yamt 597: movl $KERNBASE,%edx
598: addl _C_LABEL(tablesize),%edx
1.1 fvdl 599: addl %esi,%edx
600: movl %edx,_C_LABEL(atdevbase)
601:
602: /* Set up bootstrap stack. */
1.53 yamt 603: leal (PROC0_STK_OFF+KERNBASE)(%esi),%eax
1.40 yamt 604: movl %eax,_C_LABEL(proc0uarea)
605: leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp
606: movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3
1.1 fvdl 607: xorl %ebp,%ebp # mark end of frames
608:
1.37 jmmv 609: #if defined(MULTIBOOT)
610: /* It is now safe to parse the Multiboot information structure
611: * we saved before from C code. Note that we cannot delay its
612: * parsing any more because initgdt (called below) needs to make
613: * use of this information. */
614: call _C_LABEL(multiboot_post_reloc)
615: #endif
616:
1.1 fvdl 617: subl $NGDT*8, %esp # space for temporary gdt
618: pushl %esp
619: call _C_LABEL(initgdt)
620: addl $4,%esp
1.30 junyoung 621:
1.53 yamt 622: movl _C_LABEL(tablesize),%eax
1.1 fvdl 623: addl %esi,%eax # skip past stack and page tables
624:
625: pushl %eax
626: call _C_LABEL(init386) # wire 386 chip for unix operation
627: addl $4+NGDT*8,%esp # pop temporary gdt
628:
629: #ifdef SAFARI_FIFO_HACK
630: movb $5,%al
631: movw $0x37b,%dx
632: outb %al,%dx
633: movw $0x37f,%dx
634: inb %dx,%al
635: movb %al,%cl
636:
637: orb $1,%cl
638:
639: movb $5,%al
640: movw $0x37b,%dx
641: outb %al,%dx
642: movw $0x37f,%dx
643: movb %cl,%al
644: outb %al,%dx
645: #endif /* SAFARI_FIFO_HACK */
646:
647: call _C_LABEL(main)
648:
649: /*
1.48 yamt 650: * void lwp_trampoline(void);
651: *
1.1 fvdl 652: * This is a trampoline function pushed onto the stack of a newly created
653: * process in order to do some additional setup. The trampoline is entered by
654: * cpu_switch()ing to the process, so we abuse the callee-saved registers used
655: * by cpu_switch() to store the information about the stub to call.
656: * NOTE: This function does not have a normal calling sequence!
657: */
1.48 yamt 658: NENTRY(lwp_trampoline)
659: pushl %ebp
660: xorl %ebp,%ebp
661: pushl %eax
662: call _C_LABEL(lwp_startup)
663: addl $8,%esp
1.1 fvdl 664: pushl %ebx
665: call *%esi
666: addl $4,%esp
1.53 yamt 667: DO_DEFERRED_SWITCH
1.1 fvdl 668: INTRFASTEXIT
669: /* NOTREACHED */
670:
671: /*
1.48 yamt 672: * sigcode()
673: *
674: * Signal trampoline; copied to top of user stack. Used only for
675: * compatibility with old releases of NetBSD.
1.1 fvdl 676: */
677: NENTRY(sigcode)
678: /*
679: * Handler has returned here as if we called it. The sigcontext
680: * is on the stack after the 3 args "we" pushed.
681: */
682: leal 12(%esp),%eax # get pointer to sigcontext
683: movl %eax,4(%esp) # put it in the argument slot
684: # fake return address already there
1.17 christos 685: movl $SYS_compat_16___sigreturn14,%eax
1.1 fvdl 686: int $0x80 # enter kernel with args on stack
687: movl $SYS_exit,%eax
688: int $0x80 # exit if sigreturn fails
689: .globl _C_LABEL(esigcode)
690: _C_LABEL(esigcode):
691:
692: /*
1.48 yamt 693: * int setjmp(label_t *)
694: *
695: * Used primarily by DDB.
1.1 fvdl 696: */
697: ENTRY(setjmp)
698: movl 4(%esp),%eax
699: movl %ebx,(%eax) # save ebx
700: movl %esp,4(%eax) # save esp
701: movl %ebp,8(%eax) # save ebp
702: movl %esi,12(%eax) # save esi
703: movl %edi,16(%eax) # save edi
704: movl (%esp),%edx # get rta
705: movl %edx,20(%eax) # save eip
1.48 yamt 706: xorl %eax,%eax # return 0
1.1 fvdl 707: ret
708:
1.48 yamt 709: /*
710: * int longjmp(label_t *)
711: *
712: * Used primarily by DDB.
713: */
1.1 fvdl 714: ENTRY(longjmp)
715: movl 4(%esp),%eax
716: movl (%eax),%ebx # restore ebx
717: movl 4(%eax),%esp # restore esp
718: movl 8(%eax),%ebp # restore ebp
719: movl 12(%eax),%esi # restore esi
720: movl 16(%eax),%edi # restore edi
721: movl 20(%eax),%edx # get rta
722: movl %edx,(%esp) # put in return frame
1.48 yamt 723: movl $1,%eax # return 1
1.1 fvdl 724: ret
725:
726: /*
1.58 ad 727: * struct lwp *cpu_switchto(struct lwp *oldlwp, struct newlwp,
728: * bool returning)
1.30 junyoung 729: *
1.48 yamt 730: * 1. if (oldlwp != NULL), save its context.
731: * 2. then, restore context of newlwp.
732: *
733: * Note that the stack frame layout is known to "struct switchframe" in
734: * <machine/frame.h> and to the code in cpu_lwp_fork() which initializes
1.5 thorpej 735: * it for a new lwp.
1.1 fvdl 736: */
1.48 yamt 737: ENTRY(cpu_switchto)
1.1 fvdl 738: pushl %ebx
739: pushl %esi
740: pushl %edi
741:
1.48 yamt 742: movl 16(%esp),%esi # oldlwp
743: movl 20(%esp),%edi # newlwp
1.58 ad 744: movl 24(%esp),%edx # returning
1.48 yamt 745: testl %esi,%esi
746: jz 1f
1.1 fvdl 747:
1.48 yamt 748: /* Save old context. */
749: movl L_ADDR(%esi),%eax
750: movl %esp,PCB_ESP(%eax)
751: movl %ebp,PCB_EBP(%eax)
752:
753: /* Switch to newlwp's stack. */
754: 1: movl L_ADDR(%edi),%ebx
755: movl PCB_EBP(%ebx),%ebp
756: movl PCB_ESP(%ebx),%esp
1.1 fvdl 757:
1.58 ad 758: /* Set curlwp. */
759: movl %edi,CPUVAR(CURLWP)
760:
761: /* Skip the rest if returning to a pinned LWP. */
762: testl %edx,%edx
763: jnz 4f
764:
1.48 yamt 765: /* Switch TSS. Reset "task busy" flag before loading. */
1.26 yamt 766: movl %cr3,%eax
1.48 yamt 767: movl %eax,PCB_CR3(%ebx) # for TSS gates
1.54 ad 768: movl CPUVAR(GDT),%ecx
1.48 yamt 769: movl L_MD_TSS_SEL(%edi),%edx
1.54 ad 770: andl $~0x0200,4(%ecx,%edx, 1)
1.1 fvdl 771: ltr %dx
772:
773: /* Don't bother with the rest if switching to a system process. */
1.48 yamt 774: testl $LW_SYSTEM,L_FLAG(%edi)
775: jnz 4f
1.1 fvdl 776:
1.54 ad 777: /* Restore thread-private %fs/%gs descriptors. */
1.55 ad 778: movl PCB_FSD(%ebx), %eax
779: movl PCB_FSD+4(%ebx), %edx
1.54 ad 780: movl %eax, (GUFS_SEL*8)(%ecx)
781: movl %edx, (GUFS_SEL*8+4)(%ecx)
1.55 ad 782: movl PCB_GSD(%ebx), %eax
783: movl PCB_GSD+4(%ebx), %edx
1.54 ad 784: movl %eax, (GUGS_SEL*8)(%ecx)
785: movl %edx, (GUGS_SEL*8+4)(%ecx)
786:
1.56 ad 787: /* Is this process using RAS (restartable atomic sequences)? */
788: movl L_PROC(%edi),%eax
789: cmpl $0,P_RASLIST(%eax)
790: jne 5f
791:
1.48 yamt 792: /*
793: * Restore cr0 (including FPU state). Raise the IPL to IPL_IPI.
794: * FPU IPIs can alter the LWP's saved cr0. Dropping the priority
795: * is deferred until mi_switch(), when cpu_switchto() returns.
796: */
797: 2: movl $IPL_IPI,CPUVAR(ILEVEL)
798: movl PCB_CR0(%ebx),%ecx
799: movl %cr0,%edx
1.1 fvdl 800:
1.30 junyoung 801: /*
1.22 wiz 802: * If our floating point registers are on a different CPU,
1.48 yamt 803: * set CR0_TS so we'll trap rather than reuse bogus state.
1.1 fvdl 804: */
1.48 yamt 805: movl PCB_FPCPU(%ebx),%eax
806: cmpl CPUVAR(SELF),%eax
807: je 3f
1.1 fvdl 808: orl $CR0_TS,%ecx
1.48 yamt 809:
810: /* Reloading CR0 is very expensive - avoid if possible. */
811: 3: cmpl %edx,%ecx
812: je 4f
1.1 fvdl 813: movl %ecx,%cr0
814:
1.48 yamt 815: /* Return to the new LWP, returning 'oldlwp' in %eax. */
816: 4: movl %esi,%eax
1.1 fvdl 817: popl %edi
818: popl %esi
819: popl %ebx
820: ret
1.20 dsl 821:
1.48 yamt 822: /* Check for restartable atomic sequences (RAS). */
823: 5: movl L_MD_REGS(%edi),%ecx
824: pushl TF_EIP(%ecx)
1.20 dsl 825: pushl %eax
826: call _C_LABEL(ras_lookup)
827: addl $8,%esp
828: cmpl $-1,%eax
1.48 yamt 829: je 2b
1.49 ad 830: movl L_MD_REGS(%edi),%ecx
831: movl %eax,TF_EIP(%ecx)
1.48 yamt 832: jmp 2b
1.1 fvdl 833:
834: /*
835: * void savectx(struct pcb *pcb);
1.48 yamt 836: *
1.1 fvdl 837: * Update pcb, saving current processor state.
838: */
839: ENTRY(savectx)
1.47 skrll 840: movl 4(%esp),%edx # edx = pcb
1.1 fvdl 841: movl %esp,PCB_ESP(%edx)
842: movl %ebp,PCB_EBP(%edx)
843: ret
844:
845: /*
1.48 yamt 846: * osyscall()
847: *
1.1 fvdl 848: * Old call gate entry for syscall
849: */
850: IDTVEC(osyscall)
1.48 yamt 851: pushfl # set eflags in trap frame
1.1 fvdl 852: popl 8(%esp)
853: pushl $7 # size of instruction for restart
854: jmp syscall1
855:
856: /*
1.48 yamt 857: * syscall()
858: *
1.1 fvdl 859: * Trap gate entry for syscall
860: */
861: IDTVEC(syscall)
862: pushl $2 # size of instruction for restart
863: syscall1:
864: pushl $T_ASTFLT # trap # for doing ASTs
865: INTRENTRY
866:
867: #ifdef DIAGNOSTIC
1.24 yamt 868: cmpl $0, CPUVAR(WANT_PMAPLOAD)
869: jz 1f
870: pushl $6f
871: call _C_LABEL(printf)
872: addl $4, %esp
873: 1:
1.1 fvdl 874: movl CPUVAR(ILEVEL),%ebx
875: testl %ebx,%ebx
876: jz 1f
877: pushl $5f
878: call _C_LABEL(printf)
879: addl $4,%esp
880: #ifdef DDB
881: int $3
882: #endif
1.30 junyoung 883: 1:
1.1 fvdl 884: #endif /* DIAGNOSTIC */
1.5 thorpej 885: movl CPUVAR(CURLWP),%edx
886: movl %esp,L_MD_REGS(%edx) # save pointer to frame
887: movl L_PROC(%edx),%edx
1.15 fvdl 888: pushl %esp
1.1 fvdl 889: call *P_MD_SYSCALL(%edx) # get pointer to syscall() function
1.15 fvdl 890: addl $4,%esp
1.27 yamt 891: .Lsyscall_checkast:
1.24 yamt 892: /* Check for ASTs on exit to user mode. */
1.1 fvdl 893: cli
1.5 thorpej 894: CHECK_ASTPENDING(%eax)
1.1 fvdl 895: je 1f
896: /* Always returning to user mode here. */
1.5 thorpej 897: CLEAR_ASTPENDING(%eax)
1.1 fvdl 898: sti
899: /* Pushed T_ASTFLT into tf_trapno on entry. */
1.15 fvdl 900: pushl %esp
1.1 fvdl 901: call _C_LABEL(trap)
1.15 fvdl 902: addl $4,%esp
1.27 yamt 903: jmp .Lsyscall_checkast /* re-check ASTs */
1.53 yamt 904: 1: CHECK_DEFERRED_SWITCH
1.24 yamt 905: jnz 9f
1.1 fvdl 906: #ifndef DIAGNOSTIC
1.24 yamt 907: INTRFASTEXIT
1.1 fvdl 908: #else /* DIAGNOSTIC */
1.24 yamt 909: cmpl $IPL_NONE,CPUVAR(ILEVEL)
1.1 fvdl 910: jne 3f
911: INTRFASTEXIT
912: 3: sti
913: pushl $4f
914: call _C_LABEL(printf)
915: addl $4,%esp
1.58 ad 916: pushl $IPL_NONE
917: call _C_LABEL(spllower)
918: addl $4,%esp
1.53 yamt 919: jmp .Lsyscall_checkast
1.1 fvdl 920: 4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n"
1.30 junyoung 921: 5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n"
922: 6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n"
1.1 fvdl 923: #endif /* DIAGNOSTIC */
1.24 yamt 924: 9: sti
925: call _C_LABEL(pmap_load)
1.27 yamt 926: jmp .Lsyscall_checkast /* re-check ASTs */
1.1 fvdl 927:
928: #if NNPX > 0
929: /*
930: * Special interrupt handlers. Someday intr0-intr15 will be used to count
931: * interrupts. We'll still need a special exception 16 handler. The busy
932: * latch stuff in probintr() can be moved to npxprobe().
933: */
934:
1.48 yamt 935: /*
936: * void probeintr(void)
937: */
1.1 fvdl 938: NENTRY(probeintr)
939: ss
940: incl _C_LABEL(npx_intrs_while_probing)
941: pushl %eax
942: movb $0x20,%al # EOI (asm in strings loses cpp features)
943: outb %al,$0xa0 # IO_ICU2
944: outb %al,$0x20 # IO_ICU1
945: movb $0,%al
946: outb %al,$0xf0 # clear BUSY# latch
947: popl %eax
948: iret
949:
1.48 yamt 950: /*
951: * void probetrap(void)
952: */
1.1 fvdl 953: NENTRY(probetrap)
954: ss
955: incl _C_LABEL(npx_traps_while_probing)
956: fnclex
957: iret
958:
1.48 yamt 959: /*
960: * int npx586bug1(int a, int b)
961: */
1.1 fvdl 962: NENTRY(npx586bug1)
963: fildl 4(%esp) # x
964: fildl 8(%esp) # y
965: fld %st(1)
966: fdiv %st(1),%st # x/y
967: fmulp %st,%st(1) # (x/y)*y
968: fsubrp %st,%st(1) # x-(x/y)*y
969: pushl $0
970: fistpl (%esp)
971: popl %eax
972: ret
973: #endif /* NNPX > 0 */
1.50 ad 974:
975: /*
976: * void sse2_zero_page(void *pg)
977: *
978: * Zero a page without polluting the cache.
979: */
980: ENTRY(sse2_zero_page)
981: pushl %ebp
982: movl %esp,%ebp
983: movl 8(%esp), %edx
984: movl $PAGE_SIZE, %ecx
985: xorl %eax, %eax
986: .align 16
987: 1:
988: movnti %eax, 0(%edx)
989: movnti %eax, 4(%edx)
990: movnti %eax, 8(%edx)
991: movnti %eax, 12(%edx)
992: movnti %eax, 16(%edx)
993: movnti %eax, 20(%edx)
994: movnti %eax, 24(%edx)
995: movnti %eax, 28(%edx)
996: subl $32, %ecx
997: leal 32(%edx), %edx
998: jnz 1b
999: sfence
1000: pop %ebp
1001: ret
1002:
1003: /*
1004: * void sse2_copy_page(void *src, void *dst)
1005: *
1006: * Copy a page without polluting the cache.
1007: */
1008: ENTRY(sse2_copy_page)
1009: pushl %ebp
1010: pushl %ebx
1011: pushl %esi
1012: pushl %edi
1013: movl 20(%esp), %esi
1014: movl 24(%esp), %edi
1015: movl $PAGE_SIZE, %ebp
1016: .align 16
1017: 1:
1018: movl 0(%esi), %eax
1019: movl 4(%esi), %ebx
1020: movl 8(%esi), %ecx
1021: movl 12(%esi), %edx
1022: movnti %eax, 0(%edi)
1023: movnti %ebx, 4(%edi)
1024: movnti %ecx, 8(%edi)
1025: movnti %edx, 12(%edi)
1026: subl $16, %ebp
1027: leal 16(%esi), %esi
1028: leal 16(%edi), %edi
1029: jnz 1b
1030: sfence
1031: popl %edi
1032: popl %esi
1033: popl %ebx
1034: popl %ebp
1035: ret
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