Annotation of src/sys/arch/i386/i386/locore.S, Revision 1.53
1.53 ! yamt 1: /* $NetBSD: locore.S,v 1.52 2007/10/17 19:54:45 garbled Exp $ */
! 2:
! 3: /*
! 4: * Copyright-o-rama!
! 5: */
! 6:
! 7: /*
! 8: * Copyright (c) 2001 Wasabi Systems, Inc.
! 9: * All rights reserved.
! 10: *
! 11: * Written by Frank van der Linden for Wasabi Systems, Inc.
! 12: *
! 13: * Redistribution and use in source and binary forms, with or without
! 14: * modification, are permitted provided that the following conditions
! 15: * are met:
! 16: * 1. Redistributions of source code must retain the above copyright
! 17: * notice, this list of conditions and the following disclaimer.
! 18: * 2. Redistributions in binary form must reproduce the above copyright
! 19: * notice, this list of conditions and the following disclaimer in the
! 20: * documentation and/or other materials provided with the distribution.
! 21: * 3. All advertising materials mentioning features or use of this software
! 22: * must display the following acknowledgement:
! 23: * This product includes software developed for the NetBSD Project by
! 24: * Wasabi Systems, Inc.
! 25: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
! 26: * or promote products derived from this software without specific prior
! 27: * written permission.
! 28: *
! 29: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
! 30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
! 31: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
! 32: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
! 33: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
! 34: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
! 35: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
! 36: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
! 37: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
! 38: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
! 39: * POSSIBILITY OF SUCH DAMAGE.
! 40: */
! 41:
1.1 fvdl 42:
43: /*-
1.48 yamt 44: * Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc.
1.1 fvdl 45: * All rights reserved.
46: *
47: * This code is derived from software contributed to The NetBSD Foundation
48: * by Charles M. Hannum.
49: *
50: * Redistribution and use in source and binary forms, with or without
51: * modification, are permitted provided that the following conditions
52: * are met:
53: * 1. Redistributions of source code must retain the above copyright
54: * notice, this list of conditions and the following disclaimer.
55: * 2. Redistributions in binary form must reproduce the above copyright
56: * notice, this list of conditions and the following disclaimer in the
57: * documentation and/or other materials provided with the distribution.
58: * 3. All advertising materials mentioning features or use of this software
59: * must display the following acknowledgement:
60: * This product includes software developed by the NetBSD
61: * Foundation, Inc. and its contributors.
62: * 4. Neither the name of The NetBSD Foundation nor the names of its
63: * contributors may be used to endorse or promote products derived
64: * from this software without specific prior written permission.
65: *
66: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
67: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
68: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
69: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
70: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
71: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
72: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
73: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
74: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
75: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
76: * POSSIBILITY OF SUCH DAMAGE.
77: */
78:
79: /*-
80: * Copyright (c) 1990 The Regents of the University of California.
81: * All rights reserved.
82: *
83: * This code is derived from software contributed to Berkeley by
84: * William Jolitz.
85: *
86: * Redistribution and use in source and binary forms, with or without
87: * modification, are permitted provided that the following conditions
88: * are met:
89: * 1. Redistributions of source code must retain the above copyright
90: * notice, this list of conditions and the following disclaimer.
91: * 2. Redistributions in binary form must reproduce the above copyright
92: * notice, this list of conditions and the following disclaimer in the
93: * documentation and/or other materials provided with the distribution.
1.12 agc 94: * 3. Neither the name of the University nor the names of its contributors
1.1 fvdl 95: * may be used to endorse or promote products derived from this software
96: * without specific prior written permission.
97: *
98: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
99: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
100: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
101: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
102: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
103: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
104: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
105: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
106: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
107: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
108: * SUCH DAMAGE.
109: *
110: * @(#)locore.s 7.3 (Berkeley) 5/13/91
111: */
112:
1.18 christos 113: #include "opt_compat_oldboot.h"
1.1 fvdl 114: #include "opt_cputype.h"
115: #include "opt_ddb.h"
116: #include "opt_realmem.h"
1.18 christos 117: #include "opt_vm86.h"
1.1 fvdl 118:
119: #include "npx.h"
120: #include "assym.h"
121: #include "lapic.h"
122: #include "ioapic.h"
1.8 fvdl 123: #include "ksyms.h"
1.1 fvdl 124:
125: #include <sys/errno.h>
126: #include <sys/syscall.h>
127:
128: #include <machine/cputypes.h>
129: #include <machine/segments.h>
130: #include <machine/specialreg.h>
131: #include <machine/trap.h>
132: #include <machine/i82489reg.h>
1.37 jmmv 133: #include <machine/multiboot.h>
1.1 fvdl 134: #include <machine/asm.h>
1.48 yamt 135: #include <machine/frameasm.h>
136: #include <machine/i82489reg.h>
1.1 fvdl 137:
138: /* XXX temporary kluge; these should not be here */
139: /* Get definitions for IOM_BEGIN, IOM_END, and IOM_SIZE */
140: #include <dev/isa/isareg.h>
141:
142: /*
143: * Initialization
144: */
145: .data
146:
147: .globl _C_LABEL(cpu)
1.38 jmmv 148: .globl _C_LABEL(esym)
149: .globl _C_LABEL(atdevbase)
1.40 yamt 150: .globl _C_LABEL(proc0uarea),_C_LABEL(PDPpaddr)
1.1 fvdl 151: .globl _C_LABEL(gdt)
152: .globl _C_LABEL(idt)
1.30 junyoung 153: .globl _C_LABEL(lapic_tpr)
154:
1.1 fvdl 155: #if NLAPIC > 0
156: #ifdef __ELF__
1.7 thorpej 157: .align PAGE_SIZE
1.1 fvdl 158: #else
159: .align 12
160: #endif
161: .globl _C_LABEL(local_apic), _C_LABEL(lapic_id)
162: _C_LABEL(local_apic):
163: .space LAPIC_ID
1.30 junyoung 164: _C_LABEL(lapic_id):
1.1 fvdl 165: .long 0x00000000
166: .space LAPIC_TPRI-(LAPIC_ID+4)
1.30 junyoung 167: _C_LABEL(lapic_tpr):
1.1 fvdl 168: .space LAPIC_PPRI-LAPIC_TPRI
1.30 junyoung 169: _C_LABEL(lapic_ppr):
1.1 fvdl 170: .space LAPIC_ISR-LAPIC_PPRI
171: _C_LABEL(lapic_isr):
1.7 thorpej 172: .space PAGE_SIZE-LAPIC_ISR
1.1 fvdl 173: #else
1.30 junyoung 174: _C_LABEL(lapic_tpr):
1.1 fvdl 175: .long 0
176: #endif
1.30 junyoung 177:
1.48 yamt 178: _C_LABEL(cpu): .long 0 # are we 80486, Pentium, or..
1.1 fvdl 179: _C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual
1.40 yamt 180: _C_LABEL(proc0uarea): .long 0
1.31 junyoung 181: _C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm
1.53 ! yamt 182: _C_LABEL(tablesize): .long 0
1.30 junyoung 183:
1.1 fvdl 184: .space 512
185: tmpstk:
186:
187:
1.35 yamt 188: #define _RELOC(x) ((x) - KERNBASE)
1.1 fvdl 189: #define RELOC(x) _RELOC(_C_LABEL(x))
190:
191: .text
192: .globl _C_LABEL(kernel_text)
193: .set _C_LABEL(kernel_text),KERNTEXTOFF
194:
195: .globl start
196: start: movw $0x1234,0x472 # warm boot
197:
1.37 jmmv 198: #if defined(MULTIBOOT)
199: jmp 1f
200:
201: .align 4
202: .globl Multiboot_Header
203: _C_LABEL(Multiboot_Header):
1.44 jmmv 204: #define MULTIBOOT_HEADER_FLAGS (MULTIBOOT_HEADER_WANT_MEMORY)
1.37 jmmv 205: .long MULTIBOOT_HEADER_MAGIC
206: .long MULTIBOOT_HEADER_FLAGS
207: .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
208:
209: 1:
210: /* Check if we are being executed by a Multiboot-compliant boot
211: * loader. */
212: cmpl $MULTIBOOT_INFO_MAGIC,%eax
213: jne 1f
214:
1.43 mrg 215: /*
216: * Indeed, a multiboot-compliant boot loader executed us. We copy
1.37 jmmv 217: * the received Multiboot information structure into kernel's data
218: * space to process it later -- after we are relocated. It will
1.43 mrg 219: * be safer to run complex C code than doing it at this point.
220: */
1.37 jmmv 221: pushl %ebx # Address of Multiboot information
222: call _C_LABEL(multiboot_pre_reloc)
223: addl $4,%esp
1.38 jmmv 224: jmp 2f
1.37 jmmv 225: #endif
226:
227: 1:
1.1 fvdl 228: /*
1.38 jmmv 229: * At this point, we know that a NetBSD-specific boot loader
230: * booted this kernel. The stack carries the following parameters:
1.41 jmmv 231: * (boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem),
1.38 jmmv 232: * 4 bytes each.
1.1 fvdl 233: */
1.38 jmmv 234: addl $4,%esp # Discard return address to boot loader
235: call _C_LABEL(native_loader)
236: addl $24,%esp
1.1 fvdl 237:
238: 2:
239: /* First, reset the PSL. */
240: pushl $PSL_MBO
241: popfl
242:
243: /* Clear segment registers; always null in proc0. */
244: xorl %eax,%eax
245: movw %ax,%fs
246: movw %ax,%gs
247: decl %eax
248: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
249:
250: /* Find out our CPU type. */
251:
252: try386: /* Try to toggle alignment check flag; does not exist on 386. */
253: pushfl
254: popl %eax
255: movl %eax,%ecx
256: orl $PSL_AC,%eax
257: pushl %eax
258: popfl
259: pushfl
260: popl %eax
261: xorl %ecx,%eax
262: andl $PSL_AC,%eax
263: pushl %ecx
264: popfl
265:
266: testl %eax,%eax
267: jnz try486
268:
269: /*
270: * Try the test of a NexGen CPU -- ZF will not change on a DIV
271: * instruction on a NexGen, it will on an i386. Documented in
272: * Nx586 Processor Recognition Application Note, NexGen, Inc.
273: */
274: movl $0x5555,%eax
275: xorl %edx,%edx
276: movl $2,%ecx
277: divl %ecx
278: jnz is386
279:
280: isnx586:
281: /*
282: * Don't try cpuid, as Nx586s reportedly don't support the
283: * PSL_ID bit.
284: */
285: movl $CPU_NX586,RELOC(cpu)
286: jmp 2f
287:
288: is386:
289: movl $CPU_386,RELOC(cpu)
290: jmp 2f
291:
292: try486: /* Try to toggle identification flag; does not exist on early 486s. */
293: pushfl
294: popl %eax
295: movl %eax,%ecx
296: xorl $PSL_ID,%eax
297: pushl %eax
298: popfl
299: pushfl
300: popl %eax
301: xorl %ecx,%eax
302: andl $PSL_ID,%eax
303: pushl %ecx
304: popfl
305:
306: testl %eax,%eax
307: jnz try586
308: is486: movl $CPU_486,RELOC(cpu)
309: /*
310: * Check Cyrix CPU
311: * Cyrix CPUs do not change the undefined flags following
312: * execution of the divide instruction which divides 5 by 2.
313: *
314: * Note: CPUID is enabled on M2, so it passes another way.
315: */
316: pushfl
317: movl $0x5555, %eax
318: xorl %edx, %edx
319: movl $2, %ecx
320: clc
321: divl %ecx
322: jnc trycyrix486
323: popfl
324: jmp 2f
325: trycyrix486:
326: movl $CPU_6x86,RELOC(cpu) # set CPU type
327: /*
328: * Check for Cyrix 486 CPU by seeing if the flags change during a
329: * divide. This is documented in the Cx486SLC/e SMM Programmer's
330: * Guide.
331: */
332: xorl %edx,%edx
333: cmpl %edx,%edx # set flags to known state
334: pushfl
335: popl %ecx # store flags in ecx
336: movl $-1,%eax
337: movl $4,%ebx
338: divl %ebx # do a long division
339: pushfl
340: popl %eax
341: xorl %ecx,%eax # are the flags different?
342: testl $0x8d5,%eax # only check C|PF|AF|Z|N|V
343: jne 2f # yes; must be Cyrix 6x86 CPU
344: movl $CPU_486DLC,RELOC(cpu) # set CPU type
345:
346: #ifndef CYRIX_CACHE_WORKS
347: /* Disable caching of the ISA hole only. */
348: invd
349: movb $CCR0,%al # Configuration Register index (CCR0)
350: outb %al,$0x22
351: inb $0x23,%al
352: orb $(CCR0_NC1|CCR0_BARB),%al
353: movb %al,%ah
354: movb $CCR0,%al
355: outb %al,$0x22
356: movb %ah,%al
357: outb %al,$0x23
358: invd
359: #else /* CYRIX_CACHE_WORKS */
360: /* Set cache parameters */
361: invd # Start with guaranteed clean cache
362: movb $CCR0,%al # Configuration Register index (CCR0)
363: outb %al,$0x22
364: inb $0x23,%al
365: andb $~CCR0_NC0,%al
366: #ifndef CYRIX_CACHE_REALLY_WORKS
367: orb $(CCR0_NC1|CCR0_BARB),%al
368: #else
369: orb $CCR0_NC1,%al
370: #endif
371: movb %al,%ah
372: movb $CCR0,%al
373: outb %al,$0x22
374: movb %ah,%al
375: outb %al,$0x23
376: /* clear non-cacheable region 1 */
377: movb $(NCR1+2),%al
378: outb %al,$0x22
379: movb $NCR_SIZE_0K,%al
380: outb %al,$0x23
381: /* clear non-cacheable region 2 */
382: movb $(NCR2+2),%al
383: outb %al,$0x22
384: movb $NCR_SIZE_0K,%al
385: outb %al,$0x23
386: /* clear non-cacheable region 3 */
387: movb $(NCR3+2),%al
388: outb %al,$0x22
389: movb $NCR_SIZE_0K,%al
390: outb %al,$0x23
391: /* clear non-cacheable region 4 */
392: movb $(NCR4+2),%al
393: outb %al,$0x22
394: movb $NCR_SIZE_0K,%al
395: outb %al,$0x23
396: /* enable caching in CR0 */
397: movl %cr0,%eax
398: andl $~(CR0_CD|CR0_NW),%eax
399: movl %eax,%cr0
400: invd
401: #endif /* CYRIX_CACHE_WORKS */
402:
403: jmp 2f
404:
405: try586: /* Use the `cpuid' instruction. */
406: xorl %eax,%eax
407: cpuid
408: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
409:
410: 2:
411: /*
412: * Finished with old stack; load new %esp now instead of later so we
413: * can trace this code without having to worry about the trace trap
414: * clobbering the memory test or the zeroing of the bss+bootstrap page
415: * tables.
416: *
417: * The boot program should check:
418: * text+data <= &stack_variable - more_space_for_stack
419: * text+data+bss+pad+space_for_page_tables <= end_of_memory
420: * Oops, the gdt is in the carcass of the boot program so clearing
421: * the rest of memory is still not possible.
422: */
423: movl $_RELOC(tmpstk),%esp # bootstrap stack end location
424:
425: /*
426: * Virtual address space of kernel:
427: *
1.53 ! yamt 428: * text | data | bss | [syms] | page dir | proc0 kstack | L1 ptp
1.1 fvdl 429: * 0 1 2 3
430: */
1.53 ! yamt 431:
! 432: #define PROC0_PDIR_OFF 0
! 433: #define PROC0_STK_OFF (PROC0_PDIR_OFF + PAGE_SIZE)
! 434: #define PROC0_PTP1_OFF (PROC0_STK_OFF + UPAGES * PAGE_SIZE)
! 435:
! 436: /*
! 437: * fillkpt
! 438: * eax = pte (page frame | control | status)
! 439: * ebx = page table address
! 440: * ecx = number of pages to map
! 441: */
! 442:
! 443: #define fillkpt \
! 444: 1: movl %eax,(%ebx) ; /* store phys addr */ \
! 445: addl $4,%ebx ; /* next pte/pde */ \
! 446: addl $PAGE_SIZE,%eax ; /* next phys page */ \
! 447: loop 1b ; \
! 448:
1.1 fvdl 449:
450: /* Find end of kernel image. */
451: movl $RELOC(end),%edi
1.8 fvdl 452: #if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE)
1.1 fvdl 453: /* Save the symbols (if loaded). */
454: movl RELOC(esym),%eax
455: testl %eax,%eax
456: jz 1f
1.35 yamt 457: subl $KERNBASE,%eax
1.1 fvdl 458: movl %eax,%edi
459: 1:
460: #endif
461:
1.53 ! yamt 462: /* Compute sizes */
1.1 fvdl 463: movl %edi,%esi # edi = esym ? esym : end
464: addl $PGOFSET,%esi # page align up
465: andl $~PGOFSET,%esi
466:
1.53 ! yamt 467: /* nkptp[1] = (esi + ~L2_FRAME) >> L2_SHIFT + 1; */
! 468: movl %esi,%eax
! 469: addl $~L2_FRAME,%eax
! 470: shrl $L2_SHIFT,%eax
! 471: incl %eax /* one more ptp for VAs stolen by bootstrap */
! 472: 1: movl %eax,RELOC(nkptp)+1*4
! 473:
! 474: /* tablesize = (1 + UPAGES + nkptp) << PGSHIFT; */
! 475: addl $(1+UPAGES),%eax
! 476: shll $PGSHIFT,%eax
! 477: movl %eax,RELOC(tablesize)
! 478:
! 479: /* ensure that nkptp covers bootstrap tables */
! 480: addl %esi,%eax
! 481: addl $~L2_FRAME,%eax
! 482: shrl $L2_SHIFT,%eax
! 483: incl %eax
! 484: cmpl %eax,RELOC(nkptp)+1*4
! 485: jnz 1b
! 486:
! 487: /* Clear tables */
! 488: movl %esi,%edi
1.1 fvdl 489: xorl %eax,%eax
490: cld
1.53 ! yamt 491: movl RELOC(tablesize),%ecx
! 492: shrl $2,%ecx
1.1 fvdl 493: rep
494: stosl
495:
1.53 ! yamt 496: leal (PROC0_PTP1_OFF)(%esi), %ebx
1.1 fvdl 497:
498: /*
499: * Build initial page tables.
500: */
1.53 ! yamt 501: /*
! 502: * Compute &__data_start - KERNBASE. This can't be > 4G,
! 503: * or we can't deal with it anyway, since we can't load it in
! 504: * 32 bit mode. So use the bottom 32 bits.
! 505: */
! 506: movl $RELOC(__data_start),%edx
1.1 fvdl 507: andl $~PGOFSET,%edx
1.30 junyoung 508:
1.53 ! yamt 509: /*
! 510: * Skip the first MB.
! 511: */
1.1 fvdl 512: movl $_RELOC(KERNTEXTOFF),%eax
513: movl %eax,%ecx
1.53 ! yamt 514: shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */
! 515: addl %ecx,%ebx
1.1 fvdl 516:
517: /* Map the kernel text read-only. */
518: movl %edx,%ecx
519: subl %eax,%ecx
520: shrl $PGSHIFT,%ecx
521: orl $(PG_V|PG_KR),%eax
522: fillkpt
523:
524: /* Map the data, BSS, and bootstrap tables read-write. */
525: leal (PG_V|PG_KW)(%edx),%eax
1.53 ! yamt 526: movl RELOC(tablesize),%ecx
1.1 fvdl 527: addl %esi,%ecx # end of tables
528: subl %edx,%ecx # subtract end of text
529: shrl $PGSHIFT,%ecx
530: fillkpt
531:
1.53 ! yamt 532: /* Map ISA I/O mem (later atdevbase) */
1.1 fvdl 533: movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax # having these bits set
534: movl $(IOM_SIZE>>PGSHIFT),%ecx # for this many pte s,
535: fillkpt
536:
537: /*
538: * Construct a page table directory.
539: */
1.53 ! yamt 540: /* Set up top level entries for identity mapping */
! 541: leal (PROC0_PDIR_OFF)(%esi),%ebx
! 542: leal (PROC0_PTP1_OFF)(%esi),%eax
! 543: orl $(PG_V|PG_KW), %eax
! 544: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 545: fillkpt
546:
1.53 ! yamt 547: /* Set up top level entries for actual kernel mapping */
! 548: leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*4)(%esi),%ebx
! 549: leal (PROC0_PTP1_OFF)(%esi),%eax
! 550: orl $(PG_V|PG_KW), %eax
! 551: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 552: fillkpt
553:
554: /* Install a PDE recursively mapping page directory as a page table! */
1.53 ! yamt 555: leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*4)(%esi),%ebx
! 556: leal (PROC0_PDIR_OFF)(%esi),%eax
! 557: orl $(PG_V|PG_KW),%eax
! 558: movl %eax,(%ebx)
! 559:
1.1 fvdl 560:
1.31 junyoung 561: /* Save phys. addr of PDP, for libkvm. */
562: movl %esi,RELOC(PDPpaddr)
1.1 fvdl 563:
1.53 ! yamt 564: /*
! 565: * Startup checklist:
! 566: * 1. Load %cr3 with pointer to PDIR.
! 567: */
1.1 fvdl 568: movl %esi,%eax # phys address of ptd in proc 0
569: movl %eax,%cr3 # load ptd addr into mmu
1.53 ! yamt 570:
! 571: /*
! 572: * 2. Enable paging and the rest of it.
! 573: */
1.1 fvdl 574: movl %cr0,%eax # get control word
575: # enable paging & NPX emulation
576: orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_EM|CR0_MP),%eax
577: movl %eax,%cr0 # and let's page NOW!
578:
579: pushl $begin # jump to high mem
580: ret
581:
582: begin:
1.53 ! yamt 583: /*
! 584: * We have arrived.
! 585: * There's no need anymore for the identity mapping in low
! 586: * memory, remove it.
! 587: */
! 588: movl _C_LABEL(nkptp)+1*4,%ecx
! 589: leal (PROC0_PDIR_OFF)(%esi),%ebx # old, phys address of PDIR
! 590: addl $(KERNBASE), %ebx # new, virtual address of PDIR
1.1 fvdl 591: 1: movl $0,(%ebx)
1.53 ! yamt 592: addl $4,%ebx
1.1 fvdl 593: loop 1b
594:
595: /* Relocate atdevbase. */
1.53 ! yamt 596: movl $KERNBASE,%edx
! 597: addl _C_LABEL(tablesize),%edx
1.1 fvdl 598: addl %esi,%edx
599: movl %edx,_C_LABEL(atdevbase)
600:
601: /* Set up bootstrap stack. */
1.53 ! yamt 602: leal (PROC0_STK_OFF+KERNBASE)(%esi),%eax
1.40 yamt 603: movl %eax,_C_LABEL(proc0uarea)
604: leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp
605: movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3
1.1 fvdl 606: xorl %ebp,%ebp # mark end of frames
607:
1.37 jmmv 608: #if defined(MULTIBOOT)
609: /* It is now safe to parse the Multiboot information structure
610: * we saved before from C code. Note that we cannot delay its
611: * parsing any more because initgdt (called below) needs to make
612: * use of this information. */
613: call _C_LABEL(multiboot_post_reloc)
614: #endif
615:
1.1 fvdl 616: subl $NGDT*8, %esp # space for temporary gdt
617: pushl %esp
618: call _C_LABEL(initgdt)
619: addl $4,%esp
1.30 junyoung 620:
1.53 ! yamt 621: movl _C_LABEL(tablesize),%eax
1.1 fvdl 622: addl %esi,%eax # skip past stack and page tables
623:
624: pushl %eax
625: call _C_LABEL(init386) # wire 386 chip for unix operation
626: addl $4+NGDT*8,%esp # pop temporary gdt
627:
628: #ifdef SAFARI_FIFO_HACK
629: movb $5,%al
630: movw $0x37b,%dx
631: outb %al,%dx
632: movw $0x37f,%dx
633: inb %dx,%al
634: movb %al,%cl
635:
636: orb $1,%cl
637:
638: movb $5,%al
639: movw $0x37b,%dx
640: outb %al,%dx
641: movw $0x37f,%dx
642: movb %cl,%al
643: outb %al,%dx
644: #endif /* SAFARI_FIFO_HACK */
645:
646: call _C_LABEL(main)
647:
648: /*
1.48 yamt 649: * void lwp_trampoline(void);
650: *
1.1 fvdl 651: * This is a trampoline function pushed onto the stack of a newly created
652: * process in order to do some additional setup. The trampoline is entered by
653: * cpu_switch()ing to the process, so we abuse the callee-saved registers used
654: * by cpu_switch() to store the information about the stub to call.
655: * NOTE: This function does not have a normal calling sequence!
656: */
1.48 yamt 657: NENTRY(lwp_trampoline)
658: pushl %ebp
659: xorl %ebp,%ebp
660: pushl %eax
661: call _C_LABEL(lwp_startup)
662: addl $8,%esp
1.1 fvdl 663: pushl %ebx
664: call *%esi
665: addl $4,%esp
1.53 ! yamt 666: DO_DEFERRED_SWITCH
1.1 fvdl 667: INTRFASTEXIT
668: /* NOTREACHED */
669:
670: /*
1.48 yamt 671: * sigcode()
672: *
673: * Signal trampoline; copied to top of user stack. Used only for
674: * compatibility with old releases of NetBSD.
1.1 fvdl 675: */
676: NENTRY(sigcode)
677: /*
678: * Handler has returned here as if we called it. The sigcontext
679: * is on the stack after the 3 args "we" pushed.
680: */
681: leal 12(%esp),%eax # get pointer to sigcontext
682: movl %eax,4(%esp) # put it in the argument slot
683: # fake return address already there
1.17 christos 684: movl $SYS_compat_16___sigreturn14,%eax
1.1 fvdl 685: int $0x80 # enter kernel with args on stack
686: movl $SYS_exit,%eax
687: int $0x80 # exit if sigreturn fails
688: .globl _C_LABEL(esigcode)
689: _C_LABEL(esigcode):
690:
691: /*
1.48 yamt 692: * int setjmp(label_t *)
693: *
694: * Used primarily by DDB.
1.1 fvdl 695: */
696: ENTRY(setjmp)
697: movl 4(%esp),%eax
698: movl %ebx,(%eax) # save ebx
699: movl %esp,4(%eax) # save esp
700: movl %ebp,8(%eax) # save ebp
701: movl %esi,12(%eax) # save esi
702: movl %edi,16(%eax) # save edi
703: movl (%esp),%edx # get rta
704: movl %edx,20(%eax) # save eip
1.48 yamt 705: xorl %eax,%eax # return 0
1.1 fvdl 706: ret
707:
1.48 yamt 708: /*
709: * int longjmp(label_t *)
710: *
711: * Used primarily by DDB.
712: */
1.1 fvdl 713: ENTRY(longjmp)
714: movl 4(%esp),%eax
715: movl (%eax),%ebx # restore ebx
716: movl 4(%eax),%esp # restore esp
717: movl 8(%eax),%ebp # restore ebp
718: movl 12(%eax),%esi # restore esi
719: movl 16(%eax),%edi # restore edi
720: movl 20(%eax),%edx # get rta
721: movl %edx,(%esp) # put in return frame
1.48 yamt 722: movl $1,%eax # return 1
1.1 fvdl 723: ret
724:
725: /*
1.48 yamt 726: * struct lwp *cpu_switchto(struct lwp *oldlwp, struct newlwp)
1.30 junyoung 727: *
1.48 yamt 728: * 1. if (oldlwp != NULL), save its context.
729: * 2. then, restore context of newlwp.
730: *
731: * Note that the stack frame layout is known to "struct switchframe" in
732: * <machine/frame.h> and to the code in cpu_lwp_fork() which initializes
1.5 thorpej 733: * it for a new lwp.
1.1 fvdl 734: */
1.48 yamt 735: ENTRY(cpu_switchto)
1.1 fvdl 736: pushl %ebx
737: pushl %esi
738: pushl %edi
739:
1.48 yamt 740: movl 16(%esp),%esi # oldlwp
741: movl 20(%esp),%edi # newlwp
742: testl %esi,%esi
743: jz 1f
1.1 fvdl 744:
1.48 yamt 745: /* Save old context. */
746: movl L_ADDR(%esi),%eax
747: movl %esp,PCB_ESP(%eax)
748: movl %ebp,PCB_EBP(%eax)
749:
750: /* Switch to newlwp's stack. */
751: 1: movl L_ADDR(%edi),%ebx
752: movl PCB_EBP(%ebx),%ebp
753: movl PCB_ESP(%ebx),%esp
1.1 fvdl 754:
1.48 yamt 755: /* Switch TSS. Reset "task busy" flag before loading. */
1.26 yamt 756: movl %cr3,%eax
1.48 yamt 757: movl %eax,PCB_CR3(%ebx) # for TSS gates
1.1 fvdl 758: movl CPUVAR(GDT),%eax
1.48 yamt 759: movl L_MD_TSS_SEL(%edi),%edx
760: andl $~0x0200,4(%eax,%edx, 1)
1.1 fvdl 761: ltr %dx
762:
1.48 yamt 763: /* Set curlwp. */
764: movl %edi,CPUVAR(CURLWP)
1.1 fvdl 765:
766: /* Don't bother with the rest if switching to a system process. */
1.48 yamt 767: testl $LW_SYSTEM,L_FLAG(%edi)
768: jnz 4f
1.1 fvdl 769:
1.48 yamt 770: /* Is this process using RAS (restartable atomic sequences)? */
771: movl L_PROC(%edi),%eax
772: cmpl $0,P_RASLIST(%eax)
773: jne 5f
774:
775: /*
776: * Restore cr0 (including FPU state). Raise the IPL to IPL_IPI.
777: * FPU IPIs can alter the LWP's saved cr0. Dropping the priority
778: * is deferred until mi_switch(), when cpu_switchto() returns.
779: */
780: 2: movl $IPL_IPI,CPUVAR(ILEVEL)
781: movl PCB_CR0(%ebx),%ecx
782: movl %cr0,%edx
1.1 fvdl 783:
1.30 junyoung 784: /*
1.22 wiz 785: * If our floating point registers are on a different CPU,
1.48 yamt 786: * set CR0_TS so we'll trap rather than reuse bogus state.
1.1 fvdl 787: */
1.48 yamt 788: movl PCB_FPCPU(%ebx),%eax
789: cmpl CPUVAR(SELF),%eax
790: je 3f
1.1 fvdl 791: orl $CR0_TS,%ecx
1.48 yamt 792:
793: /* Reloading CR0 is very expensive - avoid if possible. */
794: 3: cmpl %edx,%ecx
795: je 4f
1.1 fvdl 796: movl %ecx,%cr0
797:
1.48 yamt 798: /* Return to the new LWP, returning 'oldlwp' in %eax. */
799: 4: movl %esi,%eax
1.1 fvdl 800: popl %edi
801: popl %esi
802: popl %ebx
803: ret
1.20 dsl 804:
1.48 yamt 805: /* Check for restartable atomic sequences (RAS). */
806: 5: movl L_MD_REGS(%edi),%ecx
807: pushl TF_EIP(%ecx)
1.20 dsl 808: pushl %eax
809: call _C_LABEL(ras_lookup)
810: addl $8,%esp
811: cmpl $-1,%eax
1.48 yamt 812: je 2b
1.49 ad 813: movl L_MD_REGS(%edi),%ecx
814: movl %eax,TF_EIP(%ecx)
1.48 yamt 815: jmp 2b
1.1 fvdl 816:
817: /*
818: * void savectx(struct pcb *pcb);
1.48 yamt 819: *
1.1 fvdl 820: * Update pcb, saving current processor state.
821: */
822: ENTRY(savectx)
1.47 skrll 823: movl 4(%esp),%edx # edx = pcb
1.1 fvdl 824: movl %esp,PCB_ESP(%edx)
825: movl %ebp,PCB_EBP(%edx)
826: ret
827:
828: /*
1.48 yamt 829: * osyscall()
830: *
1.1 fvdl 831: * Old call gate entry for syscall
832: */
833: IDTVEC(osyscall)
1.48 yamt 834: pushfl # set eflags in trap frame
1.1 fvdl 835: popl 8(%esp)
836: pushl $7 # size of instruction for restart
837: jmp syscall1
838:
839: /*
1.48 yamt 840: * syscall()
841: *
1.1 fvdl 842: * Trap gate entry for syscall
843: */
844: IDTVEC(syscall)
845: pushl $2 # size of instruction for restart
846: syscall1:
847: pushl $T_ASTFLT # trap # for doing ASTs
848: INTRENTRY
849:
850: #ifdef DIAGNOSTIC
1.24 yamt 851: cmpl $0, CPUVAR(WANT_PMAPLOAD)
852: jz 1f
853: pushl $6f
854: call _C_LABEL(printf)
855: addl $4, %esp
856: 1:
1.1 fvdl 857: movl CPUVAR(ILEVEL),%ebx
858: testl %ebx,%ebx
859: jz 1f
860: pushl $5f
861: call _C_LABEL(printf)
862: addl $4,%esp
863: #ifdef DDB
864: int $3
865: #endif
1.30 junyoung 866: 1:
1.1 fvdl 867: #endif /* DIAGNOSTIC */
1.5 thorpej 868: movl CPUVAR(CURLWP),%edx
869: movl %esp,L_MD_REGS(%edx) # save pointer to frame
870: movl L_PROC(%edx),%edx
1.15 fvdl 871: pushl %esp
1.1 fvdl 872: call *P_MD_SYSCALL(%edx) # get pointer to syscall() function
1.15 fvdl 873: addl $4,%esp
1.27 yamt 874: .Lsyscall_checkast:
1.24 yamt 875: /* Check for ASTs on exit to user mode. */
1.1 fvdl 876: cli
1.5 thorpej 877: CHECK_ASTPENDING(%eax)
1.1 fvdl 878: je 1f
879: /* Always returning to user mode here. */
1.5 thorpej 880: CLEAR_ASTPENDING(%eax)
1.1 fvdl 881: sti
882: /* Pushed T_ASTFLT into tf_trapno on entry. */
1.15 fvdl 883: pushl %esp
1.1 fvdl 884: call _C_LABEL(trap)
1.15 fvdl 885: addl $4,%esp
1.27 yamt 886: jmp .Lsyscall_checkast /* re-check ASTs */
1.53 ! yamt 887: 1: CHECK_DEFERRED_SWITCH
1.24 yamt 888: jnz 9f
1.1 fvdl 889: #ifndef DIAGNOSTIC
1.24 yamt 890: INTRFASTEXIT
1.1 fvdl 891: #else /* DIAGNOSTIC */
1.24 yamt 892: cmpl $IPL_NONE,CPUVAR(ILEVEL)
1.1 fvdl 893: jne 3f
894: INTRFASTEXIT
895: 3: sti
896: pushl $4f
897: call _C_LABEL(printf)
898: addl $4,%esp
899: #ifdef DDB
900: int $3
901: #endif /* DDB */
902: movl $IPL_NONE,CPUVAR(ILEVEL)
1.53 ! yamt 903: jmp .Lsyscall_checkast
1.1 fvdl 904: 4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n"
1.30 junyoung 905: 5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n"
906: 6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n"
1.1 fvdl 907: #endif /* DIAGNOSTIC */
1.24 yamt 908: 9: sti
909: call _C_LABEL(pmap_load)
1.27 yamt 910: jmp .Lsyscall_checkast /* re-check ASTs */
1.1 fvdl 911:
912: #if NNPX > 0
913: /*
914: * Special interrupt handlers. Someday intr0-intr15 will be used to count
915: * interrupts. We'll still need a special exception 16 handler. The busy
916: * latch stuff in probintr() can be moved to npxprobe().
917: */
918:
1.48 yamt 919: /*
920: * void probeintr(void)
921: */
1.1 fvdl 922: NENTRY(probeintr)
923: ss
924: incl _C_LABEL(npx_intrs_while_probing)
925: pushl %eax
926: movb $0x20,%al # EOI (asm in strings loses cpp features)
927: outb %al,$0xa0 # IO_ICU2
928: outb %al,$0x20 # IO_ICU1
929: movb $0,%al
930: outb %al,$0xf0 # clear BUSY# latch
931: popl %eax
932: iret
933:
1.48 yamt 934: /*
935: * void probetrap(void)
936: */
1.1 fvdl 937: NENTRY(probetrap)
938: ss
939: incl _C_LABEL(npx_traps_while_probing)
940: fnclex
941: iret
942:
1.48 yamt 943: /*
944: * int npx586bug1(int a, int b)
945: */
1.1 fvdl 946: NENTRY(npx586bug1)
947: fildl 4(%esp) # x
948: fildl 8(%esp) # y
949: fld %st(1)
950: fdiv %st(1),%st # x/y
951: fmulp %st,%st(1) # (x/y)*y
952: fsubrp %st,%st(1) # x-(x/y)*y
953: pushl $0
954: fistpl (%esp)
955: popl %eax
956: ret
957: #endif /* NNPX > 0 */
1.50 ad 958:
959: /*
960: * void sse2_zero_page(void *pg)
961: *
962: * Zero a page without polluting the cache.
963: */
964: ENTRY(sse2_zero_page)
965: pushl %ebp
966: movl %esp,%ebp
967: movl 8(%esp), %edx
968: movl $PAGE_SIZE, %ecx
969: xorl %eax, %eax
970: .align 16
971: 1:
972: movnti %eax, 0(%edx)
973: movnti %eax, 4(%edx)
974: movnti %eax, 8(%edx)
975: movnti %eax, 12(%edx)
976: movnti %eax, 16(%edx)
977: movnti %eax, 20(%edx)
978: movnti %eax, 24(%edx)
979: movnti %eax, 28(%edx)
980: subl $32, %ecx
981: leal 32(%edx), %edx
982: jnz 1b
983: sfence
984: pop %ebp
985: ret
986:
987: /*
988: * void sse2_copy_page(void *src, void *dst)
989: *
990: * Copy a page without polluting the cache.
991: */
992: ENTRY(sse2_copy_page)
993: pushl %ebp
994: pushl %ebx
995: pushl %esi
996: pushl %edi
997: movl 20(%esp), %esi
998: movl 24(%esp), %edi
999: movl $PAGE_SIZE, %ebp
1000: .align 16
1001: 1:
1002: movl 0(%esi), %eax
1003: movl 4(%esi), %ebx
1004: movl 8(%esi), %ecx
1005: movl 12(%esi), %edx
1006: movnti %eax, 0(%edi)
1007: movnti %ebx, 4(%edi)
1008: movnti %ecx, 8(%edi)
1009: movnti %edx, 12(%edi)
1010: subl $16, %ebp
1011: leal 16(%esi), %esi
1012: leal 16(%edi), %edi
1013: jnz 1b
1014: sfence
1015: popl %edi
1016: popl %esi
1017: popl %ebx
1018: popl %ebp
1019: ret
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