Annotation of src/sys/arch/i386/i386/locore.S, Revision 1.50.2.2
1.50.2.1 yamt 1: /* $NetBSD$ */
2:
3: /*
4: * Copyright-o-rama!
5: */
6:
7: /*
8: * Copyright (c) 2001 Wasabi Systems, Inc.
9: * All rights reserved.
10: *
11: * Written by Frank van der Linden for Wasabi Systems, Inc.
12: *
13: * Redistribution and use in source and binary forms, with or without
14: * modification, are permitted provided that the following conditions
15: * are met:
16: * 1. Redistributions of source code must retain the above copyright
17: * notice, this list of conditions and the following disclaimer.
18: * 2. Redistributions in binary form must reproduce the above copyright
19: * notice, this list of conditions and the following disclaimer in the
20: * documentation and/or other materials provided with the distribution.
21: * 3. All advertising materials mentioning features or use of this software
22: * must display the following acknowledgement:
23: * This product includes software developed for the NetBSD Project by
24: * Wasabi Systems, Inc.
25: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
26: * or promote products derived from this software without specific prior
27: * written permission.
28: *
29: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
31: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
32: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
33: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39: * POSSIBILITY OF SUCH DAMAGE.
40: */
41:
1.1 fvdl 42:
43: /*-
1.48 yamt 44: * Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc.
1.1 fvdl 45: * All rights reserved.
46: *
47: * This code is derived from software contributed to The NetBSD Foundation
48: * by Charles M. Hannum.
49: *
50: * Redistribution and use in source and binary forms, with or without
51: * modification, are permitted provided that the following conditions
52: * are met:
53: * 1. Redistributions of source code must retain the above copyright
54: * notice, this list of conditions and the following disclaimer.
55: * 2. Redistributions in binary form must reproduce the above copyright
56: * notice, this list of conditions and the following disclaimer in the
57: * documentation and/or other materials provided with the distribution.
58: * 3. All advertising materials mentioning features or use of this software
59: * must display the following acknowledgement:
60: * This product includes software developed by the NetBSD
61: * Foundation, Inc. and its contributors.
62: * 4. Neither the name of The NetBSD Foundation nor the names of its
63: * contributors may be used to endorse or promote products derived
64: * from this software without specific prior written permission.
65: *
66: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
67: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
68: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
69: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
70: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
71: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
72: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
73: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
74: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
75: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
76: * POSSIBILITY OF SUCH DAMAGE.
77: */
78:
79: /*-
80: * Copyright (c) 1990 The Regents of the University of California.
81: * All rights reserved.
82: *
83: * This code is derived from software contributed to Berkeley by
84: * William Jolitz.
85: *
86: * Redistribution and use in source and binary forms, with or without
87: * modification, are permitted provided that the following conditions
88: * are met:
89: * 1. Redistributions of source code must retain the above copyright
90: * notice, this list of conditions and the following disclaimer.
91: * 2. Redistributions in binary form must reproduce the above copyright
92: * notice, this list of conditions and the following disclaimer in the
93: * documentation and/or other materials provided with the distribution.
1.12 agc 94: * 3. Neither the name of the University nor the names of its contributors
1.1 fvdl 95: * may be used to endorse or promote products derived from this software
96: * without specific prior written permission.
97: *
98: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
99: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
100: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
101: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
102: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
103: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
104: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
105: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
106: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
107: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
108: * SUCH DAMAGE.
109: *
110: * @(#)locore.s 7.3 (Berkeley) 5/13/91
111: */
112:
1.18 christos 113: #include "opt_compat_oldboot.h"
1.1 fvdl 114: #include "opt_cputype.h"
115: #include "opt_ddb.h"
116: #include "opt_realmem.h"
1.18 christos 117: #include "opt_vm86.h"
1.1 fvdl 118:
119: #include "npx.h"
120: #include "assym.h"
121: #include "lapic.h"
122: #include "ioapic.h"
1.8 fvdl 123: #include "ksyms.h"
1.1 fvdl 124:
125: #include <sys/errno.h>
126: #include <sys/syscall.h>
127:
128: #include <machine/cputypes.h>
129: #include <machine/segments.h>
130: #include <machine/specialreg.h>
131: #include <machine/trap.h>
132: #include <machine/i82489reg.h>
1.37 jmmv 133: #include <machine/multiboot.h>
1.1 fvdl 134: #include <machine/asm.h>
1.48 yamt 135: #include <machine/frameasm.h>
136: #include <machine/i82489reg.h>
1.1 fvdl 137:
138: /* XXX temporary kluge; these should not be here */
139: /* Get definitions for IOM_BEGIN, IOM_END, and IOM_SIZE */
140: #include <dev/isa/isareg.h>
141:
142: /*
143: * Initialization
144: */
145: .data
146:
147: .globl _C_LABEL(cpu)
1.38 jmmv 148: .globl _C_LABEL(esym)
149: .globl _C_LABEL(atdevbase)
1.40 yamt 150: .globl _C_LABEL(proc0uarea),_C_LABEL(PDPpaddr)
1.1 fvdl 151: .globl _C_LABEL(gdt)
152: .globl _C_LABEL(idt)
1.30 junyoung 153: .globl _C_LABEL(lapic_tpr)
154:
1.1 fvdl 155: #if NLAPIC > 0
156: #ifdef __ELF__
1.7 thorpej 157: .align PAGE_SIZE
1.1 fvdl 158: #else
159: .align 12
160: #endif
161: .globl _C_LABEL(local_apic), _C_LABEL(lapic_id)
162: _C_LABEL(local_apic):
163: .space LAPIC_ID
1.30 junyoung 164: _C_LABEL(lapic_id):
1.1 fvdl 165: .long 0x00000000
166: .space LAPIC_TPRI-(LAPIC_ID+4)
1.30 junyoung 167: _C_LABEL(lapic_tpr):
1.1 fvdl 168: .space LAPIC_PPRI-LAPIC_TPRI
1.30 junyoung 169: _C_LABEL(lapic_ppr):
1.1 fvdl 170: .space LAPIC_ISR-LAPIC_PPRI
171: _C_LABEL(lapic_isr):
1.7 thorpej 172: .space PAGE_SIZE-LAPIC_ISR
1.1 fvdl 173: #else
1.30 junyoung 174: _C_LABEL(lapic_tpr):
1.1 fvdl 175: .long 0
176: #endif
1.30 junyoung 177:
1.48 yamt 178: _C_LABEL(cpu): .long 0 # are we 80486, Pentium, or..
1.1 fvdl 179: _C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual
1.40 yamt 180: _C_LABEL(proc0uarea): .long 0
1.31 junyoung 181: _C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm
1.50.2.2! yamt 182: _C_LABEL(tablesize): .long 0
1.30 junyoung 183:
1.1 fvdl 184: .space 512
185: tmpstk:
186:
187:
1.35 yamt 188: #define _RELOC(x) ((x) - KERNBASE)
1.1 fvdl 189: #define RELOC(x) _RELOC(_C_LABEL(x))
190:
191: .text
192: .globl _C_LABEL(kernel_text)
193: .set _C_LABEL(kernel_text),KERNTEXTOFF
194:
195: .globl start
196: start: movw $0x1234,0x472 # warm boot
197:
1.37 jmmv 198: #if defined(MULTIBOOT)
199: jmp 1f
200:
201: .align 4
202: .globl Multiboot_Header
203: _C_LABEL(Multiboot_Header):
1.44 jmmv 204: #define MULTIBOOT_HEADER_FLAGS (MULTIBOOT_HEADER_WANT_MEMORY)
1.37 jmmv 205: .long MULTIBOOT_HEADER_MAGIC
206: .long MULTIBOOT_HEADER_FLAGS
207: .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
208:
209: 1:
210: /* Check if we are being executed by a Multiboot-compliant boot
211: * loader. */
212: cmpl $MULTIBOOT_INFO_MAGIC,%eax
213: jne 1f
214:
1.43 mrg 215: /*
216: * Indeed, a multiboot-compliant boot loader executed us. We copy
1.37 jmmv 217: * the received Multiboot information structure into kernel's data
218: * space to process it later -- after we are relocated. It will
1.43 mrg 219: * be safer to run complex C code than doing it at this point.
220: */
1.37 jmmv 221: pushl %ebx # Address of Multiboot information
222: call _C_LABEL(multiboot_pre_reloc)
223: addl $4,%esp
1.38 jmmv 224: jmp 2f
1.37 jmmv 225: #endif
226:
227: 1:
1.1 fvdl 228: /*
1.38 jmmv 229: * At this point, we know that a NetBSD-specific boot loader
230: * booted this kernel. The stack carries the following parameters:
1.41 jmmv 231: * (boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem),
1.38 jmmv 232: * 4 bytes each.
1.1 fvdl 233: */
1.38 jmmv 234: addl $4,%esp # Discard return address to boot loader
235: call _C_LABEL(native_loader)
236: addl $24,%esp
1.1 fvdl 237:
238: 2:
239: /* First, reset the PSL. */
240: pushl $PSL_MBO
241: popfl
242:
243: /* Clear segment registers; always null in proc0. */
244: xorl %eax,%eax
245: movw %ax,%fs
246: movw %ax,%gs
247: decl %eax
248: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
249:
250: /* Find out our CPU type. */
251:
252: try386: /* Try to toggle alignment check flag; does not exist on 386. */
253: pushfl
254: popl %eax
255: movl %eax,%ecx
256: orl $PSL_AC,%eax
257: pushl %eax
258: popfl
259: pushfl
260: popl %eax
261: xorl %ecx,%eax
262: andl $PSL_AC,%eax
263: pushl %ecx
264: popfl
265:
266: testl %eax,%eax
267: jnz try486
268:
269: /*
270: * Try the test of a NexGen CPU -- ZF will not change on a DIV
271: * instruction on a NexGen, it will on an i386. Documented in
272: * Nx586 Processor Recognition Application Note, NexGen, Inc.
273: */
274: movl $0x5555,%eax
275: xorl %edx,%edx
276: movl $2,%ecx
277: divl %ecx
278: jnz is386
279:
280: isnx586:
281: /*
282: * Don't try cpuid, as Nx586s reportedly don't support the
283: * PSL_ID bit.
284: */
285: movl $CPU_NX586,RELOC(cpu)
286: jmp 2f
287:
288: is386:
289: movl $CPU_386,RELOC(cpu)
290: jmp 2f
291:
292: try486: /* Try to toggle identification flag; does not exist on early 486s. */
293: pushfl
294: popl %eax
295: movl %eax,%ecx
296: xorl $PSL_ID,%eax
297: pushl %eax
298: popfl
299: pushfl
300: popl %eax
301: xorl %ecx,%eax
302: andl $PSL_ID,%eax
303: pushl %ecx
304: popfl
305:
306: testl %eax,%eax
307: jnz try586
308: is486: movl $CPU_486,RELOC(cpu)
309: /*
310: * Check Cyrix CPU
311: * Cyrix CPUs do not change the undefined flags following
312: * execution of the divide instruction which divides 5 by 2.
313: *
314: * Note: CPUID is enabled on M2, so it passes another way.
315: */
316: pushfl
317: movl $0x5555, %eax
318: xorl %edx, %edx
319: movl $2, %ecx
320: clc
321: divl %ecx
322: jnc trycyrix486
323: popfl
324: jmp 2f
325: trycyrix486:
326: movl $CPU_6x86,RELOC(cpu) # set CPU type
327: /*
328: * Check for Cyrix 486 CPU by seeing if the flags change during a
329: * divide. This is documented in the Cx486SLC/e SMM Programmer's
330: * Guide.
331: */
332: xorl %edx,%edx
333: cmpl %edx,%edx # set flags to known state
334: pushfl
335: popl %ecx # store flags in ecx
336: movl $-1,%eax
337: movl $4,%ebx
338: divl %ebx # do a long division
339: pushfl
340: popl %eax
341: xorl %ecx,%eax # are the flags different?
342: testl $0x8d5,%eax # only check C|PF|AF|Z|N|V
343: jne 2f # yes; must be Cyrix 6x86 CPU
344: movl $CPU_486DLC,RELOC(cpu) # set CPU type
345:
346: #ifndef CYRIX_CACHE_WORKS
347: /* Disable caching of the ISA hole only. */
348: invd
349: movb $CCR0,%al # Configuration Register index (CCR0)
350: outb %al,$0x22
351: inb $0x23,%al
352: orb $(CCR0_NC1|CCR0_BARB),%al
353: movb %al,%ah
354: movb $CCR0,%al
355: outb %al,$0x22
356: movb %ah,%al
357: outb %al,$0x23
358: invd
359: #else /* CYRIX_CACHE_WORKS */
360: /* Set cache parameters */
361: invd # Start with guaranteed clean cache
362: movb $CCR0,%al # Configuration Register index (CCR0)
363: outb %al,$0x22
364: inb $0x23,%al
365: andb $~CCR0_NC0,%al
366: #ifndef CYRIX_CACHE_REALLY_WORKS
367: orb $(CCR0_NC1|CCR0_BARB),%al
368: #else
369: orb $CCR0_NC1,%al
370: #endif
371: movb %al,%ah
372: movb $CCR0,%al
373: outb %al,$0x22
374: movb %ah,%al
375: outb %al,$0x23
376: /* clear non-cacheable region 1 */
377: movb $(NCR1+2),%al
378: outb %al,$0x22
379: movb $NCR_SIZE_0K,%al
380: outb %al,$0x23
381: /* clear non-cacheable region 2 */
382: movb $(NCR2+2),%al
383: outb %al,$0x22
384: movb $NCR_SIZE_0K,%al
385: outb %al,$0x23
386: /* clear non-cacheable region 3 */
387: movb $(NCR3+2),%al
388: outb %al,$0x22
389: movb $NCR_SIZE_0K,%al
390: outb %al,$0x23
391: /* clear non-cacheable region 4 */
392: movb $(NCR4+2),%al
393: outb %al,$0x22
394: movb $NCR_SIZE_0K,%al
395: outb %al,$0x23
396: /* enable caching in CR0 */
397: movl %cr0,%eax
398: andl $~(CR0_CD|CR0_NW),%eax
399: movl %eax,%cr0
400: invd
401: #endif /* CYRIX_CACHE_WORKS */
402:
403: jmp 2f
404:
405: try586: /* Use the `cpuid' instruction. */
406: xorl %eax,%eax
407: cpuid
408: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
409:
410: 2:
411: /*
412: * Finished with old stack; load new %esp now instead of later so we
413: * can trace this code without having to worry about the trace trap
414: * clobbering the memory test or the zeroing of the bss+bootstrap page
415: * tables.
416: *
417: * The boot program should check:
418: * text+data <= &stack_variable - more_space_for_stack
419: * text+data+bss+pad+space_for_page_tables <= end_of_memory
420: * Oops, the gdt is in the carcass of the boot program so clearing
421: * the rest of memory is still not possible.
422: */
423: movl $_RELOC(tmpstk),%esp # bootstrap stack end location
424:
425: /*
426: * Virtual address space of kernel:
427: *
1.50.2.2! yamt 428: * text | data | bss | [syms] | page dir | proc0 kstack | L1 ptp
1.1 fvdl 429: * 0 1 2 3
430: */
1.50.2.1 yamt 431:
432: #define PROC0_PDIR_OFF 0
433: #define PROC0_STK_OFF (PROC0_PDIR_OFF + PAGE_SIZE)
434: #define PROC0_PTP1_OFF (PROC0_STK_OFF + UPAGES * PAGE_SIZE)
435:
436: /*
437: * fillkpt
438: * eax = pte (page frame | control | status)
439: * ebx = page table address
440: * ecx = number of pages to map
441: */
442:
443: #define fillkpt \
444: 1: movl %eax,(%ebx) ; /* store phys addr */ \
445: addl $4,%ebx ; /* next pte/pde */ \
446: addl $PAGE_SIZE,%eax ; /* next phys page */ \
447: loop 1b ; \
448:
1.1 fvdl 449:
450: /* Find end of kernel image. */
451: movl $RELOC(end),%edi
1.8 fvdl 452: #if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE)
1.1 fvdl 453: /* Save the symbols (if loaded). */
454: movl RELOC(esym),%eax
455: testl %eax,%eax
456: jz 1f
1.35 yamt 457: subl $KERNBASE,%eax
1.1 fvdl 458: movl %eax,%edi
459: 1:
460: #endif
461:
1.50.2.2! yamt 462: /* Compute sizes */
1.1 fvdl 463: movl %edi,%esi # edi = esym ? esym : end
464: addl $PGOFSET,%esi # page align up
465: andl $~PGOFSET,%esi
466:
1.50.2.2! yamt 467: movl %esi,%eax
! 468: addl $-L2_FRAME,%eax
! 469: shrl $L2_SHIFT,%eax
! 470: movl %eax,RELOC(nkptp)+1*4
! 471:
! 472: addl $(1+UPAGES),%eax
! 473: shll $PGSHIFT,%eax
! 474: movl %eax,RELOC(tablesize)
! 475:
! 476: /* Clear tables */
1.50.2.1 yamt 477: movl %esi,%edi
1.1 fvdl 478: xorl %eax,%eax
479: cld
1.50.2.2! yamt 480: movl RELOC(tablesize),%ecx
1.50.2.1 yamt 481: shrl $2,%ecx
1.1 fvdl 482: rep
483: stosl
484:
1.50.2.1 yamt 485: leal (PROC0_PTP1_OFF)(%esi), %ebx
1.1 fvdl 486:
487: /*
488: * Build initial page tables.
489: */
1.50.2.1 yamt 490: /*
491: * Compute etext - KERNBASE. This can't be > 4G, or we can't deal
492: * with it anyway, since we can't load it in 32 bit mode. So use
493: * the bottom 32 bits.
494: */
495: movl $RELOC(etext),%edx
496: addl $PGOFSET,%edx
1.1 fvdl 497: andl $~PGOFSET,%edx
1.30 junyoung 498:
1.50.2.1 yamt 499: /*
500: * Skip the first MB.
501: */
1.1 fvdl 502: movl $_RELOC(KERNTEXTOFF),%eax
503: movl %eax,%ecx
1.50.2.1 yamt 504: shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */
505: addl %ecx,%ebx
1.1 fvdl 506:
507: /* Map the kernel text read-only. */
508: movl %edx,%ecx
509: subl %eax,%ecx
510: shrl $PGSHIFT,%ecx
511: orl $(PG_V|PG_KR),%eax
512: fillkpt
513:
514: /* Map the data, BSS, and bootstrap tables read-write. */
515: leal (PG_V|PG_KW)(%edx),%eax
1.50.2.2! yamt 516: movl RELOC(tablesize),%ecx
1.1 fvdl 517: addl %esi,%ecx # end of tables
518: subl %edx,%ecx # subtract end of text
519: shrl $PGSHIFT,%ecx
520: fillkpt
521:
1.50.2.1 yamt 522: /* Map ISA I/O mem (later atdevbase) */
1.1 fvdl 523: movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax # having these bits set
524: movl $(IOM_SIZE>>PGSHIFT),%ecx # for this many pte s,
525: fillkpt
526:
527: /*
528: * Construct a page table directory.
529: */
1.50.2.1 yamt 530: /* Set up top level entries for identity mapping */
531: leal (PROC0_PDIR_OFF)(%esi),%ebx
532: leal (PROC0_PTP1_OFF)(%esi),%eax
533: orl $(PG_V|PG_KW), %eax
1.50.2.2! yamt 534: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 535: fillkpt
536:
1.50.2.1 yamt 537: /* Set up top level entries for actual kernel mapping */
538: leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*4)(%esi),%ebx
539: leal (PROC0_PTP1_OFF)(%esi),%eax
540: orl $(PG_V|PG_KW), %eax
1.50.2.2! yamt 541: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 542: fillkpt
543:
544: /* Install a PDE recursively mapping page directory as a page table! */
1.50.2.1 yamt 545: leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*4)(%esi),%ebx
546: leal (PROC0_PDIR_OFF)(%esi),%eax
547: orl $(PG_V|PG_KW),%eax
548: movl %eax,(%ebx)
549:
1.1 fvdl 550:
1.31 junyoung 551: /* Save phys. addr of PDP, for libkvm. */
552: movl %esi,RELOC(PDPpaddr)
1.1 fvdl 553:
1.50.2.1 yamt 554: /*
555: * Startup checklist:
556: * 1. Load %cr3 with pointer to PDIR.
557: */
1.1 fvdl 558: movl %esi,%eax # phys address of ptd in proc 0
559: movl %eax,%cr3 # load ptd addr into mmu
1.50.2.1 yamt 560:
561: /*
562: * 2. Enable paging and the rest of it.
563: */
1.1 fvdl 564: movl %cr0,%eax # get control word
565: # enable paging & NPX emulation
566: orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_EM|CR0_MP),%eax
567: movl %eax,%cr0 # and let's page NOW!
568:
569: pushl $begin # jump to high mem
570: ret
571:
572: begin:
1.50.2.1 yamt 573: /*
574: * We have arrived.
575: * There's no need anymore for the identity mapping in low
576: * memory, remove it.
577: */
1.50.2.2! yamt 578: movl _C_LABEL(nkptp)+1*4,%ecx
1.50.2.1 yamt 579: leal (PROC0_PDIR_OFF)(%esi),%ebx # old, phys address of PDIR
580: addl $(KERNBASE), %ebx # new, virtual address of PDIR
1.1 fvdl 581: 1: movl $0,(%ebx)
1.50.2.1 yamt 582: addl $4,%ebx
1.1 fvdl 583: loop 1b
584:
585: /* Relocate atdevbase. */
1.50.2.2! yamt 586: movl $KERNBASE,%edx
! 587: addl _C_LABEL(tablesize),%edx
1.1 fvdl 588: addl %esi,%edx
589: movl %edx,_C_LABEL(atdevbase)
590:
591: /* Set up bootstrap stack. */
1.50.2.1 yamt 592: leal (PROC0_STK_OFF+KERNBASE)(%esi),%eax
1.40 yamt 593: movl %eax,_C_LABEL(proc0uarea)
594: leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp
595: movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3
1.1 fvdl 596: xorl %ebp,%ebp # mark end of frames
597:
1.37 jmmv 598: #if defined(MULTIBOOT)
599: /* It is now safe to parse the Multiboot information structure
600: * we saved before from C code. Note that we cannot delay its
601: * parsing any more because initgdt (called below) needs to make
602: * use of this information. */
603: call _C_LABEL(multiboot_post_reloc)
604: #endif
605:
1.1 fvdl 606: subl $NGDT*8, %esp # space for temporary gdt
607: pushl %esp
608: call _C_LABEL(initgdt)
609: addl $4,%esp
1.30 junyoung 610:
1.50.2.2! yamt 611: movl _C_LABEL(tablesize),%eax
1.1 fvdl 612: addl %esi,%eax # skip past stack and page tables
613:
614: pushl %eax
615: call _C_LABEL(init386) # wire 386 chip for unix operation
616: addl $4+NGDT*8,%esp # pop temporary gdt
617:
618: #ifdef SAFARI_FIFO_HACK
619: movb $5,%al
620: movw $0x37b,%dx
621: outb %al,%dx
622: movw $0x37f,%dx
623: inb %dx,%al
624: movb %al,%cl
625:
626: orb $1,%cl
627:
628: movb $5,%al
629: movw $0x37b,%dx
630: outb %al,%dx
631: movw $0x37f,%dx
632: movb %cl,%al
633: outb %al,%dx
634: #endif /* SAFARI_FIFO_HACK */
635:
636: call _C_LABEL(main)
637:
638: /*
1.48 yamt 639: * void lwp_trampoline(void);
640: *
1.1 fvdl 641: * This is a trampoline function pushed onto the stack of a newly created
642: * process in order to do some additional setup. The trampoline is entered by
643: * cpu_switch()ing to the process, so we abuse the callee-saved registers used
644: * by cpu_switch() to store the information about the stub to call.
645: * NOTE: This function does not have a normal calling sequence!
646: */
1.48 yamt 647: NENTRY(lwp_trampoline)
648: pushl %ebp
649: xorl %ebp,%ebp
650: pushl %eax
651: call _C_LABEL(lwp_startup)
652: addl $8,%esp
1.1 fvdl 653: pushl %ebx
654: call *%esi
655: addl $4,%esp
1.24 yamt 656: DO_DEFERRED_SWITCH(%eax)
1.1 fvdl 657: INTRFASTEXIT
658: /* NOTREACHED */
659:
660: /*
1.48 yamt 661: * sigcode()
662: *
663: * Signal trampoline; copied to top of user stack. Used only for
664: * compatibility with old releases of NetBSD.
1.1 fvdl 665: */
666: NENTRY(sigcode)
667: /*
668: * Handler has returned here as if we called it. The sigcontext
669: * is on the stack after the 3 args "we" pushed.
670: */
671: leal 12(%esp),%eax # get pointer to sigcontext
672: movl %eax,4(%esp) # put it in the argument slot
673: # fake return address already there
1.17 christos 674: movl $SYS_compat_16___sigreturn14,%eax
1.1 fvdl 675: int $0x80 # enter kernel with args on stack
676: movl $SYS_exit,%eax
677: int $0x80 # exit if sigreturn fails
678: .globl _C_LABEL(esigcode)
679: _C_LABEL(esigcode):
680:
681: /*
682: * void lgdt(struct region_descriptor *rdp);
1.48 yamt 683: *
1.1 fvdl 684: * Load a new GDT pointer (and do any necessary cleanup).
685: * XXX It's somewhat questionable whether reloading all the segment registers
686: * is necessary, since the actual descriptor data is not changed except by
687: * process creation and exit, both of which clean up via task switches. OTOH,
688: * this only happens at run time when the GDT is resized.
689: */
690: NENTRY(lgdt)
691: /* Reload the descriptor table. */
692: movl 4(%esp),%eax
693: lgdt (%eax)
694: /* Flush the prefetch queue. */
695: jmp 1f
696: nop
697: 1: /* Reload "stale" selectors. */
698: movl $GSEL(GDATA_SEL, SEL_KPL),%eax
699: movw %ax,%ds
700: movw %ax,%es
701: movw %ax,%gs
702: movw %ax,%ss
703: movl $GSEL(GCPU_SEL, SEL_KPL),%eax
704: movw %ax,%fs
705: /* Reload code selector by doing intersegment return. */
706: popl %eax
707: pushl $GSEL(GCODE_SEL, SEL_KPL)
708: pushl %eax
709: lret
710:
1.48 yamt 711: /*
712: * void x86_flush()
713: *
714: * Flush instruction pipelines by doing an intersegment (far) return.
715: */
1.45 ad 716: NENTRY(x86_flush)
717: popl %eax
718: pushl $GSEL(GCODE_SEL, SEL_KPL)
719: pushl %eax
720: lret
721:
1.1 fvdl 722: /*
1.48 yamt 723: * int setjmp(label_t *)
724: *
725: * Used primarily by DDB.
1.1 fvdl 726: */
727: ENTRY(setjmp)
728: movl 4(%esp),%eax
729: movl %ebx,(%eax) # save ebx
730: movl %esp,4(%eax) # save esp
731: movl %ebp,8(%eax) # save ebp
732: movl %esi,12(%eax) # save esi
733: movl %edi,16(%eax) # save edi
734: movl (%esp),%edx # get rta
735: movl %edx,20(%eax) # save eip
1.48 yamt 736: xorl %eax,%eax # return 0
1.1 fvdl 737: ret
738:
1.48 yamt 739: /*
740: * int longjmp(label_t *)
741: *
742: * Used primarily by DDB.
743: */
1.1 fvdl 744: ENTRY(longjmp)
745: movl 4(%esp),%eax
746: movl (%eax),%ebx # restore ebx
747: movl 4(%eax),%esp # restore esp
748: movl 8(%eax),%ebp # restore ebp
749: movl 12(%eax),%esi # restore esi
750: movl 16(%eax),%edi # restore edi
751: movl 20(%eax),%edx # get rta
752: movl %edx,(%esp) # put in return frame
1.48 yamt 753: movl $1,%eax # return 1
1.1 fvdl 754: ret
755:
756: /*
1.48 yamt 757: * struct lwp *cpu_switchto(struct lwp *oldlwp, struct newlwp)
1.30 junyoung 758: *
1.48 yamt 759: * 1. if (oldlwp != NULL), save its context.
760: * 2. then, restore context of newlwp.
761: *
762: * Note that the stack frame layout is known to "struct switchframe" in
763: * <machine/frame.h> and to the code in cpu_lwp_fork() which initializes
1.5 thorpej 764: * it for a new lwp.
1.1 fvdl 765: */
1.48 yamt 766: ENTRY(cpu_switchto)
1.1 fvdl 767: pushl %ebx
768: pushl %esi
769: pushl %edi
770:
1.48 yamt 771: movl 16(%esp),%esi # oldlwp
772: movl 20(%esp),%edi # newlwp
773: testl %esi,%esi
774: jz 1f
1.1 fvdl 775:
1.48 yamt 776: /* Save old context. */
777: movl L_ADDR(%esi),%eax
778: movl %esp,PCB_ESP(%eax)
779: movl %ebp,PCB_EBP(%eax)
780:
781: /* Switch to newlwp's stack. */
782: 1: movl L_ADDR(%edi),%ebx
783: movl PCB_EBP(%ebx),%ebp
784: movl PCB_ESP(%ebx),%esp
1.1 fvdl 785:
1.48 yamt 786: /* Switch TSS. Reset "task busy" flag before loading. */
1.26 yamt 787: movl %cr3,%eax
1.48 yamt 788: movl %eax,PCB_CR3(%ebx) # for TSS gates
1.1 fvdl 789: movl CPUVAR(GDT),%eax
1.48 yamt 790: movl L_MD_TSS_SEL(%edi),%edx
791: andl $~0x0200,4(%eax,%edx, 1)
1.1 fvdl 792: ltr %dx
793:
1.48 yamt 794: /* Set curlwp. */
795: movl %edi,CPUVAR(CURLWP)
1.1 fvdl 796:
797: /* Don't bother with the rest if switching to a system process. */
1.48 yamt 798: testl $LW_SYSTEM,L_FLAG(%edi)
799: jnz 4f
1.1 fvdl 800:
1.48 yamt 801: /* Is this process using RAS (restartable atomic sequences)? */
802: movl L_PROC(%edi),%eax
803: cmpl $0,P_RASLIST(%eax)
804: jne 5f
805:
806: /*
807: * Restore cr0 (including FPU state). Raise the IPL to IPL_IPI.
808: * FPU IPIs can alter the LWP's saved cr0. Dropping the priority
809: * is deferred until mi_switch(), when cpu_switchto() returns.
810: */
811: 2: movl $IPL_IPI,CPUVAR(ILEVEL)
812: movl PCB_CR0(%ebx),%ecx
813: movl %cr0,%edx
1.1 fvdl 814:
1.30 junyoung 815: /*
1.22 wiz 816: * If our floating point registers are on a different CPU,
1.48 yamt 817: * set CR0_TS so we'll trap rather than reuse bogus state.
1.1 fvdl 818: */
1.48 yamt 819: movl PCB_FPCPU(%ebx),%eax
820: cmpl CPUVAR(SELF),%eax
821: je 3f
1.1 fvdl 822: orl $CR0_TS,%ecx
1.48 yamt 823:
824: /* Reloading CR0 is very expensive - avoid if possible. */
825: 3: cmpl %edx,%ecx
826: je 4f
1.1 fvdl 827: movl %ecx,%cr0
828:
1.48 yamt 829: /* Return to the new LWP, returning 'oldlwp' in %eax. */
830: 4: movl %esi,%eax
1.1 fvdl 831: popl %edi
832: popl %esi
833: popl %ebx
834: ret
1.20 dsl 835:
1.48 yamt 836: /* Check for restartable atomic sequences (RAS). */
837: 5: movl L_MD_REGS(%edi),%ecx
838: pushl TF_EIP(%ecx)
1.20 dsl 839: pushl %eax
840: call _C_LABEL(ras_lookup)
841: addl $8,%esp
842: cmpl $-1,%eax
1.48 yamt 843: je 2b
1.49 ad 844: movl L_MD_REGS(%edi),%ecx
845: movl %eax,TF_EIP(%ecx)
1.48 yamt 846: jmp 2b
1.1 fvdl 847:
848: /*
849: * void savectx(struct pcb *pcb);
1.48 yamt 850: *
1.1 fvdl 851: * Update pcb, saving current processor state.
852: */
853: ENTRY(savectx)
1.47 skrll 854: movl 4(%esp),%edx # edx = pcb
1.1 fvdl 855: movl %esp,PCB_ESP(%edx)
856: movl %ebp,PCB_EBP(%edx)
857: ret
858:
859: /*
1.48 yamt 860: * osyscall()
861: *
1.1 fvdl 862: * Old call gate entry for syscall
863: */
864: IDTVEC(osyscall)
1.48 yamt 865: pushfl # set eflags in trap frame
1.1 fvdl 866: popl 8(%esp)
867: pushl $7 # size of instruction for restart
868: jmp syscall1
869:
870: /*
1.48 yamt 871: * syscall()
872: *
1.1 fvdl 873: * Trap gate entry for syscall
874: */
875: IDTVEC(syscall)
876: pushl $2 # size of instruction for restart
877: syscall1:
878: pushl $T_ASTFLT # trap # for doing ASTs
879: INTRENTRY
880:
881: #ifdef DIAGNOSTIC
1.24 yamt 882: cmpl $0, CPUVAR(WANT_PMAPLOAD)
883: jz 1f
884: pushl $6f
885: call _C_LABEL(printf)
886: addl $4, %esp
887: 1:
1.1 fvdl 888: movl CPUVAR(ILEVEL),%ebx
889: testl %ebx,%ebx
890: jz 1f
891: pushl $5f
892: call _C_LABEL(printf)
893: addl $4,%esp
894: #ifdef DDB
895: int $3
896: #endif
1.30 junyoung 897: 1:
1.1 fvdl 898: #endif /* DIAGNOSTIC */
1.5 thorpej 899: movl CPUVAR(CURLWP),%edx
900: movl %esp,L_MD_REGS(%edx) # save pointer to frame
901: movl L_PROC(%edx),%edx
1.15 fvdl 902: pushl %esp
1.1 fvdl 903: call *P_MD_SYSCALL(%edx) # get pointer to syscall() function
1.15 fvdl 904: addl $4,%esp
1.27 yamt 905: .Lsyscall_checkast:
1.24 yamt 906: /* Check for ASTs on exit to user mode. */
1.1 fvdl 907: cli
1.5 thorpej 908: CHECK_ASTPENDING(%eax)
1.1 fvdl 909: je 1f
910: /* Always returning to user mode here. */
1.5 thorpej 911: CLEAR_ASTPENDING(%eax)
1.1 fvdl 912: sti
913: /* Pushed T_ASTFLT into tf_trapno on entry. */
1.15 fvdl 914: pushl %esp
1.1 fvdl 915: call _C_LABEL(trap)
1.15 fvdl 916: addl $4,%esp
1.27 yamt 917: jmp .Lsyscall_checkast /* re-check ASTs */
1.24 yamt 918: 1: CHECK_DEFERRED_SWITCH(%eax)
919: jnz 9f
1.1 fvdl 920: #ifndef DIAGNOSTIC
1.24 yamt 921: INTRFASTEXIT
1.1 fvdl 922: #else /* DIAGNOSTIC */
1.24 yamt 923: cmpl $IPL_NONE,CPUVAR(ILEVEL)
1.1 fvdl 924: jne 3f
925: INTRFASTEXIT
926: 3: sti
927: pushl $4f
928: call _C_LABEL(printf)
929: addl $4,%esp
930: #ifdef DDB
931: int $3
932: #endif /* DDB */
933: movl $IPL_NONE,CPUVAR(ILEVEL)
934: jmp 2b
935: 4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n"
1.30 junyoung 936: 5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n"
937: 6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n"
1.1 fvdl 938: #endif /* DIAGNOSTIC */
1.24 yamt 939: 9: sti
940: call _C_LABEL(pmap_load)
1.27 yamt 941: jmp .Lsyscall_checkast /* re-check ASTs */
1.1 fvdl 942:
943: #if NNPX > 0
944: /*
945: * Special interrupt handlers. Someday intr0-intr15 will be used to count
946: * interrupts. We'll still need a special exception 16 handler. The busy
947: * latch stuff in probintr() can be moved to npxprobe().
948: */
949:
1.48 yamt 950: /*
951: * void probeintr(void)
952: */
1.1 fvdl 953: NENTRY(probeintr)
954: ss
955: incl _C_LABEL(npx_intrs_while_probing)
956: pushl %eax
957: movb $0x20,%al # EOI (asm in strings loses cpp features)
958: outb %al,$0xa0 # IO_ICU2
959: outb %al,$0x20 # IO_ICU1
960: movb $0,%al
961: outb %al,$0xf0 # clear BUSY# latch
962: popl %eax
963: iret
964:
1.48 yamt 965: /*
966: * void probetrap(void)
967: */
1.1 fvdl 968: NENTRY(probetrap)
969: ss
970: incl _C_LABEL(npx_traps_while_probing)
971: fnclex
972: iret
973:
1.48 yamt 974: /*
975: * int npx586bug1(int a, int b)
976: */
1.1 fvdl 977: NENTRY(npx586bug1)
978: fildl 4(%esp) # x
979: fildl 8(%esp) # y
980: fld %st(1)
981: fdiv %st(1),%st # x/y
982: fmulp %st,%st(1) # (x/y)*y
983: fsubrp %st,%st(1) # x-(x/y)*y
984: pushl $0
985: fistpl (%esp)
986: popl %eax
987: ret
988: #endif /* NNPX > 0 */
1.50 ad 989:
990: /*
991: * void sse2_zero_page(void *pg)
992: *
993: * Zero a page without polluting the cache.
994: */
995: ENTRY(sse2_zero_page)
996: pushl %ebp
997: movl %esp,%ebp
998: movl 8(%esp), %edx
999: movl $PAGE_SIZE, %ecx
1000: xorl %eax, %eax
1001: .align 16
1002: 1:
1003: movnti %eax, 0(%edx)
1004: movnti %eax, 4(%edx)
1005: movnti %eax, 8(%edx)
1006: movnti %eax, 12(%edx)
1007: movnti %eax, 16(%edx)
1008: movnti %eax, 20(%edx)
1009: movnti %eax, 24(%edx)
1010: movnti %eax, 28(%edx)
1011: subl $32, %ecx
1012: leal 32(%edx), %edx
1013: jnz 1b
1014: sfence
1015: pop %ebp
1016: ret
1017:
1018: /*
1019: * void sse2_copy_page(void *src, void *dst)
1020: *
1021: * Copy a page without polluting the cache.
1022: */
1023: ENTRY(sse2_copy_page)
1024: pushl %ebp
1025: pushl %ebx
1026: pushl %esi
1027: pushl %edi
1028: movl 20(%esp), %esi
1029: movl 24(%esp), %edi
1030: movl $PAGE_SIZE, %ebp
1031: .align 16
1032: 1:
1033: movl 0(%esi), %eax
1034: movl 4(%esi), %ebx
1035: movl 8(%esi), %ecx
1036: movl 12(%esi), %edx
1037: movnti %eax, 0(%edi)
1038: movnti %ebx, 4(%edi)
1039: movnti %ecx, 8(%edi)
1040: movnti %edx, 12(%edi)
1041: subl $16, %ebp
1042: leal 16(%esi), %esi
1043: leal 16(%edi), %edi
1044: jnz 1b
1045: sfence
1046: popl %edi
1047: popl %esi
1048: popl %ebx
1049: popl %ebp
1050: ret
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