Annotation of src/sys/arch/i386/i386/locore.S, Revision 1.48.8.6
1.48.8.6! joerg 1: /* $NetBSD: locore.S,v 1.48.8.5 2007/11/14 19:04:11 joerg Exp $ */
1.48.8.3 joerg 2:
3: /*
4: * Copyright-o-rama!
5: */
6:
7: /*
8: * Copyright (c) 2001 Wasabi Systems, Inc.
9: * All rights reserved.
10: *
11: * Written by Frank van der Linden for Wasabi Systems, Inc.
12: *
13: * Redistribution and use in source and binary forms, with or without
14: * modification, are permitted provided that the following conditions
15: * are met:
16: * 1. Redistributions of source code must retain the above copyright
17: * notice, this list of conditions and the following disclaimer.
18: * 2. Redistributions in binary form must reproduce the above copyright
19: * notice, this list of conditions and the following disclaimer in the
20: * documentation and/or other materials provided with the distribution.
21: * 3. All advertising materials mentioning features or use of this software
22: * must display the following acknowledgement:
23: * This product includes software developed for the NetBSD Project by
24: * Wasabi Systems, Inc.
25: * 4. The name of Wasabi Systems, Inc. may not be used to endorse
26: * or promote products derived from this software without specific prior
27: * written permission.
28: *
29: * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
30: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
31: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
32: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
33: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
34: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
35: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
36: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
37: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
39: * POSSIBILITY OF SUCH DAMAGE.
40: */
41:
1.1 fvdl 42:
43: /*-
1.48 yamt 44: * Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc.
1.1 fvdl 45: * All rights reserved.
46: *
47: * This code is derived from software contributed to The NetBSD Foundation
48: * by Charles M. Hannum.
49: *
50: * Redistribution and use in source and binary forms, with or without
51: * modification, are permitted provided that the following conditions
52: * are met:
53: * 1. Redistributions of source code must retain the above copyright
54: * notice, this list of conditions and the following disclaimer.
55: * 2. Redistributions in binary form must reproduce the above copyright
56: * notice, this list of conditions and the following disclaimer in the
57: * documentation and/or other materials provided with the distribution.
58: * 3. All advertising materials mentioning features or use of this software
59: * must display the following acknowledgement:
60: * This product includes software developed by the NetBSD
61: * Foundation, Inc. and its contributors.
62: * 4. Neither the name of The NetBSD Foundation nor the names of its
63: * contributors may be used to endorse or promote products derived
64: * from this software without specific prior written permission.
65: *
66: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
67: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
68: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
69: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
70: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
71: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
72: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
73: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
74: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
75: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
76: * POSSIBILITY OF SUCH DAMAGE.
77: */
78:
79: /*-
80: * Copyright (c) 1990 The Regents of the University of California.
81: * All rights reserved.
82: *
83: * This code is derived from software contributed to Berkeley by
84: * William Jolitz.
85: *
86: * Redistribution and use in source and binary forms, with or without
87: * modification, are permitted provided that the following conditions
88: * are met:
89: * 1. Redistributions of source code must retain the above copyright
90: * notice, this list of conditions and the following disclaimer.
91: * 2. Redistributions in binary form must reproduce the above copyright
92: * notice, this list of conditions and the following disclaimer in the
93: * documentation and/or other materials provided with the distribution.
1.12 agc 94: * 3. Neither the name of the University nor the names of its contributors
1.1 fvdl 95: * may be used to endorse or promote products derived from this software
96: * without specific prior written permission.
97: *
98: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
99: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
100: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
101: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
102: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
103: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
104: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
105: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
106: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
107: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
108: * SUCH DAMAGE.
109: *
110: * @(#)locore.s 7.3 (Berkeley) 5/13/91
111: */
112:
1.18 christos 113: #include "opt_compat_oldboot.h"
1.1 fvdl 114: #include "opt_ddb.h"
115: #include "opt_realmem.h"
1.18 christos 116: #include "opt_vm86.h"
1.1 fvdl 117:
118: #include "npx.h"
119: #include "assym.h"
120: #include "lapic.h"
121: #include "ioapic.h"
1.8 fvdl 122: #include "ksyms.h"
1.1 fvdl 123:
124: #include <sys/errno.h>
125: #include <sys/syscall.h>
126:
127: #include <machine/cputypes.h>
128: #include <machine/segments.h>
129: #include <machine/specialreg.h>
130: #include <machine/trap.h>
131: #include <machine/i82489reg.h>
1.37 jmmv 132: #include <machine/multiboot.h>
1.1 fvdl 133: #include <machine/asm.h>
1.48 yamt 134: #include <machine/frameasm.h>
135: #include <machine/i82489reg.h>
1.1 fvdl 136:
137: /* XXX temporary kluge; these should not be here */
138: /* Get definitions for IOM_BEGIN, IOM_END, and IOM_SIZE */
139: #include <dev/isa/isareg.h>
140:
141: /*
142: * Initialization
143: */
144: .data
145:
146: .globl _C_LABEL(cpu)
1.38 jmmv 147: .globl _C_LABEL(esym)
148: .globl _C_LABEL(atdevbase)
1.40 yamt 149: .globl _C_LABEL(proc0uarea),_C_LABEL(PDPpaddr)
1.1 fvdl 150: .globl _C_LABEL(gdt)
151: .globl _C_LABEL(idt)
1.30 junyoung 152: .globl _C_LABEL(lapic_tpr)
153:
1.1 fvdl 154: #if NLAPIC > 0
155: #ifdef __ELF__
1.7 thorpej 156: .align PAGE_SIZE
1.1 fvdl 157: #else
158: .align 12
159: #endif
160: .globl _C_LABEL(local_apic), _C_LABEL(lapic_id)
161: _C_LABEL(local_apic):
162: .space LAPIC_ID
1.30 junyoung 163: _C_LABEL(lapic_id):
1.1 fvdl 164: .long 0x00000000
165: .space LAPIC_TPRI-(LAPIC_ID+4)
1.30 junyoung 166: _C_LABEL(lapic_tpr):
1.1 fvdl 167: .space LAPIC_PPRI-LAPIC_TPRI
1.30 junyoung 168: _C_LABEL(lapic_ppr):
1.1 fvdl 169: .space LAPIC_ISR-LAPIC_PPRI
170: _C_LABEL(lapic_isr):
1.7 thorpej 171: .space PAGE_SIZE-LAPIC_ISR
1.1 fvdl 172: #else
1.30 junyoung 173: _C_LABEL(lapic_tpr):
1.1 fvdl 174: .long 0
175: #endif
1.30 junyoung 176:
1.48 yamt 177: _C_LABEL(cpu): .long 0 # are we 80486, Pentium, or..
1.1 fvdl 178: _C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual
1.40 yamt 179: _C_LABEL(proc0uarea): .long 0
1.31 junyoung 180: _C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm
1.48.8.3 joerg 181: _C_LABEL(tablesize): .long 0
1.30 junyoung 182:
1.1 fvdl 183: .space 512
184: tmpstk:
185:
186:
1.35 yamt 187: #define _RELOC(x) ((x) - KERNBASE)
1.1 fvdl 188: #define RELOC(x) _RELOC(_C_LABEL(x))
189:
190: .text
191: .globl _C_LABEL(kernel_text)
192: .set _C_LABEL(kernel_text),KERNTEXTOFF
193:
194: .globl start
195: start: movw $0x1234,0x472 # warm boot
196:
1.37 jmmv 197: #if defined(MULTIBOOT)
198: jmp 1f
199:
200: .align 4
201: .globl Multiboot_Header
202: _C_LABEL(Multiboot_Header):
1.44 jmmv 203: #define MULTIBOOT_HEADER_FLAGS (MULTIBOOT_HEADER_WANT_MEMORY)
1.37 jmmv 204: .long MULTIBOOT_HEADER_MAGIC
205: .long MULTIBOOT_HEADER_FLAGS
206: .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
207:
208: 1:
209: /* Check if we are being executed by a Multiboot-compliant boot
210: * loader. */
211: cmpl $MULTIBOOT_INFO_MAGIC,%eax
212: jne 1f
213:
1.43 mrg 214: /*
215: * Indeed, a multiboot-compliant boot loader executed us. We copy
1.37 jmmv 216: * the received Multiboot information structure into kernel's data
217: * space to process it later -- after we are relocated. It will
1.43 mrg 218: * be safer to run complex C code than doing it at this point.
219: */
1.37 jmmv 220: pushl %ebx # Address of Multiboot information
221: call _C_LABEL(multiboot_pre_reloc)
222: addl $4,%esp
1.38 jmmv 223: jmp 2f
1.37 jmmv 224: #endif
225:
226: 1:
1.1 fvdl 227: /*
1.38 jmmv 228: * At this point, we know that a NetBSD-specific boot loader
229: * booted this kernel. The stack carries the following parameters:
1.41 jmmv 230: * (boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem),
1.38 jmmv 231: * 4 bytes each.
1.1 fvdl 232: */
1.38 jmmv 233: addl $4,%esp # Discard return address to boot loader
234: call _C_LABEL(native_loader)
235: addl $24,%esp
1.1 fvdl 236:
237: 2:
238: /* First, reset the PSL. */
239: pushl $PSL_MBO
240: popfl
241:
242: /* Clear segment registers; always null in proc0. */
243: xorl %eax,%eax
244: movw %ax,%fs
245: movw %ax,%gs
246: decl %eax
247: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
248:
249: /* Find out our CPU type. */
250:
251: try386: /* Try to toggle alignment check flag; does not exist on 386. */
252: pushfl
253: popl %eax
254: movl %eax,%ecx
255: orl $PSL_AC,%eax
256: pushl %eax
257: popfl
258: pushfl
259: popl %eax
260: xorl %ecx,%eax
261: andl $PSL_AC,%eax
262: pushl %ecx
263: popfl
264:
265: testl %eax,%eax
266: jnz try486
267:
268: /*
269: * Try the test of a NexGen CPU -- ZF will not change on a DIV
270: * instruction on a NexGen, it will on an i386. Documented in
271: * Nx586 Processor Recognition Application Note, NexGen, Inc.
272: */
273: movl $0x5555,%eax
274: xorl %edx,%edx
275: movl $2,%ecx
276: divl %ecx
277: jnz is386
278:
279: isnx586:
280: /*
281: * Don't try cpuid, as Nx586s reportedly don't support the
282: * PSL_ID bit.
283: */
284: movl $CPU_NX586,RELOC(cpu)
285: jmp 2f
286:
287: is386:
288: movl $CPU_386,RELOC(cpu)
289: jmp 2f
290:
291: try486: /* Try to toggle identification flag; does not exist on early 486s. */
292: pushfl
293: popl %eax
294: movl %eax,%ecx
295: xorl $PSL_ID,%eax
296: pushl %eax
297: popfl
298: pushfl
299: popl %eax
300: xorl %ecx,%eax
301: andl $PSL_ID,%eax
302: pushl %ecx
303: popfl
304:
305: testl %eax,%eax
306: jnz try586
307: is486: movl $CPU_486,RELOC(cpu)
308: /*
309: * Check Cyrix CPU
310: * Cyrix CPUs do not change the undefined flags following
311: * execution of the divide instruction which divides 5 by 2.
312: *
313: * Note: CPUID is enabled on M2, so it passes another way.
314: */
315: pushfl
316: movl $0x5555, %eax
317: xorl %edx, %edx
318: movl $2, %ecx
319: clc
320: divl %ecx
321: jnc trycyrix486
322: popfl
323: jmp 2f
324: trycyrix486:
325: movl $CPU_6x86,RELOC(cpu) # set CPU type
326: /*
327: * Check for Cyrix 486 CPU by seeing if the flags change during a
328: * divide. This is documented in the Cx486SLC/e SMM Programmer's
329: * Guide.
330: */
331: xorl %edx,%edx
332: cmpl %edx,%edx # set flags to known state
333: pushfl
334: popl %ecx # store flags in ecx
335: movl $-1,%eax
336: movl $4,%ebx
337: divl %ebx # do a long division
338: pushfl
339: popl %eax
340: xorl %ecx,%eax # are the flags different?
341: testl $0x8d5,%eax # only check C|PF|AF|Z|N|V
342: jne 2f # yes; must be Cyrix 6x86 CPU
343: movl $CPU_486DLC,RELOC(cpu) # set CPU type
344:
345: #ifndef CYRIX_CACHE_WORKS
346: /* Disable caching of the ISA hole only. */
347: invd
348: movb $CCR0,%al # Configuration Register index (CCR0)
349: outb %al,$0x22
350: inb $0x23,%al
351: orb $(CCR0_NC1|CCR0_BARB),%al
352: movb %al,%ah
353: movb $CCR0,%al
354: outb %al,$0x22
355: movb %ah,%al
356: outb %al,$0x23
357: invd
358: #else /* CYRIX_CACHE_WORKS */
359: /* Set cache parameters */
360: invd # Start with guaranteed clean cache
361: movb $CCR0,%al # Configuration Register index (CCR0)
362: outb %al,$0x22
363: inb $0x23,%al
364: andb $~CCR0_NC0,%al
365: #ifndef CYRIX_CACHE_REALLY_WORKS
366: orb $(CCR0_NC1|CCR0_BARB),%al
367: #else
368: orb $CCR0_NC1,%al
369: #endif
370: movb %al,%ah
371: movb $CCR0,%al
372: outb %al,$0x22
373: movb %ah,%al
374: outb %al,$0x23
375: /* clear non-cacheable region 1 */
376: movb $(NCR1+2),%al
377: outb %al,$0x22
378: movb $NCR_SIZE_0K,%al
379: outb %al,$0x23
380: /* clear non-cacheable region 2 */
381: movb $(NCR2+2),%al
382: outb %al,$0x22
383: movb $NCR_SIZE_0K,%al
384: outb %al,$0x23
385: /* clear non-cacheable region 3 */
386: movb $(NCR3+2),%al
387: outb %al,$0x22
388: movb $NCR_SIZE_0K,%al
389: outb %al,$0x23
390: /* clear non-cacheable region 4 */
391: movb $(NCR4+2),%al
392: outb %al,$0x22
393: movb $NCR_SIZE_0K,%al
394: outb %al,$0x23
395: /* enable caching in CR0 */
396: movl %cr0,%eax
397: andl $~(CR0_CD|CR0_NW),%eax
398: movl %eax,%cr0
399: invd
400: #endif /* CYRIX_CACHE_WORKS */
401:
402: jmp 2f
403:
404: try586: /* Use the `cpuid' instruction. */
405: xorl %eax,%eax
406: cpuid
407: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
408:
409: 2:
410: /*
411: * Finished with old stack; load new %esp now instead of later so we
412: * can trace this code without having to worry about the trace trap
413: * clobbering the memory test or the zeroing of the bss+bootstrap page
414: * tables.
415: *
416: * The boot program should check:
417: * text+data <= &stack_variable - more_space_for_stack
418: * text+data+bss+pad+space_for_page_tables <= end_of_memory
419: * Oops, the gdt is in the carcass of the boot program so clearing
420: * the rest of memory is still not possible.
421: */
422: movl $_RELOC(tmpstk),%esp # bootstrap stack end location
423:
424: /*
425: * Virtual address space of kernel:
426: *
1.48.8.3 joerg 427: * text | data | bss | [syms] | page dir | proc0 kstack | L1 ptp
1.1 fvdl 428: * 0 1 2 3
429: */
1.48.8.3 joerg 430:
431: #define PROC0_PDIR_OFF 0
432: #define PROC0_STK_OFF (PROC0_PDIR_OFF + PAGE_SIZE)
433: #define PROC0_PTP1_OFF (PROC0_STK_OFF + UPAGES * PAGE_SIZE)
434:
435: /*
436: * fillkpt
437: * eax = pte (page frame | control | status)
438: * ebx = page table address
439: * ecx = number of pages to map
440: */
441:
442: #define fillkpt \
443: 1: movl %eax,(%ebx) ; /* store phys addr */ \
444: addl $4,%ebx ; /* next pte/pde */ \
445: addl $PAGE_SIZE,%eax ; /* next phys page */ \
446: loop 1b ; \
447:
1.1 fvdl 448:
449: /* Find end of kernel image. */
450: movl $RELOC(end),%edi
1.8 fvdl 451: #if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE)
1.1 fvdl 452: /* Save the symbols (if loaded). */
453: movl RELOC(esym),%eax
454: testl %eax,%eax
455: jz 1f
1.35 yamt 456: subl $KERNBASE,%eax
1.1 fvdl 457: movl %eax,%edi
458: 1:
459: #endif
460:
1.48.8.3 joerg 461: /* Compute sizes */
1.1 fvdl 462: movl %edi,%esi # edi = esym ? esym : end
463: addl $PGOFSET,%esi # page align up
464: andl $~PGOFSET,%esi
465:
1.48.8.3 joerg 466: /* nkptp[1] = (esi + ~L2_FRAME) >> L2_SHIFT + 1; */
467: movl %esi,%eax
468: addl $~L2_FRAME,%eax
469: shrl $L2_SHIFT,%eax
470: incl %eax /* one more ptp for VAs stolen by bootstrap */
471: 1: movl %eax,RELOC(nkptp)+1*4
472:
473: /* tablesize = (1 + UPAGES + nkptp) << PGSHIFT; */
474: addl $(1+UPAGES),%eax
475: shll $PGSHIFT,%eax
476: movl %eax,RELOC(tablesize)
477:
478: /* ensure that nkptp covers bootstrap tables */
479: addl %esi,%eax
480: addl $~L2_FRAME,%eax
481: shrl $L2_SHIFT,%eax
482: incl %eax
483: cmpl %eax,RELOC(nkptp)+1*4
484: jnz 1b
485:
486: /* Clear tables */
487: movl %esi,%edi
1.1 fvdl 488: xorl %eax,%eax
489: cld
1.48.8.3 joerg 490: movl RELOC(tablesize),%ecx
491: shrl $2,%ecx
1.1 fvdl 492: rep
493: stosl
494:
1.48.8.3 joerg 495: leal (PROC0_PTP1_OFF)(%esi), %ebx
1.1 fvdl 496:
497: /*
498: * Build initial page tables.
499: */
1.48.8.3 joerg 500: /*
501: * Compute &__data_start - KERNBASE. This can't be > 4G,
502: * or we can't deal with it anyway, since we can't load it in
503: * 32 bit mode. So use the bottom 32 bits.
504: */
505: movl $RELOC(__data_start),%edx
1.1 fvdl 506: andl $~PGOFSET,%edx
1.30 junyoung 507:
1.48.8.3 joerg 508: /*
509: * Skip the first MB.
510: */
1.1 fvdl 511: movl $_RELOC(KERNTEXTOFF),%eax
512: movl %eax,%ecx
1.48.8.3 joerg 513: shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */
514: addl %ecx,%ebx
1.1 fvdl 515:
516: /* Map the kernel text read-only. */
517: movl %edx,%ecx
518: subl %eax,%ecx
519: shrl $PGSHIFT,%ecx
520: orl $(PG_V|PG_KR),%eax
521: fillkpt
522:
523: /* Map the data, BSS, and bootstrap tables read-write. */
524: leal (PG_V|PG_KW)(%edx),%eax
1.48.8.3 joerg 525: movl RELOC(tablesize),%ecx
1.1 fvdl 526: addl %esi,%ecx # end of tables
527: subl %edx,%ecx # subtract end of text
528: shrl $PGSHIFT,%ecx
529: fillkpt
530:
1.48.8.3 joerg 531: /* Map ISA I/O mem (later atdevbase) */
1.1 fvdl 532: movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax # having these bits set
533: movl $(IOM_SIZE>>PGSHIFT),%ecx # for this many pte s,
534: fillkpt
535:
536: /*
537: * Construct a page table directory.
538: */
1.48.8.3 joerg 539: /* Set up top level entries for identity mapping */
540: leal (PROC0_PDIR_OFF)(%esi),%ebx
541: leal (PROC0_PTP1_OFF)(%esi),%eax
542: orl $(PG_V|PG_KW), %eax
543: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 544: fillkpt
545:
1.48.8.3 joerg 546: /* Set up top level entries for actual kernel mapping */
547: leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*4)(%esi),%ebx
548: leal (PROC0_PTP1_OFF)(%esi),%eax
549: orl $(PG_V|PG_KW), %eax
550: movl RELOC(nkptp)+1*4,%ecx
1.1 fvdl 551: fillkpt
552:
553: /* Install a PDE recursively mapping page directory as a page table! */
1.48.8.3 joerg 554: leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*4)(%esi),%ebx
555: leal (PROC0_PDIR_OFF)(%esi),%eax
556: orl $(PG_V|PG_KW),%eax
557: movl %eax,(%ebx)
558:
1.1 fvdl 559:
1.31 junyoung 560: /* Save phys. addr of PDP, for libkvm. */
561: movl %esi,RELOC(PDPpaddr)
1.1 fvdl 562:
1.48.8.3 joerg 563: /*
564: * Startup checklist:
565: * 1. Load %cr3 with pointer to PDIR.
566: */
1.1 fvdl 567: movl %esi,%eax # phys address of ptd in proc 0
568: movl %eax,%cr3 # load ptd addr into mmu
1.48.8.3 joerg 569:
570: /*
571: * 2. Enable paging and the rest of it.
572: */
1.1 fvdl 573: movl %cr0,%eax # get control word
574: # enable paging & NPX emulation
575: orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_EM|CR0_MP),%eax
576: movl %eax,%cr0 # and let's page NOW!
577:
578: pushl $begin # jump to high mem
579: ret
580:
581: begin:
1.48.8.3 joerg 582: /*
583: * We have arrived.
584: * There's no need anymore for the identity mapping in low
585: * memory, remove it.
586: */
587: movl _C_LABEL(nkptp)+1*4,%ecx
588: leal (PROC0_PDIR_OFF)(%esi),%ebx # old, phys address of PDIR
589: addl $(KERNBASE), %ebx # new, virtual address of PDIR
1.1 fvdl 590: 1: movl $0,(%ebx)
1.48.8.3 joerg 591: addl $4,%ebx
1.1 fvdl 592: loop 1b
593:
594: /* Relocate atdevbase. */
1.48.8.3 joerg 595: movl $KERNBASE,%edx
596: addl _C_LABEL(tablesize),%edx
1.1 fvdl 597: addl %esi,%edx
598: movl %edx,_C_LABEL(atdevbase)
599:
600: /* Set up bootstrap stack. */
1.48.8.3 joerg 601: leal (PROC0_STK_OFF+KERNBASE)(%esi),%eax
1.40 yamt 602: movl %eax,_C_LABEL(proc0uarea)
603: leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp
604: movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3
1.1 fvdl 605: xorl %ebp,%ebp # mark end of frames
606:
1.37 jmmv 607: #if defined(MULTIBOOT)
608: /* It is now safe to parse the Multiboot information structure
609: * we saved before from C code. Note that we cannot delay its
610: * parsing any more because initgdt (called below) needs to make
611: * use of this information. */
612: call _C_LABEL(multiboot_post_reloc)
613: #endif
614:
1.1 fvdl 615: subl $NGDT*8, %esp # space for temporary gdt
616: pushl %esp
617: call _C_LABEL(initgdt)
618: addl $4,%esp
1.30 junyoung 619:
1.48.8.3 joerg 620: movl _C_LABEL(tablesize),%eax
1.1 fvdl 621: addl %esi,%eax # skip past stack and page tables
622:
623: pushl %eax
624: call _C_LABEL(init386) # wire 386 chip for unix operation
625: addl $4+NGDT*8,%esp # pop temporary gdt
626:
627: #ifdef SAFARI_FIFO_HACK
628: movb $5,%al
629: movw $0x37b,%dx
630: outb %al,%dx
631: movw $0x37f,%dx
632: inb %dx,%al
633: movb %al,%cl
634:
635: orb $1,%cl
636:
637: movb $5,%al
638: movw $0x37b,%dx
639: outb %al,%dx
640: movw $0x37f,%dx
641: movb %cl,%al
642: outb %al,%dx
643: #endif /* SAFARI_FIFO_HACK */
644:
645: call _C_LABEL(main)
646:
647: /*
1.48 yamt 648: * void lwp_trampoline(void);
649: *
1.1 fvdl 650: * This is a trampoline function pushed onto the stack of a newly created
651: * process in order to do some additional setup. The trampoline is entered by
652: * cpu_switch()ing to the process, so we abuse the callee-saved registers used
653: * by cpu_switch() to store the information about the stub to call.
654: * NOTE: This function does not have a normal calling sequence!
655: */
1.48 yamt 656: NENTRY(lwp_trampoline)
657: pushl %ebp
658: xorl %ebp,%ebp
659: pushl %eax
660: call _C_LABEL(lwp_startup)
661: addl $8,%esp
1.1 fvdl 662: pushl %ebx
663: call *%esi
664: addl $4,%esp
1.48.8.3 joerg 665: DO_DEFERRED_SWITCH
1.1 fvdl 666: INTRFASTEXIT
667: /* NOTREACHED */
668:
669: /*
1.48 yamt 670: * sigcode()
671: *
672: * Signal trampoline; copied to top of user stack. Used only for
673: * compatibility with old releases of NetBSD.
1.1 fvdl 674: */
675: NENTRY(sigcode)
676: /*
677: * Handler has returned here as if we called it. The sigcontext
678: * is on the stack after the 3 args "we" pushed.
679: */
680: leal 12(%esp),%eax # get pointer to sigcontext
681: movl %eax,4(%esp) # put it in the argument slot
682: # fake return address already there
1.17 christos 683: movl $SYS_compat_16___sigreturn14,%eax
1.1 fvdl 684: int $0x80 # enter kernel with args on stack
685: movl $SYS_exit,%eax
686: int $0x80 # exit if sigreturn fails
687: .globl _C_LABEL(esigcode)
688: _C_LABEL(esigcode):
689:
690: /*
1.48 yamt 691: * int setjmp(label_t *)
692: *
693: * Used primarily by DDB.
1.1 fvdl 694: */
695: ENTRY(setjmp)
696: movl 4(%esp),%eax
697: movl %ebx,(%eax) # save ebx
698: movl %esp,4(%eax) # save esp
699: movl %ebp,8(%eax) # save ebp
700: movl %esi,12(%eax) # save esi
701: movl %edi,16(%eax) # save edi
702: movl (%esp),%edx # get rta
703: movl %edx,20(%eax) # save eip
1.48 yamt 704: xorl %eax,%eax # return 0
1.1 fvdl 705: ret
706:
1.48 yamt 707: /*
708: * int longjmp(label_t *)
709: *
710: * Used primarily by DDB.
711: */
1.1 fvdl 712: ENTRY(longjmp)
713: movl 4(%esp),%eax
714: movl (%eax),%ebx # restore ebx
715: movl 4(%eax),%esp # restore esp
716: movl 8(%eax),%ebp # restore ebp
717: movl 12(%eax),%esi # restore esi
718: movl 16(%eax),%edi # restore edi
719: movl 20(%eax),%edx # get rta
720: movl %edx,(%esp) # put in return frame
1.48 yamt 721: movl $1,%eax # return 1
1.1 fvdl 722: ret
723:
724: /*
1.48 yamt 725: * struct lwp *cpu_switchto(struct lwp *oldlwp, struct newlwp)
1.30 junyoung 726: *
1.48 yamt 727: * 1. if (oldlwp != NULL), save its context.
728: * 2. then, restore context of newlwp.
729: *
730: * Note that the stack frame layout is known to "struct switchframe" in
731: * <machine/frame.h> and to the code in cpu_lwp_fork() which initializes
1.5 thorpej 732: * it for a new lwp.
1.1 fvdl 733: */
1.48 yamt 734: ENTRY(cpu_switchto)
1.1 fvdl 735: pushl %ebx
736: pushl %esi
737: pushl %edi
738:
1.48 yamt 739: movl 16(%esp),%esi # oldlwp
740: movl 20(%esp),%edi # newlwp
741: testl %esi,%esi
742: jz 1f
1.1 fvdl 743:
1.48 yamt 744: /* Save old context. */
745: movl L_ADDR(%esi),%eax
746: movl %esp,PCB_ESP(%eax)
747: movl %ebp,PCB_EBP(%eax)
748:
749: /* Switch to newlwp's stack. */
750: 1: movl L_ADDR(%edi),%ebx
751: movl PCB_EBP(%ebx),%ebp
752: movl PCB_ESP(%ebx),%esp
1.1 fvdl 753:
1.48 yamt 754: /* Switch TSS. Reset "task busy" flag before loading. */
1.26 yamt 755: movl %cr3,%eax
1.48 yamt 756: movl %eax,PCB_CR3(%ebx) # for TSS gates
1.48.8.4 joerg 757: movl CPUVAR(GDT),%ecx
1.48 yamt 758: movl L_MD_TSS_SEL(%edi),%edx
1.48.8.4 joerg 759: andl $~0x0200,4(%ecx,%edx, 1)
1.1 fvdl 760: ltr %dx
761:
1.48 yamt 762: /* Set curlwp. */
763: movl %edi,CPUVAR(CURLWP)
1.1 fvdl 764:
765: /* Don't bother with the rest if switching to a system process. */
1.48 yamt 766: testl $LW_SYSTEM,L_FLAG(%edi)
767: jnz 4f
1.1 fvdl 768:
1.48.8.4 joerg 769: /* Restore thread-private %fs/%gs descriptors. */
770: movl PCB_FSD(%ebx), %eax
771: movl PCB_FSD+4(%ebx), %edx
772: movl %eax, (GUFS_SEL*8)(%ecx)
773: movl %edx, (GUFS_SEL*8+4)(%ecx)
774: movl PCB_GSD(%ebx), %eax
775: movl PCB_GSD+4(%ebx), %edx
776: movl %eax, (GUGS_SEL*8)(%ecx)
777: movl %edx, (GUGS_SEL*8+4)(%ecx)
778:
1.48.8.5 joerg 779: /* Is this process using RAS (restartable atomic sequences)? */
780: movl L_PROC(%edi),%eax
781: cmpl $0,P_RASLIST(%eax)
782: jne 5f
783:
1.48 yamt 784: /*
785: * Restore cr0 (including FPU state). Raise the IPL to IPL_IPI.
786: * FPU IPIs can alter the LWP's saved cr0. Dropping the priority
787: * is deferred until mi_switch(), when cpu_switchto() returns.
788: */
789: 2: movl $IPL_IPI,CPUVAR(ILEVEL)
790: movl PCB_CR0(%ebx),%ecx
791: movl %cr0,%edx
1.1 fvdl 792:
1.30 junyoung 793: /*
1.22 wiz 794: * If our floating point registers are on a different CPU,
1.48 yamt 795: * set CR0_TS so we'll trap rather than reuse bogus state.
1.1 fvdl 796: */
1.48 yamt 797: movl PCB_FPCPU(%ebx),%eax
798: cmpl CPUVAR(SELF),%eax
799: je 3f
1.1 fvdl 800: orl $CR0_TS,%ecx
1.48 yamt 801:
802: /* Reloading CR0 is very expensive - avoid if possible. */
803: 3: cmpl %edx,%ecx
804: je 4f
1.1 fvdl 805: movl %ecx,%cr0
806:
1.48 yamt 807: /* Return to the new LWP, returning 'oldlwp' in %eax. */
808: 4: movl %esi,%eax
1.1 fvdl 809: popl %edi
810: popl %esi
811: popl %ebx
812: ret
1.20 dsl 813:
1.48 yamt 814: /* Check for restartable atomic sequences (RAS). */
815: 5: movl L_MD_REGS(%edi),%ecx
816: pushl TF_EIP(%ecx)
1.20 dsl 817: pushl %eax
818: call _C_LABEL(ras_lookup)
819: addl $8,%esp
820: cmpl $-1,%eax
1.48 yamt 821: je 2b
1.48.8.1 jmcneill 822: movl L_MD_REGS(%edi),%ecx
823: movl %eax,TF_EIP(%ecx)
1.48 yamt 824: jmp 2b
1.1 fvdl 825:
826: /*
827: * void savectx(struct pcb *pcb);
1.48 yamt 828: *
1.1 fvdl 829: * Update pcb, saving current processor state.
830: */
831: ENTRY(savectx)
1.47 skrll 832: movl 4(%esp),%edx # edx = pcb
1.1 fvdl 833: movl %esp,PCB_ESP(%edx)
834: movl %ebp,PCB_EBP(%edx)
835: ret
836:
837: /*
1.48 yamt 838: * osyscall()
839: *
1.1 fvdl 840: * Old call gate entry for syscall
841: */
842: IDTVEC(osyscall)
1.48 yamt 843: pushfl # set eflags in trap frame
1.1 fvdl 844: popl 8(%esp)
845: pushl $7 # size of instruction for restart
846: jmp syscall1
847:
848: /*
1.48 yamt 849: * syscall()
850: *
1.1 fvdl 851: * Trap gate entry for syscall
852: */
853: IDTVEC(syscall)
854: pushl $2 # size of instruction for restart
855: syscall1:
856: pushl $T_ASTFLT # trap # for doing ASTs
857: INTRENTRY
858:
859: #ifdef DIAGNOSTIC
1.24 yamt 860: cmpl $0, CPUVAR(WANT_PMAPLOAD)
861: jz 1f
862: pushl $6f
863: call _C_LABEL(printf)
864: addl $4, %esp
865: 1:
1.1 fvdl 866: movl CPUVAR(ILEVEL),%ebx
867: testl %ebx,%ebx
868: jz 1f
869: pushl $5f
870: call _C_LABEL(printf)
871: addl $4,%esp
872: #ifdef DDB
873: int $3
874: #endif
1.30 junyoung 875: 1:
1.1 fvdl 876: #endif /* DIAGNOSTIC */
1.5 thorpej 877: movl CPUVAR(CURLWP),%edx
878: movl %esp,L_MD_REGS(%edx) # save pointer to frame
879: movl L_PROC(%edx),%edx
1.15 fvdl 880: pushl %esp
1.1 fvdl 881: call *P_MD_SYSCALL(%edx) # get pointer to syscall() function
1.15 fvdl 882: addl $4,%esp
1.27 yamt 883: .Lsyscall_checkast:
1.24 yamt 884: /* Check for ASTs on exit to user mode. */
1.1 fvdl 885: cli
1.5 thorpej 886: CHECK_ASTPENDING(%eax)
1.1 fvdl 887: je 1f
888: /* Always returning to user mode here. */
1.5 thorpej 889: CLEAR_ASTPENDING(%eax)
1.1 fvdl 890: sti
891: /* Pushed T_ASTFLT into tf_trapno on entry. */
1.15 fvdl 892: pushl %esp
1.1 fvdl 893: call _C_LABEL(trap)
1.15 fvdl 894: addl $4,%esp
1.27 yamt 895: jmp .Lsyscall_checkast /* re-check ASTs */
1.48.8.3 joerg 896: 1: CHECK_DEFERRED_SWITCH
1.24 yamt 897: jnz 9f
1.1 fvdl 898: #ifndef DIAGNOSTIC
1.24 yamt 899: INTRFASTEXIT
1.1 fvdl 900: #else /* DIAGNOSTIC */
1.24 yamt 901: cmpl $IPL_NONE,CPUVAR(ILEVEL)
1.1 fvdl 902: jne 3f
903: INTRFASTEXIT
904: 3: sti
905: pushl $4f
906: call _C_LABEL(printf)
907: addl $4,%esp
908: #ifdef DDB
909: int $3
910: #endif /* DDB */
911: movl $IPL_NONE,CPUVAR(ILEVEL)
1.48.8.3 joerg 912: jmp .Lsyscall_checkast
1.1 fvdl 913: 4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n"
1.30 junyoung 914: 5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n"
915: 6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n"
1.1 fvdl 916: #endif /* DIAGNOSTIC */
1.24 yamt 917: 9: sti
918: call _C_LABEL(pmap_load)
1.27 yamt 919: jmp .Lsyscall_checkast /* re-check ASTs */
1.1 fvdl 920:
921: #if NNPX > 0
922: /*
923: * Special interrupt handlers. Someday intr0-intr15 will be used to count
924: * interrupts. We'll still need a special exception 16 handler. The busy
925: * latch stuff in probintr() can be moved to npxprobe().
926: */
927:
1.48 yamt 928: /*
929: * void probeintr(void)
930: */
1.1 fvdl 931: NENTRY(probeintr)
932: ss
933: incl _C_LABEL(npx_intrs_while_probing)
934: pushl %eax
935: movb $0x20,%al # EOI (asm in strings loses cpp features)
936: outb %al,$0xa0 # IO_ICU2
937: outb %al,$0x20 # IO_ICU1
938: movb $0,%al
939: outb %al,$0xf0 # clear BUSY# latch
940: popl %eax
941: iret
942:
1.48 yamt 943: /*
944: * void probetrap(void)
945: */
1.1 fvdl 946: NENTRY(probetrap)
947: ss
948: incl _C_LABEL(npx_traps_while_probing)
949: fnclex
950: iret
951:
1.48 yamt 952: /*
953: * int npx586bug1(int a, int b)
954: */
1.1 fvdl 955: NENTRY(npx586bug1)
956: fildl 4(%esp) # x
957: fildl 8(%esp) # y
958: fld %st(1)
959: fdiv %st(1),%st # x/y
960: fmulp %st,%st(1) # (x/y)*y
961: fsubrp %st,%st(1) # x-(x/y)*y
962: pushl $0
963: fistpl (%esp)
964: popl %eax
965: ret
966: #endif /* NNPX > 0 */
1.48.8.1 jmcneill 967:
968: /*
969: * void sse2_zero_page(void *pg)
970: *
971: * Zero a page without polluting the cache.
972: */
973: ENTRY(sse2_zero_page)
974: pushl %ebp
975: movl %esp,%ebp
976: movl 8(%esp), %edx
977: movl $PAGE_SIZE, %ecx
978: xorl %eax, %eax
979: .align 16
980: 1:
981: movnti %eax, 0(%edx)
982: movnti %eax, 4(%edx)
983: movnti %eax, 8(%edx)
984: movnti %eax, 12(%edx)
985: movnti %eax, 16(%edx)
986: movnti %eax, 20(%edx)
987: movnti %eax, 24(%edx)
988: movnti %eax, 28(%edx)
989: subl $32, %ecx
990: leal 32(%edx), %edx
991: jnz 1b
992: sfence
993: pop %ebp
994: ret
995:
996: /*
997: * void sse2_copy_page(void *src, void *dst)
998: *
999: * Copy a page without polluting the cache.
1000: */
1001: ENTRY(sse2_copy_page)
1002: pushl %ebp
1003: pushl %ebx
1004: pushl %esi
1005: pushl %edi
1006: movl 20(%esp), %esi
1007: movl 24(%esp), %edi
1008: movl $PAGE_SIZE, %ebp
1009: .align 16
1010: 1:
1011: movl 0(%esi), %eax
1012: movl 4(%esi), %ebx
1013: movl 8(%esi), %ecx
1014: movl 12(%esi), %edx
1015: movnti %eax, 0(%edi)
1016: movnti %ebx, 4(%edi)
1017: movnti %ecx, 8(%edi)
1018: movnti %edx, 12(%edi)
1019: subl $16, %ebp
1020: leal 16(%esi), %esi
1021: leal 16(%edi), %edi
1022: jnz 1b
1023: sfence
1024: popl %edi
1025: popl %esi
1026: popl %ebx
1027: popl %ebp
1028: ret
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