Annotation of src/sys/arch/i386/i386/locore.S, Revision 1.48.4.2
1.48.4.2! skrll 1: /* $NetBSD: locore.S,v 1.48.4.1 2007/08/17 06:50:51 skrll Exp $ */
1.1 fvdl 2:
3: /*-
1.48 yamt 4: * Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc.
1.1 fvdl 5: * All rights reserved.
6: *
7: * This code is derived from software contributed to The NetBSD Foundation
8: * by Charles M. Hannum.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by the NetBSD
21: * Foundation, Inc. and its contributors.
22: * 4. Neither the name of The NetBSD Foundation nor the names of its
23: * contributors may be used to endorse or promote products derived
24: * from this software without specific prior written permission.
25: *
26: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36: * POSSIBILITY OF SUCH DAMAGE.
37: */
38:
39: /*-
40: * Copyright (c) 1990 The Regents of the University of California.
41: * All rights reserved.
42: *
43: * This code is derived from software contributed to Berkeley by
44: * William Jolitz.
45: *
46: * Redistribution and use in source and binary forms, with or without
47: * modification, are permitted provided that the following conditions
48: * are met:
49: * 1. Redistributions of source code must retain the above copyright
50: * notice, this list of conditions and the following disclaimer.
51: * 2. Redistributions in binary form must reproduce the above copyright
52: * notice, this list of conditions and the following disclaimer in the
53: * documentation and/or other materials provided with the distribution.
1.12 agc 54: * 3. Neither the name of the University nor the names of its contributors
1.1 fvdl 55: * may be used to endorse or promote products derived from this software
56: * without specific prior written permission.
57: *
58: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
59: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
60: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
61: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
62: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
63: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
64: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
66: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
67: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68: * SUCH DAMAGE.
69: *
70: * @(#)locore.s 7.3 (Berkeley) 5/13/91
71: */
72:
1.18 christos 73: #include "opt_compat_oldboot.h"
1.1 fvdl 74: #include "opt_cputype.h"
75: #include "opt_ddb.h"
76: #include "opt_realmem.h"
1.18 christos 77: #include "opt_vm86.h"
1.1 fvdl 78:
79: #include "npx.h"
80: #include "assym.h"
81: #include "lapic.h"
82: #include "ioapic.h"
1.8 fvdl 83: #include "ksyms.h"
1.1 fvdl 84:
85: #include <sys/errno.h>
86: #include <sys/syscall.h>
87:
88: #include <machine/cputypes.h>
89: #include <machine/segments.h>
90: #include <machine/specialreg.h>
91: #include <machine/trap.h>
92: #include <machine/i82489reg.h>
1.37 jmmv 93: #include <machine/multiboot.h>
1.1 fvdl 94: #include <machine/asm.h>
1.48 yamt 95: #include <machine/frameasm.h>
96: #include <machine/i82489reg.h>
1.1 fvdl 97:
98: /* XXX temporary kluge; these should not be here */
99: /* Get definitions for IOM_BEGIN, IOM_END, and IOM_SIZE */
100: #include <dev/isa/isareg.h>
101:
102: /*
103: * Initialization
104: */
105: .data
106:
107: .globl _C_LABEL(cpu)
1.38 jmmv 108: .globl _C_LABEL(esym)
109: .globl _C_LABEL(atdevbase)
1.40 yamt 110: .globl _C_LABEL(proc0uarea),_C_LABEL(PDPpaddr)
1.1 fvdl 111: .globl _C_LABEL(gdt)
112: .globl _C_LABEL(idt)
1.30 junyoung 113: .globl _C_LABEL(lapic_tpr)
114:
1.1 fvdl 115: #if NLAPIC > 0
116: #ifdef __ELF__
1.7 thorpej 117: .align PAGE_SIZE
1.1 fvdl 118: #else
119: .align 12
120: #endif
121: .globl _C_LABEL(local_apic), _C_LABEL(lapic_id)
122: _C_LABEL(local_apic):
123: .space LAPIC_ID
1.30 junyoung 124: _C_LABEL(lapic_id):
1.1 fvdl 125: .long 0x00000000
126: .space LAPIC_TPRI-(LAPIC_ID+4)
1.30 junyoung 127: _C_LABEL(lapic_tpr):
1.1 fvdl 128: .space LAPIC_PPRI-LAPIC_TPRI
1.30 junyoung 129: _C_LABEL(lapic_ppr):
1.1 fvdl 130: .space LAPIC_ISR-LAPIC_PPRI
131: _C_LABEL(lapic_isr):
1.7 thorpej 132: .space PAGE_SIZE-LAPIC_ISR
1.1 fvdl 133: #else
1.30 junyoung 134: _C_LABEL(lapic_tpr):
1.1 fvdl 135: .long 0
136: #endif
1.30 junyoung 137:
1.48 yamt 138: _C_LABEL(cpu): .long 0 # are we 80486, Pentium, or..
1.1 fvdl 139: _C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual
1.40 yamt 140: _C_LABEL(proc0uarea): .long 0
1.31 junyoung 141: _C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm
1.30 junyoung 142:
1.1 fvdl 143: .space 512
144: tmpstk:
145:
146:
1.35 yamt 147: #define _RELOC(x) ((x) - KERNBASE)
1.1 fvdl 148: #define RELOC(x) _RELOC(_C_LABEL(x))
149:
150: .text
151: .globl _C_LABEL(kernel_text)
152: .set _C_LABEL(kernel_text),KERNTEXTOFF
153:
154: .globl start
155: start: movw $0x1234,0x472 # warm boot
156:
1.37 jmmv 157: #if defined(MULTIBOOT)
158: jmp 1f
159:
160: .align 4
161: .globl Multiboot_Header
162: _C_LABEL(Multiboot_Header):
1.44 jmmv 163: #define MULTIBOOT_HEADER_FLAGS (MULTIBOOT_HEADER_WANT_MEMORY)
1.37 jmmv 164: .long MULTIBOOT_HEADER_MAGIC
165: .long MULTIBOOT_HEADER_FLAGS
166: .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
167:
168: 1:
169: /* Check if we are being executed by a Multiboot-compliant boot
170: * loader. */
171: cmpl $MULTIBOOT_INFO_MAGIC,%eax
172: jne 1f
173:
1.43 mrg 174: /*
175: * Indeed, a multiboot-compliant boot loader executed us. We copy
1.37 jmmv 176: * the received Multiboot information structure into kernel's data
177: * space to process it later -- after we are relocated. It will
1.43 mrg 178: * be safer to run complex C code than doing it at this point.
179: */
1.37 jmmv 180: pushl %ebx # Address of Multiboot information
181: call _C_LABEL(multiboot_pre_reloc)
182: addl $4,%esp
1.38 jmmv 183: jmp 2f
1.37 jmmv 184: #endif
185:
186: 1:
1.1 fvdl 187: /*
1.38 jmmv 188: * At this point, we know that a NetBSD-specific boot loader
189: * booted this kernel. The stack carries the following parameters:
1.41 jmmv 190: * (boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem),
1.38 jmmv 191: * 4 bytes each.
1.1 fvdl 192: */
1.38 jmmv 193: addl $4,%esp # Discard return address to boot loader
194: call _C_LABEL(native_loader)
195: addl $24,%esp
1.1 fvdl 196:
197: 2:
198: /* First, reset the PSL. */
199: pushl $PSL_MBO
200: popfl
201:
202: /* Clear segment registers; always null in proc0. */
203: xorl %eax,%eax
204: movw %ax,%fs
205: movw %ax,%gs
206: decl %eax
207: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
208:
209: /* Find out our CPU type. */
210:
211: try386: /* Try to toggle alignment check flag; does not exist on 386. */
212: pushfl
213: popl %eax
214: movl %eax,%ecx
215: orl $PSL_AC,%eax
216: pushl %eax
217: popfl
218: pushfl
219: popl %eax
220: xorl %ecx,%eax
221: andl $PSL_AC,%eax
222: pushl %ecx
223: popfl
224:
225: testl %eax,%eax
226: jnz try486
227:
228: /*
229: * Try the test of a NexGen CPU -- ZF will not change on a DIV
230: * instruction on a NexGen, it will on an i386. Documented in
231: * Nx586 Processor Recognition Application Note, NexGen, Inc.
232: */
233: movl $0x5555,%eax
234: xorl %edx,%edx
235: movl $2,%ecx
236: divl %ecx
237: jnz is386
238:
239: isnx586:
240: /*
241: * Don't try cpuid, as Nx586s reportedly don't support the
242: * PSL_ID bit.
243: */
244: movl $CPU_NX586,RELOC(cpu)
245: jmp 2f
246:
247: is386:
248: movl $CPU_386,RELOC(cpu)
249: jmp 2f
250:
251: try486: /* Try to toggle identification flag; does not exist on early 486s. */
252: pushfl
253: popl %eax
254: movl %eax,%ecx
255: xorl $PSL_ID,%eax
256: pushl %eax
257: popfl
258: pushfl
259: popl %eax
260: xorl %ecx,%eax
261: andl $PSL_ID,%eax
262: pushl %ecx
263: popfl
264:
265: testl %eax,%eax
266: jnz try586
267: is486: movl $CPU_486,RELOC(cpu)
268: /*
269: * Check Cyrix CPU
270: * Cyrix CPUs do not change the undefined flags following
271: * execution of the divide instruction which divides 5 by 2.
272: *
273: * Note: CPUID is enabled on M2, so it passes another way.
274: */
275: pushfl
276: movl $0x5555, %eax
277: xorl %edx, %edx
278: movl $2, %ecx
279: clc
280: divl %ecx
281: jnc trycyrix486
282: popfl
283: jmp 2f
284: trycyrix486:
285: movl $CPU_6x86,RELOC(cpu) # set CPU type
286: /*
287: * Check for Cyrix 486 CPU by seeing if the flags change during a
288: * divide. This is documented in the Cx486SLC/e SMM Programmer's
289: * Guide.
290: */
291: xorl %edx,%edx
292: cmpl %edx,%edx # set flags to known state
293: pushfl
294: popl %ecx # store flags in ecx
295: movl $-1,%eax
296: movl $4,%ebx
297: divl %ebx # do a long division
298: pushfl
299: popl %eax
300: xorl %ecx,%eax # are the flags different?
301: testl $0x8d5,%eax # only check C|PF|AF|Z|N|V
302: jne 2f # yes; must be Cyrix 6x86 CPU
303: movl $CPU_486DLC,RELOC(cpu) # set CPU type
304:
305: #ifndef CYRIX_CACHE_WORKS
306: /* Disable caching of the ISA hole only. */
307: invd
308: movb $CCR0,%al # Configuration Register index (CCR0)
309: outb %al,$0x22
310: inb $0x23,%al
311: orb $(CCR0_NC1|CCR0_BARB),%al
312: movb %al,%ah
313: movb $CCR0,%al
314: outb %al,$0x22
315: movb %ah,%al
316: outb %al,$0x23
317: invd
318: #else /* CYRIX_CACHE_WORKS */
319: /* Set cache parameters */
320: invd # Start with guaranteed clean cache
321: movb $CCR0,%al # Configuration Register index (CCR0)
322: outb %al,$0x22
323: inb $0x23,%al
324: andb $~CCR0_NC0,%al
325: #ifndef CYRIX_CACHE_REALLY_WORKS
326: orb $(CCR0_NC1|CCR0_BARB),%al
327: #else
328: orb $CCR0_NC1,%al
329: #endif
330: movb %al,%ah
331: movb $CCR0,%al
332: outb %al,$0x22
333: movb %ah,%al
334: outb %al,$0x23
335: /* clear non-cacheable region 1 */
336: movb $(NCR1+2),%al
337: outb %al,$0x22
338: movb $NCR_SIZE_0K,%al
339: outb %al,$0x23
340: /* clear non-cacheable region 2 */
341: movb $(NCR2+2),%al
342: outb %al,$0x22
343: movb $NCR_SIZE_0K,%al
344: outb %al,$0x23
345: /* clear non-cacheable region 3 */
346: movb $(NCR3+2),%al
347: outb %al,$0x22
348: movb $NCR_SIZE_0K,%al
349: outb %al,$0x23
350: /* clear non-cacheable region 4 */
351: movb $(NCR4+2),%al
352: outb %al,$0x22
353: movb $NCR_SIZE_0K,%al
354: outb %al,$0x23
355: /* enable caching in CR0 */
356: movl %cr0,%eax
357: andl $~(CR0_CD|CR0_NW),%eax
358: movl %eax,%cr0
359: invd
360: #endif /* CYRIX_CACHE_WORKS */
361:
362: jmp 2f
363:
364: try586: /* Use the `cpuid' instruction. */
365: xorl %eax,%eax
366: cpuid
367: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
368:
369: 2:
370: /*
371: * Finished with old stack; load new %esp now instead of later so we
372: * can trace this code without having to worry about the trace trap
373: * clobbering the memory test or the zeroing of the bss+bootstrap page
374: * tables.
375: *
376: * The boot program should check:
377: * text+data <= &stack_variable - more_space_for_stack
378: * text+data+bss+pad+space_for_page_tables <= end_of_memory
379: * Oops, the gdt is in the carcass of the boot program so clearing
380: * the rest of memory is still not possible.
381: */
382: movl $_RELOC(tmpstk),%esp # bootstrap stack end location
383:
384: /*
385: * Virtual address space of kernel:
386: *
1.30 junyoung 387: * text | data | bss | [syms] | page dir | proc0 kstack
1.1 fvdl 388: * 0 1 2 3
389: */
1.7 thorpej 390: #define PROC0PDIR ((0) * PAGE_SIZE)
391: #define PROC0STACK ((1) * PAGE_SIZE)
392: #define SYSMAP ((1+UPAGES) * PAGE_SIZE)
393: #define TABLESIZE ((1+UPAGES) * PAGE_SIZE) /* + nkpde * PAGE_SIZE */
1.1 fvdl 394:
395: /* Find end of kernel image. */
396: movl $RELOC(end),%edi
1.8 fvdl 397: #if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE)
1.1 fvdl 398: /* Save the symbols (if loaded). */
399: movl RELOC(esym),%eax
400: testl %eax,%eax
401: jz 1f
1.35 yamt 402: subl $KERNBASE,%eax
1.1 fvdl 403: movl %eax,%edi
404: 1:
405: #endif
406:
407: /* Calculate where to start the bootstrap tables. */
408: movl %edi,%esi # edi = esym ? esym : end
409: addl $PGOFSET,%esi # page align up
410: andl $~PGOFSET,%esi
411:
412: /*
413: * Calculate the size of the kernel page table directory, and
1.29 mycroft 414: * how many entries it will have. Adjust nkpde to the actual
415: * kernel size automatically. Account for the bootstrap tables,
416: * round up, and add an extra 4MB.
1.1 fvdl 417: */
1.29 mycroft 418: leal TABLESIZE+NBPD+PDOFSET(%edi),%eax
419: shrl $PDSHIFT,%eax
1.1 fvdl 420: movl RELOC(nkpde),%ecx # get nkpde
1.29 mycroft 421: cmpl %ecx,%eax
422: jb 1f
423: movl %eax,%ecx
424: 1: cmpl $NKPTP_MIN,%ecx # larger than min?
1.1 fvdl 425: jge 1f
426: movl $NKPTP_MIN,%ecx # set at min
427: jmp 2f
428: 1: cmpl $NKPTP_MAX,%ecx # larger than max?
429: jle 2f
430: movl $NKPTP_MAX,%ecx
1.29 mycroft 431: 2: movl %ecx,RELOC(nkpde)
1.1 fvdl 432:
433: /* Clear memory for bootstrap tables. */
434: shll $PGSHIFT,%ecx
435: addl $TABLESIZE,%ecx
436: addl %esi,%ecx # end of tables
437: subl %edi,%ecx # size of tables
438: shrl $2,%ecx
439: xorl %eax,%eax
440: cld
441: rep
442: stosl
443:
444: /*
445: * fillkpt
446: * eax = pte (page frame | control | status)
447: * ebx = page table address
448: * ecx = number of pages to map
449: */
450: #define fillkpt \
451: 1: movl %eax,(%ebx) ; \
1.7 thorpej 452: addl $PAGE_SIZE,%eax ; /* increment physical address */ \
1.1 fvdl 453: addl $4,%ebx ; /* next pte */ \
454: loop 1b ;
455:
456: /*
457: * Build initial page tables.
458: */
459: /* Calculate end of text segment, rounded to a page. */
460: leal (RELOC(etext)+PGOFSET),%edx
461: andl $~PGOFSET,%edx
1.30 junyoung 462:
1.1 fvdl 463: /* Skip over the first 1MB. */
464: movl $_RELOC(KERNTEXTOFF),%eax
465: movl %eax,%ecx
466: shrl $PGSHIFT,%ecx
467: leal (SYSMAP)(%esi,%ecx,4),%ebx
468:
469: /* Map the kernel text read-only. */
470: movl %edx,%ecx
471: subl %eax,%ecx
472: shrl $PGSHIFT,%ecx
473: orl $(PG_V|PG_KR),%eax
474: fillkpt
475:
476: /* Map the data, BSS, and bootstrap tables read-write. */
477: leal (PG_V|PG_KW)(%edx),%eax
478: movl RELOC(nkpde),%ecx
479: shll $PGSHIFT,%ecx
480: addl $TABLESIZE,%ecx
481: addl %esi,%ecx # end of tables
482: subl %edx,%ecx # subtract end of text
483: shrl $PGSHIFT,%ecx
484: fillkpt
485:
486: /* Map ISA I/O memory. */
487: movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax # having these bits set
488: movl $(IOM_SIZE>>PGSHIFT),%ecx # for this many pte s,
489: fillkpt
490:
491: /*
492: * Construct a page table directory.
493: */
494: /* Install PDEs for temporary double map of kernel. */
495: movl RELOC(nkpde),%ecx # for this many pde s,
496: leal (PROC0PDIR+0*4)(%esi),%ebx # which is where temp maps!
497: leal (SYSMAP+PG_V|PG_KW)(%esi),%eax # pte for KPT in proc 0,
498: fillkpt
499:
500: /* Map kernel PDEs. */
501: movl RELOC(nkpde),%ecx # for this many pde s,
502: leal (PROC0PDIR+PDSLOT_KERN*4)(%esi),%ebx # kernel pde offset
503: leal (SYSMAP+PG_V|PG_KW)(%esi),%eax # pte for KPT in proc 0,
504: fillkpt
505:
506: /* Install a PDE recursively mapping page directory as a page table! */
507: leal (PROC0PDIR+PG_V|PG_KW)(%esi),%eax # pte for ptd
508: movl %eax,(PROC0PDIR+PDSLOT_PTE*4)(%esi) # recursive PD slot
509:
1.31 junyoung 510: /* Save phys. addr of PDP, for libkvm. */
511: movl %esi,RELOC(PDPpaddr)
1.1 fvdl 512:
513: /* Load base of page directory and enable mapping. */
514: movl %esi,%eax # phys address of ptd in proc 0
515: movl %eax,%cr3 # load ptd addr into mmu
516: movl %cr0,%eax # get control word
517: # enable paging & NPX emulation
518: orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_EM|CR0_MP),%eax
519: movl %eax,%cr0 # and let's page NOW!
520:
521: pushl $begin # jump to high mem
522: ret
523:
524: begin:
1.35 yamt 525: /* Now running relocated at KERNBASE. Remove double mapping. */
1.1 fvdl 526: movl _C_LABEL(nkpde),%ecx # for this many pde s,
527: leal (PROC0PDIR+0*4)(%esi),%ebx # which is where temp maps!
1.35 yamt 528: addl $(KERNBASE), %ebx # now use relocated address
1.1 fvdl 529: 1: movl $0,(%ebx)
530: addl $4,%ebx # next pde
531: loop 1b
532:
533: /* Relocate atdevbase. */
534: movl _C_LABEL(nkpde),%edx
535: shll $PGSHIFT,%edx
1.35 yamt 536: addl $(TABLESIZE+KERNBASE),%edx
1.1 fvdl 537: addl %esi,%edx
538: movl %edx,_C_LABEL(atdevbase)
539:
540: /* Set up bootstrap stack. */
1.35 yamt 541: leal (PROC0STACK+KERNBASE)(%esi),%eax
1.40 yamt 542: movl %eax,_C_LABEL(proc0uarea)
543: leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp
544: movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3
1.1 fvdl 545: xorl %ebp,%ebp # mark end of frames
546:
1.37 jmmv 547: #if defined(MULTIBOOT)
548: /* It is now safe to parse the Multiboot information structure
549: * we saved before from C code. Note that we cannot delay its
550: * parsing any more because initgdt (called below) needs to make
551: * use of this information. */
552: call _C_LABEL(multiboot_post_reloc)
553: #endif
554:
1.1 fvdl 555: subl $NGDT*8, %esp # space for temporary gdt
556: pushl %esp
557: call _C_LABEL(initgdt)
558: addl $4,%esp
1.30 junyoung 559:
1.1 fvdl 560: movl _C_LABEL(nkpde),%eax
561: shll $PGSHIFT,%eax
562: addl $TABLESIZE,%eax
563: addl %esi,%eax # skip past stack and page tables
564:
565: pushl %eax
566: call _C_LABEL(init386) # wire 386 chip for unix operation
567: addl $4+NGDT*8,%esp # pop temporary gdt
568:
569: #ifdef SAFARI_FIFO_HACK
570: movb $5,%al
571: movw $0x37b,%dx
572: outb %al,%dx
573: movw $0x37f,%dx
574: inb %dx,%al
575: movb %al,%cl
576:
577: orb $1,%cl
578:
579: movb $5,%al
580: movw $0x37b,%dx
581: outb %al,%dx
582: movw $0x37f,%dx
583: movb %cl,%al
584: outb %al,%dx
585: #endif /* SAFARI_FIFO_HACK */
586:
587: call _C_LABEL(main)
588:
589: /*
1.48 yamt 590: * void lwp_trampoline(void);
591: *
1.1 fvdl 592: * This is a trampoline function pushed onto the stack of a newly created
593: * process in order to do some additional setup. The trampoline is entered by
594: * cpu_switch()ing to the process, so we abuse the callee-saved registers used
595: * by cpu_switch() to store the information about the stub to call.
596: * NOTE: This function does not have a normal calling sequence!
597: */
1.48 yamt 598: NENTRY(lwp_trampoline)
599: pushl %ebp
600: xorl %ebp,%ebp
601: pushl %eax
602: call _C_LABEL(lwp_startup)
603: addl $8,%esp
1.1 fvdl 604: pushl %ebx
605: call *%esi
606: addl $4,%esp
1.24 yamt 607: DO_DEFERRED_SWITCH(%eax)
1.1 fvdl 608: INTRFASTEXIT
609: /* NOTREACHED */
610:
611: /*
1.48 yamt 612: * sigcode()
613: *
614: * Signal trampoline; copied to top of user stack. Used only for
615: * compatibility with old releases of NetBSD.
1.1 fvdl 616: */
617: NENTRY(sigcode)
618: /*
619: * Handler has returned here as if we called it. The sigcontext
620: * is on the stack after the 3 args "we" pushed.
621: */
622: leal 12(%esp),%eax # get pointer to sigcontext
623: movl %eax,4(%esp) # put it in the argument slot
624: # fake return address already there
1.17 christos 625: movl $SYS_compat_16___sigreturn14,%eax
1.1 fvdl 626: int $0x80 # enter kernel with args on stack
627: movl $SYS_exit,%eax
628: int $0x80 # exit if sigreturn fails
629: .globl _C_LABEL(esigcode)
630: _C_LABEL(esigcode):
631:
632: /*
633: * void lgdt(struct region_descriptor *rdp);
1.48 yamt 634: *
1.1 fvdl 635: * Load a new GDT pointer (and do any necessary cleanup).
636: * XXX It's somewhat questionable whether reloading all the segment registers
637: * is necessary, since the actual descriptor data is not changed except by
638: * process creation and exit, both of which clean up via task switches. OTOH,
639: * this only happens at run time when the GDT is resized.
640: */
641: NENTRY(lgdt)
642: /* Reload the descriptor table. */
643: movl 4(%esp),%eax
644: lgdt (%eax)
645: /* Flush the prefetch queue. */
646: jmp 1f
647: nop
648: 1: /* Reload "stale" selectors. */
649: movl $GSEL(GDATA_SEL, SEL_KPL),%eax
650: movw %ax,%ds
651: movw %ax,%es
652: movw %ax,%gs
653: movw %ax,%ss
654: movl $GSEL(GCPU_SEL, SEL_KPL),%eax
655: movw %ax,%fs
656: /* Reload code selector by doing intersegment return. */
657: popl %eax
658: pushl $GSEL(GCODE_SEL, SEL_KPL)
659: pushl %eax
660: lret
661:
1.48 yamt 662: /*
663: * void x86_flush()
664: *
665: * Flush instruction pipelines by doing an intersegment (far) return.
666: */
1.45 ad 667: NENTRY(x86_flush)
668: popl %eax
669: pushl $GSEL(GCODE_SEL, SEL_KPL)
670: pushl %eax
671: lret
672:
1.1 fvdl 673: /*
1.48 yamt 674: * int setjmp(label_t *)
675: *
676: * Used primarily by DDB.
1.1 fvdl 677: */
678: ENTRY(setjmp)
679: movl 4(%esp),%eax
680: movl %ebx,(%eax) # save ebx
681: movl %esp,4(%eax) # save esp
682: movl %ebp,8(%eax) # save ebp
683: movl %esi,12(%eax) # save esi
684: movl %edi,16(%eax) # save edi
685: movl (%esp),%edx # get rta
686: movl %edx,20(%eax) # save eip
1.48 yamt 687: xorl %eax,%eax # return 0
1.1 fvdl 688: ret
689:
1.48 yamt 690: /*
691: * int longjmp(label_t *)
692: *
693: * Used primarily by DDB.
694: */
1.1 fvdl 695: ENTRY(longjmp)
696: movl 4(%esp),%eax
697: movl (%eax),%ebx # restore ebx
698: movl 4(%eax),%esp # restore esp
699: movl 8(%eax),%ebp # restore ebp
700: movl 12(%eax),%esi # restore esi
701: movl 16(%eax),%edi # restore edi
702: movl 20(%eax),%edx # get rta
703: movl %edx,(%esp) # put in return frame
1.48 yamt 704: movl $1,%eax # return 1
1.1 fvdl 705: ret
706:
707: /*
1.48 yamt 708: * struct lwp *cpu_switchto(struct lwp *oldlwp, struct newlwp)
1.30 junyoung 709: *
1.48 yamt 710: * 1. if (oldlwp != NULL), save its context.
711: * 2. then, restore context of newlwp.
712: *
713: * Note that the stack frame layout is known to "struct switchframe" in
714: * <machine/frame.h> and to the code in cpu_lwp_fork() which initializes
1.5 thorpej 715: * it for a new lwp.
1.1 fvdl 716: */
1.48 yamt 717: ENTRY(cpu_switchto)
1.1 fvdl 718: pushl %ebx
719: pushl %esi
720: pushl %edi
721:
1.48 yamt 722: movl 16(%esp),%esi # oldlwp
723: movl 20(%esp),%edi # newlwp
724: testl %esi,%esi
725: jz 1f
1.1 fvdl 726:
1.48 yamt 727: /* Save old context. */
728: movl L_ADDR(%esi),%eax
729: movl %esp,PCB_ESP(%eax)
730: movl %ebp,PCB_EBP(%eax)
731:
732: /* Switch to newlwp's stack. */
733: 1: movl L_ADDR(%edi),%ebx
734: movl PCB_EBP(%ebx),%ebp
735: movl PCB_ESP(%ebx),%esp
1.1 fvdl 736:
1.48 yamt 737: /* Switch TSS. Reset "task busy" flag before loading. */
1.26 yamt 738: movl %cr3,%eax
1.48 yamt 739: movl %eax,PCB_CR3(%ebx) # for TSS gates
1.1 fvdl 740: movl CPUVAR(GDT),%eax
1.48 yamt 741: movl L_MD_TSS_SEL(%edi),%edx
742: andl $~0x0200,4(%eax,%edx, 1)
1.1 fvdl 743: ltr %dx
744:
1.48 yamt 745: /* Set curlwp. */
746: movl %edi,CPUVAR(CURLWP)
1.1 fvdl 747:
748: /* Don't bother with the rest if switching to a system process. */
1.48 yamt 749: testl $LW_SYSTEM,L_FLAG(%edi)
750: jnz 4f
1.1 fvdl 751:
1.48 yamt 752: /* Is this process using RAS (restartable atomic sequences)? */
753: movl L_PROC(%edi),%eax
754: cmpl $0,P_RASLIST(%eax)
755: jne 5f
756:
757: /*
758: * Restore cr0 (including FPU state). Raise the IPL to IPL_IPI.
759: * FPU IPIs can alter the LWP's saved cr0. Dropping the priority
760: * is deferred until mi_switch(), when cpu_switchto() returns.
761: */
762: 2: movl $IPL_IPI,CPUVAR(ILEVEL)
763: movl PCB_CR0(%ebx),%ecx
764: movl %cr0,%edx
1.1 fvdl 765:
1.30 junyoung 766: /*
1.22 wiz 767: * If our floating point registers are on a different CPU,
1.48 yamt 768: * set CR0_TS so we'll trap rather than reuse bogus state.
1.1 fvdl 769: */
1.48 yamt 770: movl PCB_FPCPU(%ebx),%eax
771: cmpl CPUVAR(SELF),%eax
772: je 3f
1.1 fvdl 773: orl $CR0_TS,%ecx
1.48 yamt 774:
775: /* Reloading CR0 is very expensive - avoid if possible. */
776: 3: cmpl %edx,%ecx
777: je 4f
1.1 fvdl 778: movl %ecx,%cr0
779:
1.48 yamt 780: /* Return to the new LWP, returning 'oldlwp' in %eax. */
781: 4: movl %esi,%eax
1.1 fvdl 782: popl %edi
783: popl %esi
784: popl %ebx
785: ret
1.20 dsl 786:
1.48 yamt 787: /* Check for restartable atomic sequences (RAS). */
788: 5: movl L_MD_REGS(%edi),%ecx
789: pushl TF_EIP(%ecx)
1.20 dsl 790: pushl %eax
791: call _C_LABEL(ras_lookup)
792: addl $8,%esp
793: cmpl $-1,%eax
1.48 yamt 794: je 2b
1.48.4.1 skrll 795: movl L_MD_REGS(%edi),%ecx
796: movl %eax,TF_EIP(%ecx)
1.48 yamt 797: jmp 2b
1.1 fvdl 798:
799: /*
800: * void savectx(struct pcb *pcb);
1.48 yamt 801: *
1.1 fvdl 802: * Update pcb, saving current processor state.
803: */
804: ENTRY(savectx)
1.47 skrll 805: movl 4(%esp),%edx # edx = pcb
1.1 fvdl 806: movl %esp,PCB_ESP(%edx)
807: movl %ebp,PCB_EBP(%edx)
808: ret
809:
810: /*
1.48 yamt 811: * osyscall()
812: *
1.1 fvdl 813: * Old call gate entry for syscall
814: */
815: IDTVEC(osyscall)
1.48 yamt 816: pushfl # set eflags in trap frame
1.1 fvdl 817: popl 8(%esp)
818: pushl $7 # size of instruction for restart
819: jmp syscall1
820:
821: /*
1.48 yamt 822: * syscall()
823: *
1.1 fvdl 824: * Trap gate entry for syscall
825: */
826: IDTVEC(syscall)
827: pushl $2 # size of instruction for restart
828: syscall1:
829: pushl $T_ASTFLT # trap # for doing ASTs
830: INTRENTRY
831:
832: #ifdef DIAGNOSTIC
1.24 yamt 833: cmpl $0, CPUVAR(WANT_PMAPLOAD)
834: jz 1f
835: pushl $6f
836: call _C_LABEL(printf)
837: addl $4, %esp
838: 1:
1.1 fvdl 839: movl CPUVAR(ILEVEL),%ebx
840: testl %ebx,%ebx
841: jz 1f
842: pushl $5f
843: call _C_LABEL(printf)
844: addl $4,%esp
845: #ifdef DDB
846: int $3
847: #endif
1.30 junyoung 848: 1:
1.1 fvdl 849: #endif /* DIAGNOSTIC */
1.5 thorpej 850: movl CPUVAR(CURLWP),%edx
851: movl %esp,L_MD_REGS(%edx) # save pointer to frame
852: movl L_PROC(%edx),%edx
1.15 fvdl 853: pushl %esp
1.1 fvdl 854: call *P_MD_SYSCALL(%edx) # get pointer to syscall() function
1.15 fvdl 855: addl $4,%esp
1.27 yamt 856: .Lsyscall_checkast:
1.24 yamt 857: /* Check for ASTs on exit to user mode. */
1.1 fvdl 858: cli
1.5 thorpej 859: CHECK_ASTPENDING(%eax)
1.1 fvdl 860: je 1f
861: /* Always returning to user mode here. */
1.5 thorpej 862: CLEAR_ASTPENDING(%eax)
1.1 fvdl 863: sti
864: /* Pushed T_ASTFLT into tf_trapno on entry. */
1.15 fvdl 865: pushl %esp
1.1 fvdl 866: call _C_LABEL(trap)
1.15 fvdl 867: addl $4,%esp
1.27 yamt 868: jmp .Lsyscall_checkast /* re-check ASTs */
1.24 yamt 869: 1: CHECK_DEFERRED_SWITCH(%eax)
870: jnz 9f
1.1 fvdl 871: #ifndef DIAGNOSTIC
1.24 yamt 872: INTRFASTEXIT
1.1 fvdl 873: #else /* DIAGNOSTIC */
1.24 yamt 874: cmpl $IPL_NONE,CPUVAR(ILEVEL)
1.1 fvdl 875: jne 3f
876: INTRFASTEXIT
877: 3: sti
878: pushl $4f
879: call _C_LABEL(printf)
880: addl $4,%esp
881: #ifdef DDB
882: int $3
883: #endif /* DDB */
884: movl $IPL_NONE,CPUVAR(ILEVEL)
885: jmp 2b
886: 4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n"
1.30 junyoung 887: 5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n"
888: 6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n"
1.1 fvdl 889: #endif /* DIAGNOSTIC */
1.24 yamt 890: 9: sti
891: call _C_LABEL(pmap_load)
1.27 yamt 892: jmp .Lsyscall_checkast /* re-check ASTs */
1.1 fvdl 893:
894: #if NNPX > 0
895: /*
896: * Special interrupt handlers. Someday intr0-intr15 will be used to count
897: * interrupts. We'll still need a special exception 16 handler. The busy
898: * latch stuff in probintr() can be moved to npxprobe().
899: */
900:
1.48 yamt 901: /*
902: * void probeintr(void)
903: */
1.1 fvdl 904: NENTRY(probeintr)
905: ss
906: incl _C_LABEL(npx_intrs_while_probing)
907: pushl %eax
908: movb $0x20,%al # EOI (asm in strings loses cpp features)
909: outb %al,$0xa0 # IO_ICU2
910: outb %al,$0x20 # IO_ICU1
911: movb $0,%al
912: outb %al,$0xf0 # clear BUSY# latch
913: popl %eax
914: iret
915:
1.48 yamt 916: /*
917: * void probetrap(void)
918: */
1.1 fvdl 919: NENTRY(probetrap)
920: ss
921: incl _C_LABEL(npx_traps_while_probing)
922: fnclex
923: iret
924:
1.48 yamt 925: /*
926: * int npx586bug1(int a, int b)
927: */
1.1 fvdl 928: NENTRY(npx586bug1)
929: fildl 4(%esp) # x
930: fildl 8(%esp) # y
931: fld %st(1)
932: fdiv %st(1),%st # x/y
933: fmulp %st,%st(1) # (x/y)*y
934: fsubrp %st,%st(1) # x-(x/y)*y
935: pushl $0
936: fistpl (%esp)
937: popl %eax
938: ret
939: #endif /* NNPX > 0 */
1.48.4.2! skrll 940:
! 941: /*
! 942: * void sse2_zero_page(void *pg)
! 943: *
! 944: * Zero a page without polluting the cache.
! 945: */
! 946: ENTRY(sse2_zero_page)
! 947: pushl %ebp
! 948: movl %esp,%ebp
! 949: movl 8(%esp), %edx
! 950: movl $PAGE_SIZE, %ecx
! 951: xorl %eax, %eax
! 952: .align 16
! 953: 1:
! 954: movnti %eax, 0(%edx)
! 955: movnti %eax, 4(%edx)
! 956: movnti %eax, 8(%edx)
! 957: movnti %eax, 12(%edx)
! 958: movnti %eax, 16(%edx)
! 959: movnti %eax, 20(%edx)
! 960: movnti %eax, 24(%edx)
! 961: movnti %eax, 28(%edx)
! 962: subl $32, %ecx
! 963: leal 32(%edx), %edx
! 964: jnz 1b
! 965: sfence
! 966: pop %ebp
! 967: ret
! 968:
! 969: /*
! 970: * void sse2_copy_page(void *src, void *dst)
! 971: *
! 972: * Copy a page without polluting the cache.
! 973: */
! 974: ENTRY(sse2_copy_page)
! 975: pushl %ebp
! 976: pushl %ebx
! 977: pushl %esi
! 978: pushl %edi
! 979: movl 20(%esp), %esi
! 980: movl 24(%esp), %edi
! 981: movl $PAGE_SIZE, %ebp
! 982: .align 16
! 983: 1:
! 984: movl 0(%esi), %eax
! 985: movl 4(%esi), %ebx
! 986: movl 8(%esi), %ecx
! 987: movl 12(%esi), %edx
! 988: movnti %eax, 0(%edi)
! 989: movnti %ebx, 4(%edi)
! 990: movnti %ecx, 8(%edi)
! 991: movnti %edx, 12(%edi)
! 992: subl $16, %ebp
! 993: leal 16(%esi), %esi
! 994: leal 16(%edi), %edi
! 995: jnz 1b
! 996: sfence
! 997: popl %edi
! 998: popl %esi
! 999: popl %ebx
! 1000: popl %ebp
! 1001: ret
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