Annotation of src/sys/arch/i386/i386/locore.S, Revision 1.45.2.3
1.45.2.3! yamt 1: /* $NetBSD: locore.S,v 1.45.2.2 2007/02/17 15:19:52 yamt Exp $ */
1.1 fvdl 2:
3: /*-
1.32 mycroft 4: * Copyright (c) 1998, 2000, 2004 The NetBSD Foundation, Inc.
1.1 fvdl 5: * All rights reserved.
6: *
7: * This code is derived from software contributed to The NetBSD Foundation
8: * by Charles M. Hannum.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: * 3. All advertising materials mentioning features or use of this software
19: * must display the following acknowledgement:
20: * This product includes software developed by the NetBSD
21: * Foundation, Inc. and its contributors.
22: * 4. Neither the name of The NetBSD Foundation nor the names of its
23: * contributors may be used to endorse or promote products derived
24: * from this software without specific prior written permission.
25: *
26: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36: * POSSIBILITY OF SUCH DAMAGE.
37: */
38:
39: /*-
40: * Copyright (c) 1990 The Regents of the University of California.
41: * All rights reserved.
42: *
43: * This code is derived from software contributed to Berkeley by
44: * William Jolitz.
45: *
46: * Redistribution and use in source and binary forms, with or without
47: * modification, are permitted provided that the following conditions
48: * are met:
49: * 1. Redistributions of source code must retain the above copyright
50: * notice, this list of conditions and the following disclaimer.
51: * 2. Redistributions in binary form must reproduce the above copyright
52: * notice, this list of conditions and the following disclaimer in the
53: * documentation and/or other materials provided with the distribution.
1.12 agc 54: * 3. Neither the name of the University nor the names of its contributors
1.1 fvdl 55: * may be used to endorse or promote products derived from this software
56: * without specific prior written permission.
57: *
58: * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
59: * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
60: * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
61: * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
62: * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
63: * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
64: * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
65: * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
66: * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
67: * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
68: * SUCH DAMAGE.
69: *
70: * @(#)locore.s 7.3 (Berkeley) 5/13/91
71: */
72:
1.18 christos 73: #include "opt_compat_netbsd.h"
74: #include "opt_compat_oldboot.h"
1.1 fvdl 75: #include "opt_cputype.h"
76: #include "opt_ddb.h"
77: #include "opt_ipkdb.h"
1.18 christos 78: #include "opt_lockdebug.h"
1.1 fvdl 79: #include "opt_multiprocessor.h"
80: #include "opt_realmem.h"
1.18 christos 81: #include "opt_user_ldt.h"
82: #include "opt_vm86.h"
1.1 fvdl 83:
84: #include "npx.h"
85: #include "assym.h"
86: #include "lapic.h"
87: #include "ioapic.h"
1.8 fvdl 88: #include "ksyms.h"
1.1 fvdl 89:
90: #include <sys/errno.h>
91: #include <sys/syscall.h>
92:
93: #include <machine/cputypes.h>
94: #include <machine/segments.h>
95: #include <machine/specialreg.h>
96: #include <machine/trap.h>
97:
98: #if NLAPIC > 0
99: #include <machine/i82489reg.h>
100: #endif
101:
1.37 jmmv 102: #include <machine/multiboot.h>
103:
1.1 fvdl 104: /* LINTSTUB: include <sys/types.h> */
105: /* LINTSTUB: include <machine/cpu.h> */
106: /* LINTSTUB: include <sys/systm.h> */
107:
108: #include <machine/asm.h>
109:
110: /* XXX temporary kluge; these should not be here */
111: /* Get definitions for IOM_BEGIN, IOM_END, and IOM_SIZE */
112: #include <dev/isa/isareg.h>
113:
114:
115: /* Disallow old names for REALBASEMEM */
116: #ifdef BIOSBASEMEM
117: #error BIOSBASEMEM option deprecated; use REALBASEMEM only if memory size reported by latest boot block is incorrect
118: #endif
119:
120: /* Disallow old names for REALEXTMEM */
121: #ifdef EXTMEM_SIZE
122: #error EXTMEM_SIZE option deprecated; use REALEXTMEM only if memory size reported by latest boot block is incorrect
123: #endif
124: #ifdef BIOSEXTMEM
125: #error BIOSEXTMEM option deprecated; use REALEXTMEM only if memory size reported by latest boot block is incorrect
126: #endif
127:
128: #include <machine/frameasm.h>
129:
130:
131: #ifdef MULTIPROCESSOR
132: #include <machine/i82489reg.h>
133: #endif
1.30 junyoung 134:
1.1 fvdl 135: /*
136: * Initialization
137: */
138: .data
139:
140: .globl _C_LABEL(cpu)
1.38 jmmv 141: .globl _C_LABEL(esym)
142: .globl _C_LABEL(atdevbase)
1.40 yamt 143: .globl _C_LABEL(proc0uarea),_C_LABEL(PDPpaddr)
1.1 fvdl 144: .globl _C_LABEL(gdt)
145: #ifdef I586_CPU
146: .globl _C_LABEL(idt)
147: #endif
1.30 junyoung 148: .globl _C_LABEL(lapic_tpr)
149:
1.1 fvdl 150: #if NLAPIC > 0
151: #ifdef __ELF__
1.7 thorpej 152: .align PAGE_SIZE
1.1 fvdl 153: #else
154: .align 12
155: #endif
156: .globl _C_LABEL(local_apic), _C_LABEL(lapic_id)
157: _C_LABEL(local_apic):
158: .space LAPIC_ID
1.30 junyoung 159: _C_LABEL(lapic_id):
1.1 fvdl 160: .long 0x00000000
161: .space LAPIC_TPRI-(LAPIC_ID+4)
1.30 junyoung 162: _C_LABEL(lapic_tpr):
1.1 fvdl 163: .space LAPIC_PPRI-LAPIC_TPRI
1.30 junyoung 164: _C_LABEL(lapic_ppr):
1.1 fvdl 165: .space LAPIC_ISR-LAPIC_PPRI
166: _C_LABEL(lapic_isr):
1.7 thorpej 167: .space PAGE_SIZE-LAPIC_ISR
1.1 fvdl 168: #else
1.30 junyoung 169: _C_LABEL(lapic_tpr):
1.1 fvdl 170: .long 0
171: #endif
1.30 junyoung 172:
1.1 fvdl 173:
174: _C_LABEL(cpu): .long 0 # are we 386, 386sx, or 486,
175: # or Pentium, or..
176: _C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual
1.40 yamt 177: _C_LABEL(proc0uarea): .long 0
1.31 junyoung 178: _C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm
1.30 junyoung 179:
1.1 fvdl 180: .space 512
181: tmpstk:
182:
183:
1.35 yamt 184: #define _RELOC(x) ((x) - KERNBASE)
1.1 fvdl 185: #define RELOC(x) _RELOC(_C_LABEL(x))
186:
187: .text
188: .globl _C_LABEL(kernel_text)
189: .set _C_LABEL(kernel_text),KERNTEXTOFF
190:
191: .globl start
192: start: movw $0x1234,0x472 # warm boot
193:
1.37 jmmv 194: #if defined(MULTIBOOT)
195: jmp 1f
196:
197: .align 4
198: .globl Multiboot_Header
199: _C_LABEL(Multiboot_Header):
1.44 jmmv 200: #define MULTIBOOT_HEADER_FLAGS (MULTIBOOT_HEADER_WANT_MEMORY)
1.37 jmmv 201: .long MULTIBOOT_HEADER_MAGIC
202: .long MULTIBOOT_HEADER_FLAGS
203: .long -(MULTIBOOT_HEADER_MAGIC + MULTIBOOT_HEADER_FLAGS)
204:
205: 1:
206: /* Check if we are being executed by a Multiboot-compliant boot
207: * loader. */
208: cmpl $MULTIBOOT_INFO_MAGIC,%eax
209: jne 1f
210:
1.43 mrg 211: /*
212: * Indeed, a multiboot-compliant boot loader executed us. We copy
1.37 jmmv 213: * the received Multiboot information structure into kernel's data
214: * space to process it later -- after we are relocated. It will
1.43 mrg 215: * be safer to run complex C code than doing it at this point.
216: */
1.37 jmmv 217: pushl %ebx # Address of Multiboot information
218: call _C_LABEL(multiboot_pre_reloc)
219: addl $4,%esp
1.38 jmmv 220: jmp 2f
1.37 jmmv 221: #endif
222:
223: 1:
1.1 fvdl 224: /*
1.38 jmmv 225: * At this point, we know that a NetBSD-specific boot loader
226: * booted this kernel. The stack carries the following parameters:
1.41 jmmv 227: * (boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem),
1.38 jmmv 228: * 4 bytes each.
1.1 fvdl 229: */
1.38 jmmv 230: addl $4,%esp # Discard return address to boot loader
231: call _C_LABEL(native_loader)
232: addl $24,%esp
1.1 fvdl 233:
234: 2:
235: /* First, reset the PSL. */
236: pushl $PSL_MBO
237: popfl
238:
239: /* Clear segment registers; always null in proc0. */
240: xorl %eax,%eax
241: movw %ax,%fs
242: movw %ax,%gs
243: decl %eax
244: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
245:
246: /* Find out our CPU type. */
247:
248: try386: /* Try to toggle alignment check flag; does not exist on 386. */
249: pushfl
250: popl %eax
251: movl %eax,%ecx
252: orl $PSL_AC,%eax
253: pushl %eax
254: popfl
255: pushfl
256: popl %eax
257: xorl %ecx,%eax
258: andl $PSL_AC,%eax
259: pushl %ecx
260: popfl
261:
262: testl %eax,%eax
263: jnz try486
264:
265: /*
266: * Try the test of a NexGen CPU -- ZF will not change on a DIV
267: * instruction on a NexGen, it will on an i386. Documented in
268: * Nx586 Processor Recognition Application Note, NexGen, Inc.
269: */
270: movl $0x5555,%eax
271: xorl %edx,%edx
272: movl $2,%ecx
273: divl %ecx
274: jnz is386
275:
276: isnx586:
277: /*
278: * Don't try cpuid, as Nx586s reportedly don't support the
279: * PSL_ID bit.
280: */
281: movl $CPU_NX586,RELOC(cpu)
282: jmp 2f
283:
284: is386:
285: movl $CPU_386,RELOC(cpu)
286: jmp 2f
287:
288: try486: /* Try to toggle identification flag; does not exist on early 486s. */
289: pushfl
290: popl %eax
291: movl %eax,%ecx
292: xorl $PSL_ID,%eax
293: pushl %eax
294: popfl
295: pushfl
296: popl %eax
297: xorl %ecx,%eax
298: andl $PSL_ID,%eax
299: pushl %ecx
300: popfl
301:
302: testl %eax,%eax
303: jnz try586
304: is486: movl $CPU_486,RELOC(cpu)
305: /*
306: * Check Cyrix CPU
307: * Cyrix CPUs do not change the undefined flags following
308: * execution of the divide instruction which divides 5 by 2.
309: *
310: * Note: CPUID is enabled on M2, so it passes another way.
311: */
312: pushfl
313: movl $0x5555, %eax
314: xorl %edx, %edx
315: movl $2, %ecx
316: clc
317: divl %ecx
318: jnc trycyrix486
319: popfl
320: jmp 2f
321: trycyrix486:
322: movl $CPU_6x86,RELOC(cpu) # set CPU type
323: /*
324: * Check for Cyrix 486 CPU by seeing if the flags change during a
325: * divide. This is documented in the Cx486SLC/e SMM Programmer's
326: * Guide.
327: */
328: xorl %edx,%edx
329: cmpl %edx,%edx # set flags to known state
330: pushfl
331: popl %ecx # store flags in ecx
332: movl $-1,%eax
333: movl $4,%ebx
334: divl %ebx # do a long division
335: pushfl
336: popl %eax
337: xorl %ecx,%eax # are the flags different?
338: testl $0x8d5,%eax # only check C|PF|AF|Z|N|V
339: jne 2f # yes; must be Cyrix 6x86 CPU
340: movl $CPU_486DLC,RELOC(cpu) # set CPU type
341:
342: #ifndef CYRIX_CACHE_WORKS
343: /* Disable caching of the ISA hole only. */
344: invd
345: movb $CCR0,%al # Configuration Register index (CCR0)
346: outb %al,$0x22
347: inb $0x23,%al
348: orb $(CCR0_NC1|CCR0_BARB),%al
349: movb %al,%ah
350: movb $CCR0,%al
351: outb %al,$0x22
352: movb %ah,%al
353: outb %al,$0x23
354: invd
355: #else /* CYRIX_CACHE_WORKS */
356: /* Set cache parameters */
357: invd # Start with guaranteed clean cache
358: movb $CCR0,%al # Configuration Register index (CCR0)
359: outb %al,$0x22
360: inb $0x23,%al
361: andb $~CCR0_NC0,%al
362: #ifndef CYRIX_CACHE_REALLY_WORKS
363: orb $(CCR0_NC1|CCR0_BARB),%al
364: #else
365: orb $CCR0_NC1,%al
366: #endif
367: movb %al,%ah
368: movb $CCR0,%al
369: outb %al,$0x22
370: movb %ah,%al
371: outb %al,$0x23
372: /* clear non-cacheable region 1 */
373: movb $(NCR1+2),%al
374: outb %al,$0x22
375: movb $NCR_SIZE_0K,%al
376: outb %al,$0x23
377: /* clear non-cacheable region 2 */
378: movb $(NCR2+2),%al
379: outb %al,$0x22
380: movb $NCR_SIZE_0K,%al
381: outb %al,$0x23
382: /* clear non-cacheable region 3 */
383: movb $(NCR3+2),%al
384: outb %al,$0x22
385: movb $NCR_SIZE_0K,%al
386: outb %al,$0x23
387: /* clear non-cacheable region 4 */
388: movb $(NCR4+2),%al
389: outb %al,$0x22
390: movb $NCR_SIZE_0K,%al
391: outb %al,$0x23
392: /* enable caching in CR0 */
393: movl %cr0,%eax
394: andl $~(CR0_CD|CR0_NW),%eax
395: movl %eax,%cr0
396: invd
397: #endif /* CYRIX_CACHE_WORKS */
398:
399: jmp 2f
400:
401: try586: /* Use the `cpuid' instruction. */
402: xorl %eax,%eax
403: cpuid
404: movl %eax,RELOC(cpu_info_primary)+CPU_INFO_LEVEL
405:
406: 2:
407: /*
408: * Finished with old stack; load new %esp now instead of later so we
409: * can trace this code without having to worry about the trace trap
410: * clobbering the memory test or the zeroing of the bss+bootstrap page
411: * tables.
412: *
413: * The boot program should check:
414: * text+data <= &stack_variable - more_space_for_stack
415: * text+data+bss+pad+space_for_page_tables <= end_of_memory
416: * Oops, the gdt is in the carcass of the boot program so clearing
417: * the rest of memory is still not possible.
418: */
419: movl $_RELOC(tmpstk),%esp # bootstrap stack end location
420:
421: /*
422: * Virtual address space of kernel:
423: *
1.30 junyoung 424: * text | data | bss | [syms] | page dir | proc0 kstack
1.1 fvdl 425: * 0 1 2 3
426: */
1.7 thorpej 427: #define PROC0PDIR ((0) * PAGE_SIZE)
428: #define PROC0STACK ((1) * PAGE_SIZE)
429: #define SYSMAP ((1+UPAGES) * PAGE_SIZE)
430: #define TABLESIZE ((1+UPAGES) * PAGE_SIZE) /* + nkpde * PAGE_SIZE */
1.1 fvdl 431:
432: /* Find end of kernel image. */
433: movl $RELOC(end),%edi
1.8 fvdl 434: #if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE)
1.1 fvdl 435: /* Save the symbols (if loaded). */
436: movl RELOC(esym),%eax
437: testl %eax,%eax
438: jz 1f
1.35 yamt 439: subl $KERNBASE,%eax
1.1 fvdl 440: movl %eax,%edi
441: 1:
442: #endif
443:
444: /* Calculate where to start the bootstrap tables. */
445: movl %edi,%esi # edi = esym ? esym : end
446: addl $PGOFSET,%esi # page align up
447: andl $~PGOFSET,%esi
448:
449: /*
450: * Calculate the size of the kernel page table directory, and
1.29 mycroft 451: * how many entries it will have. Adjust nkpde to the actual
452: * kernel size automatically. Account for the bootstrap tables,
453: * round up, and add an extra 4MB.
1.1 fvdl 454: */
1.29 mycroft 455: leal TABLESIZE+NBPD+PDOFSET(%edi),%eax
456: shrl $PDSHIFT,%eax
1.1 fvdl 457: movl RELOC(nkpde),%ecx # get nkpde
1.29 mycroft 458: cmpl %ecx,%eax
459: jb 1f
460: movl %eax,%ecx
461: 1: cmpl $NKPTP_MIN,%ecx # larger than min?
1.1 fvdl 462: jge 1f
463: movl $NKPTP_MIN,%ecx # set at min
464: jmp 2f
465: 1: cmpl $NKPTP_MAX,%ecx # larger than max?
466: jle 2f
467: movl $NKPTP_MAX,%ecx
1.29 mycroft 468: 2: movl %ecx,RELOC(nkpde)
1.1 fvdl 469:
470: /* Clear memory for bootstrap tables. */
471: shll $PGSHIFT,%ecx
472: addl $TABLESIZE,%ecx
473: addl %esi,%ecx # end of tables
474: subl %edi,%ecx # size of tables
475: shrl $2,%ecx
476: xorl %eax,%eax
477: cld
478: rep
479: stosl
480:
481: /*
482: * fillkpt
483: * eax = pte (page frame | control | status)
484: * ebx = page table address
485: * ecx = number of pages to map
486: */
487: #define fillkpt \
488: 1: movl %eax,(%ebx) ; \
1.7 thorpej 489: addl $PAGE_SIZE,%eax ; /* increment physical address */ \
1.1 fvdl 490: addl $4,%ebx ; /* next pte */ \
491: loop 1b ;
492:
493: /*
494: * Build initial page tables.
495: */
496: /* Calculate end of text segment, rounded to a page. */
497: leal (RELOC(etext)+PGOFSET),%edx
498: andl $~PGOFSET,%edx
1.30 junyoung 499:
1.1 fvdl 500: /* Skip over the first 1MB. */
501: movl $_RELOC(KERNTEXTOFF),%eax
502: movl %eax,%ecx
503: shrl $PGSHIFT,%ecx
504: leal (SYSMAP)(%esi,%ecx,4),%ebx
505:
506: /* Map the kernel text read-only. */
507: movl %edx,%ecx
508: subl %eax,%ecx
509: shrl $PGSHIFT,%ecx
510: orl $(PG_V|PG_KR),%eax
511: fillkpt
512:
513: /* Map the data, BSS, and bootstrap tables read-write. */
514: leal (PG_V|PG_KW)(%edx),%eax
515: movl RELOC(nkpde),%ecx
516: shll $PGSHIFT,%ecx
517: addl $TABLESIZE,%ecx
518: addl %esi,%ecx # end of tables
519: subl %edx,%ecx # subtract end of text
520: shrl $PGSHIFT,%ecx
521: fillkpt
522:
523: /* Map ISA I/O memory. */
524: movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax # having these bits set
525: movl $(IOM_SIZE>>PGSHIFT),%ecx # for this many pte s,
526: fillkpt
527:
528: /*
529: * Construct a page table directory.
530: */
531: /* Install PDEs for temporary double map of kernel. */
532: movl RELOC(nkpde),%ecx # for this many pde s,
533: leal (PROC0PDIR+0*4)(%esi),%ebx # which is where temp maps!
534: leal (SYSMAP+PG_V|PG_KW)(%esi),%eax # pte for KPT in proc 0,
535: fillkpt
536:
537: /* Map kernel PDEs. */
538: movl RELOC(nkpde),%ecx # for this many pde s,
539: leal (PROC0PDIR+PDSLOT_KERN*4)(%esi),%ebx # kernel pde offset
540: leal (SYSMAP+PG_V|PG_KW)(%esi),%eax # pte for KPT in proc 0,
541: fillkpt
542:
543: /* Install a PDE recursively mapping page directory as a page table! */
544: leal (PROC0PDIR+PG_V|PG_KW)(%esi),%eax # pte for ptd
545: movl %eax,(PROC0PDIR+PDSLOT_PTE*4)(%esi) # recursive PD slot
546:
1.31 junyoung 547: /* Save phys. addr of PDP, for libkvm. */
548: movl %esi,RELOC(PDPpaddr)
1.1 fvdl 549:
550: /* Load base of page directory and enable mapping. */
551: movl %esi,%eax # phys address of ptd in proc 0
552: movl %eax,%cr3 # load ptd addr into mmu
553: movl %cr0,%eax # get control word
554: # enable paging & NPX emulation
555: orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_EM|CR0_MP),%eax
556: movl %eax,%cr0 # and let's page NOW!
557:
558: pushl $begin # jump to high mem
559: ret
560:
561: begin:
1.35 yamt 562: /* Now running relocated at KERNBASE. Remove double mapping. */
1.1 fvdl 563: movl _C_LABEL(nkpde),%ecx # for this many pde s,
564: leal (PROC0PDIR+0*4)(%esi),%ebx # which is where temp maps!
1.35 yamt 565: addl $(KERNBASE), %ebx # now use relocated address
1.1 fvdl 566: 1: movl $0,(%ebx)
567: addl $4,%ebx # next pde
568: loop 1b
569:
570: /* Relocate atdevbase. */
571: movl _C_LABEL(nkpde),%edx
572: shll $PGSHIFT,%edx
1.35 yamt 573: addl $(TABLESIZE+KERNBASE),%edx
1.1 fvdl 574: addl %esi,%edx
575: movl %edx,_C_LABEL(atdevbase)
576:
577: /* Set up bootstrap stack. */
1.35 yamt 578: leal (PROC0STACK+KERNBASE)(%esi),%eax
1.40 yamt 579: movl %eax,_C_LABEL(proc0uarea)
580: leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp
581: movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3
1.1 fvdl 582: xorl %ebp,%ebp # mark end of frames
583:
1.37 jmmv 584: #if defined(MULTIBOOT)
585: /* It is now safe to parse the Multiboot information structure
586: * we saved before from C code. Note that we cannot delay its
587: * parsing any more because initgdt (called below) needs to make
588: * use of this information. */
589: call _C_LABEL(multiboot_post_reloc)
590: #endif
591:
1.1 fvdl 592: subl $NGDT*8, %esp # space for temporary gdt
593: pushl %esp
594: call _C_LABEL(initgdt)
595: addl $4,%esp
1.30 junyoung 596:
1.1 fvdl 597: movl _C_LABEL(nkpde),%eax
598: shll $PGSHIFT,%eax
599: addl $TABLESIZE,%eax
600: addl %esi,%eax # skip past stack and page tables
601:
602: pushl %eax
603: call _C_LABEL(init386) # wire 386 chip for unix operation
604: addl $4+NGDT*8,%esp # pop temporary gdt
605:
606: #ifdef SAFARI_FIFO_HACK
607: movb $5,%al
608: movw $0x37b,%dx
609: outb %al,%dx
610: movw $0x37f,%dx
611: inb %dx,%al
612: movb %al,%cl
613:
614: orb $1,%cl
615:
616: movb $5,%al
617: movw $0x37b,%dx
618: outb %al,%dx
619: movw $0x37f,%dx
620: movb %cl,%al
621: outb %al,%dx
622: #endif /* SAFARI_FIFO_HACK */
623:
624: call _C_LABEL(main)
625:
626: /*
1.45.2.1 yamt 627: * void lwp_trampoline(void);
1.1 fvdl 628: * This is a trampoline function pushed onto the stack of a newly created
629: * process in order to do some additional setup. The trampoline is entered by
630: * cpu_switch()ing to the process, so we abuse the callee-saved registers used
631: * by cpu_switch() to store the information about the stub to call.
632: * NOTE: This function does not have a normal calling sequence!
633: */
1.45.2.1 yamt 634: /* LINTSTUB: Func: void lwp_trampoline(void) */
635: NENTRY(lwp_trampoline)
636: pushl %ebp
637: xorl %ebp,%ebp
638: pushl %eax
639: call _C_LABEL(lwp_startup)
640: addl $8,%esp
1.1 fvdl 641: pushl %ebx
642: call *%esi
643: addl $4,%esp
1.24 yamt 644: DO_DEFERRED_SWITCH(%eax)
1.1 fvdl 645: INTRFASTEXIT
646: /* NOTREACHED */
647:
648: /*****************************************************************************/
1.16 christos 649: #ifdef COMPAT_16
1.1 fvdl 650: /*
651: * Signal trampoline; copied to top of user stack.
652: */
653: /* LINTSTUB: Var: char sigcode[1], esigcode[1]; */
654: NENTRY(sigcode)
655: /*
656: * Handler has returned here as if we called it. The sigcontext
657: * is on the stack after the 3 args "we" pushed.
658: */
659: leal 12(%esp),%eax # get pointer to sigcontext
660: movl %eax,4(%esp) # put it in the argument slot
661: # fake return address already there
1.17 christos 662: movl $SYS_compat_16___sigreturn14,%eax
1.1 fvdl 663: int $0x80 # enter kernel with args on stack
664: movl $SYS_exit,%eax
665: int $0x80 # exit if sigreturn fails
666: .globl _C_LABEL(esigcode)
667: _C_LABEL(esigcode):
1.16 christos 668: #endif
1.1 fvdl 669:
670: /*****************************************************************************/
671:
672: /*
673: * The following is i386-specific nonsense.
674: */
675:
676: /*
677: * void lgdt(struct region_descriptor *rdp);
678: * Load a new GDT pointer (and do any necessary cleanup).
679: * XXX It's somewhat questionable whether reloading all the segment registers
680: * is necessary, since the actual descriptor data is not changed except by
681: * process creation and exit, both of which clean up via task switches. OTOH,
682: * this only happens at run time when the GDT is resized.
683: */
684: /* LINTSTUB: Func: void lgdt(struct region_descriptor *rdp) */
685: NENTRY(lgdt)
686: /* Reload the descriptor table. */
687: movl 4(%esp),%eax
688: lgdt (%eax)
689: /* Flush the prefetch queue. */
690: jmp 1f
691: nop
692: 1: /* Reload "stale" selectors. */
693: movl $GSEL(GDATA_SEL, SEL_KPL),%eax
694: movw %ax,%ds
695: movw %ax,%es
696: movw %ax,%gs
697: movw %ax,%ss
698: movl $GSEL(GCPU_SEL, SEL_KPL),%eax
699: movw %ax,%fs
700: /* Reload code selector by doing intersegment return. */
701: popl %eax
702: pushl $GSEL(GCODE_SEL, SEL_KPL)
703: pushl %eax
704: lret
705:
1.45 ad 706: NENTRY(x86_flush)
707: /* Reload code selector by doing intersegment return. */
708: popl %eax
709: pushl $GSEL(GCODE_SEL, SEL_KPL)
710: pushl %eax
711: lret
712:
1.1 fvdl 713: /*****************************************************************************/
714:
715: /*
716: * These functions are primarily used by DDB.
717: */
718:
719: /* LINTSTUB: Func: int setjmp (label_t *l) */
720: ENTRY(setjmp)
721: movl 4(%esp),%eax
722: movl %ebx,(%eax) # save ebx
723: movl %esp,4(%eax) # save esp
724: movl %ebp,8(%eax) # save ebp
725: movl %esi,12(%eax) # save esi
726: movl %edi,16(%eax) # save edi
727: movl (%esp),%edx # get rta
728: movl %edx,20(%eax) # save eip
729: xorl %eax,%eax # return (0);
730: ret
731:
732: /* LINTSTUB: Func: void longjmp (label_t *l) */
733: ENTRY(longjmp)
734: movl 4(%esp),%eax
735: movl (%eax),%ebx # restore ebx
736: movl 4(%eax),%esp # restore esp
737: movl 8(%eax),%ebp # restore ebp
738: movl 12(%eax),%esi # restore esi
739: movl 16(%eax),%edi # restore edi
740: movl 20(%eax),%edx # get rta
741: movl %edx,(%esp) # put in return frame
742: xorl %eax,%eax # return (1);
743: incl %eax
744: ret
745:
746: /*****************************************************************************/
747:
748: .globl _C_LABEL(uvmexp),_C_LABEL(panic)
749:
750: #ifdef DIAGNOSTIC
751: NENTRY(switch_error)
752: pushl $1f
753: call _C_LABEL(panic)
754: /* NOTREACHED */
755: 1: .asciz "cpu_switch"
756: #endif /* DIAGNOSTIC */
757:
758: /*
1.45.2.1 yamt 759: * struct lwp *cpu_switchto(struct lwp *oldlwp, struct newlwp)
760: *
1.45.2.2 yamt 761: * 1. if (oldlwp != NULL), save its context.
1.45.2.1 yamt 762: * 2. then, restore context of newlwp.
1.30 junyoung 763: *
1.1 fvdl 764: * Note that the stack frame layout is known to "struct switchframe"
1.45.2.1 yamt 765: * in <machine/frame.h> and to the code in cpu_lwp_fork() which initializes
1.5 thorpej 766: * it for a new lwp.
1.1 fvdl 767: */
1.45.2.1 yamt 768: ENTRY(cpu_switchto)
1.1 fvdl 769: pushl %ebx
770: pushl %esi
771: pushl %edi
772:
1.45.2.1 yamt 773: movl 16(%esp),%esi # oldlwp
774: movl 20(%esp),%edi # newlwp
1.30 junyoung 775:
1.45.2.1 yamt 776: testl %esi,%esi
777: jz switch_skipsave
1.1 fvdl 778:
779: /*
1.45.2.1 yamt 780: * Save old context.
1.1 fvdl 781: */
782:
1.45.2.1 yamt 783: movl L_ADDR(%esi),%eax
784: movl %esp,PCB_ESP(%eax)
785: movl %ebp,PCB_EBP(%eax)
1.1 fvdl 786:
1.45.2.1 yamt 787: switch_skipsave:
1.1 fvdl 788:
1.30 junyoung 789: /*
1.45.2.1 yamt 790: * Switch to newlwp's stack.
1.1 fvdl 791: */
792:
1.45.2.1 yamt 793: movl L_ADDR(%edi),%ebx
794: movl PCB_EBP(%ebx),%ebp
795: movl PCB_ESP(%ebx),%esp
1.1 fvdl 796:
797: /*
1.45.2.1 yamt 798: * Restore the rest of newlwp's context.
1.1 fvdl 799: *
800: * Registers:
1.45.2.1 yamt 801: * %ebx - new pcb
1.5 thorpej 802: * %edi - new lwp
1.1 fvdl 803: */
804:
805: #if 0
806: /* Don't bother with the rest if switching to a system process. */
1.45.2.3! yamt 807: testl $LK_SYSTEM,L_FLAG(%edi);
1.1 fvdl 808: jnz switch_restored
809: #endif
810:
1.26 yamt 811: /* Switch TSS. Reset "task busy" flag before loading. */
812: movl %cr3,%eax
1.45.2.1 yamt 813: movl %eax,PCB_CR3(%ebx) /* for TSS gates */
814:
1.1 fvdl 815: #ifdef MULTIPROCESSOR
816: movl CPUVAR(GDT),%eax
1.30 junyoung 817: #else
1.1 fvdl 818: /* Load TSS info. */
819: movl _C_LABEL(gdt),%eax
820: #endif
1.5 thorpej 821: movl L_MD_TSS_SEL(%edi),%edx
1.1 fvdl 822:
823: andl $~0x0200,4(%eax,%edx, 1)
824: ltr %dx
825:
826: #if 0
827: switch_restored:
828: #endif
1.45.2.1 yamt 829:
830: movl $0,CPUVAR(RESCHED)
831:
1.1 fvdl 832: /* Restore cr0 (including FPU state). */
1.45.2.1 yamt 833: cli
834: movl PCB_CR0(%ebx),%ecx
1.1 fvdl 835: #ifdef MULTIPROCESSOR
1.30 junyoung 836: /*
1.22 wiz 837: * If our floating point registers are on a different CPU,
1.45.2.1 yamt 838: * set CR0_TS so we'll trap rather than reuse bogus state.
1.1 fvdl 839: */
1.45.2.1 yamt 840: movl PCB_FPCPU(%ebx),%eax
841: cmpl CPUVAR(SELF),%eax
1.1 fvdl 842: jz 1f
843: orl $CR0_TS,%ecx
1.30 junyoung 844: 1:
845: #endif
1.1 fvdl 846: movl %ecx,%cr0
847:
848: /* Interrupts are okay again. */
849: sti
850:
1.45.2.1 yamt 851: /*
852: * Check for restartable atomic sequences (RAS)
853: */
1.9 fvdl 854:
1.45.2.1 yamt 855: movl L_PROC(%edi),%ebx
856: cmpl $0,P_RASLIST(%ebx)
857: jne check_ras
1.30 junyoung 858:
1.45.2.1 yamt 859: switch_return:
860: movl %esi,%eax # return 'oldlwp'
1.1 fvdl 861: popl %edi
862: popl %esi
863: popl %ebx
864: ret
1.20 dsl 865:
1.45.2.1 yamt 866: check_ras:
1.20 dsl 867: movl L_MD_REGS(%edi),%ebx
868: movl TF_EIP(%ebx),%eax
869: pushl %eax
870: pushl %esi
871: call _C_LABEL(ras_lookup)
872: addl $8,%esp
873: cmpl $-1,%eax
1.45.2.1 yamt 874: je switch_return
1.20 dsl 875: movl %eax,TF_EIP(%ebx)
1.45.2.1 yamt 876: jmp switch_return
1.1 fvdl 877:
878: /*
879: * void savectx(struct pcb *pcb);
880: * Update pcb, saving current processor state.
881: */
882: /* LINTSTUB: Func: void savectx(struct pcb *pcb) */
883: ENTRY(savectx)
1.45.2.3! yamt 884: movl 4(%esp),%edx # edx = pcb
1.30 junyoung 885:
1.1 fvdl 886: /* Save stack pointers. */
887: movl %esp,PCB_ESP(%edx)
888: movl %ebp,PCB_EBP(%edx)
889:
890: ret
891:
892: /*
893: * Old call gate entry for syscall
894: */
895: /* LINTSTUB: Var: char Xosyscall[1]; */
896: IDTVEC(osyscall)
897: /* Set eflags in trap frame. */
898: pushfl
899: popl 8(%esp)
900: pushl $7 # size of instruction for restart
901: jmp syscall1
902:
903: /*
904: * Trap gate entry for syscall
905: */
906: /* LINTSTUB: Var: char Xsyscall[1]; */
907: IDTVEC(syscall)
908: pushl $2 # size of instruction for restart
909: syscall1:
910: pushl $T_ASTFLT # trap # for doing ASTs
911: INTRENTRY
912:
913: #ifdef DIAGNOSTIC
1.24 yamt 914: cmpl $0, CPUVAR(WANT_PMAPLOAD)
915: jz 1f
916: pushl $6f
917: call _C_LABEL(printf)
918: addl $4, %esp
919: 1:
1.1 fvdl 920: movl CPUVAR(ILEVEL),%ebx
921: testl %ebx,%ebx
922: jz 1f
923: pushl $5f
924: call _C_LABEL(printf)
925: addl $4,%esp
926: #ifdef DDB
927: int $3
928: #endif
1.30 junyoung 929: 1:
1.1 fvdl 930: #endif /* DIAGNOSTIC */
1.5 thorpej 931: movl CPUVAR(CURLWP),%edx
932: movl %esp,L_MD_REGS(%edx) # save pointer to frame
933: movl L_PROC(%edx),%edx
1.15 fvdl 934: pushl %esp
1.1 fvdl 935: call *P_MD_SYSCALL(%edx) # get pointer to syscall() function
1.15 fvdl 936: addl $4,%esp
1.27 yamt 937: .Lsyscall_checkast:
1.24 yamt 938: /* Check for ASTs on exit to user mode. */
1.1 fvdl 939: cli
1.5 thorpej 940: CHECK_ASTPENDING(%eax)
1.1 fvdl 941: je 1f
942: /* Always returning to user mode here. */
1.5 thorpej 943: CLEAR_ASTPENDING(%eax)
1.1 fvdl 944: sti
945: /* Pushed T_ASTFLT into tf_trapno on entry. */
1.15 fvdl 946: pushl %esp
1.1 fvdl 947: call _C_LABEL(trap)
1.15 fvdl 948: addl $4,%esp
1.27 yamt 949: jmp .Lsyscall_checkast /* re-check ASTs */
1.24 yamt 950: 1: CHECK_DEFERRED_SWITCH(%eax)
951: jnz 9f
1.1 fvdl 952: #ifndef DIAGNOSTIC
1.24 yamt 953: INTRFASTEXIT
1.1 fvdl 954: #else /* DIAGNOSTIC */
1.24 yamt 955: cmpl $IPL_NONE,CPUVAR(ILEVEL)
1.1 fvdl 956: jne 3f
957: INTRFASTEXIT
958: 3: sti
959: pushl $4f
960: call _C_LABEL(printf)
961: addl $4,%esp
962: #ifdef DDB
963: int $3
964: #endif /* DDB */
965: movl $IPL_NONE,CPUVAR(ILEVEL)
966: jmp 2b
967: 4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n"
1.30 junyoung 968: 5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n"
969: 6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n"
1.1 fvdl 970: #endif /* DIAGNOSTIC */
1.24 yamt 971: 9: sti
972: call _C_LABEL(pmap_load)
1.27 yamt 973: jmp .Lsyscall_checkast /* re-check ASTs */
1.1 fvdl 974:
975: #if NNPX > 0
976: /*
977: * Special interrupt handlers. Someday intr0-intr15 will be used to count
978: * interrupts. We'll still need a special exception 16 handler. The busy
979: * latch stuff in probintr() can be moved to npxprobe().
980: */
981:
982: /* LINTSTUB: Func: void probeintr(void) */
983: NENTRY(probeintr)
984: ss
985: incl _C_LABEL(npx_intrs_while_probing)
986: pushl %eax
987: movb $0x20,%al # EOI (asm in strings loses cpp features)
988: outb %al,$0xa0 # IO_ICU2
989: outb %al,$0x20 # IO_ICU1
990: movb $0,%al
991: outb %al,$0xf0 # clear BUSY# latch
992: popl %eax
993: iret
994:
995: /* LINTSTUB: Func: void probetrap(void) */
996: NENTRY(probetrap)
997: ss
998: incl _C_LABEL(npx_traps_while_probing)
999: fnclex
1000: iret
1001:
1002: /* LINTSTUB: Func: int npx586bug1(int a, int b) */
1003: NENTRY(npx586bug1)
1004: fildl 4(%esp) # x
1005: fildl 8(%esp) # y
1006: fld %st(1)
1007: fdiv %st(1),%st # x/y
1008: fmulp %st,%st(1) # (x/y)*y
1009: fsubrp %st,%st(1) # x-(x/y)*y
1010: pushl $0
1011: fistpl (%esp)
1012: popl %eax
1013: ret
1014: #endif /* NNPX > 0 */
CVSweb <webmaster@jp.NetBSD.org>