Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. =================================================================== RCS file: /ftp/cvs/cvsroot/src/sys/arch/i386/i386/locore.S,v rcsdiff: /ftp/cvs/cvsroot/src/sys/arch/i386/i386/locore.S,v: warning: Unknown phrases like `commitid ...;' are present. retrieving revision 1.66.6.3 retrieving revision 1.95.8.4 diff -u -p -r1.66.6.3 -r1.95.8.4 --- src/sys/arch/i386/i386/locore.S 2008/06/05 19:14:33 1.66.6.3 +++ src/sys/arch/i386/i386/locore.S 2012/04/29 23:04:41 1.95.8.4 @@ -1,4 +1,4 @@ -/* $NetBSD: locore.S,v 1.66.6.3 2008/06/05 19:14:33 mjf Exp $ */ +/* $NetBSD: locore.S,v 1.95.8.4 2012/04/29 23:04:41 mrg Exp $ */ /* * Copyright-o-rama! @@ -15,11 +15,6 @@ * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. - * 3. All advertising materials mentioning features or use of this software - * must display the following acknowledgement: - * This product includes software developed by Manuel Bouyer. - * 4. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES @@ -71,11 +66,11 @@ /*- - * Copyright (c) 1998, 2000, 2004, 2006, 2007 The NetBSD Foundation, Inc. + * Copyright (c) 1998, 2000, 2004, 2006, 2007, 2009 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation - * by Charles M. Hannum. + * by Charles M. Hannum, and by Andrew Doran. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -134,10 +129,12 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: locore.S,v 1.66.6.3 2008/06/05 19:14:33 mjf Exp $"); +__KERNEL_RCSID(0, "$NetBSD: locore.S,v 1.95.8.4 2012/04/29 23:04:41 mrg Exp $"); #include "opt_compat_oldboot.h" #include "opt_ddb.h" +#include "opt_modular.h" +#include "opt_multiboot.h" #include "opt_realmem.h" #include "opt_vm86.h" #include "opt_xen.h" @@ -171,7 +168,6 @@ __KERNEL_RCSID(0, "$NetBSD: locore.S,v 1 * Xen guest identifier and loader selection */ .section __xen_guest -#ifdef XEN3 .ascii "GUEST_OS=netbsd,GUEST_VER=3.0,XEN_VER=xen-3.0" #if defined(DOM0OPS) || !defined(XEN_COMPAT_030001) .ascii ",VIRT_BASE=0xc0000000" /* KERNBASE */ @@ -188,11 +184,8 @@ __KERNEL_RCSID(0, "$NetBSD: locore.S,v 1 #ifdef PAE .ascii ",PAE=yes[extended-cr3]" #endif -#else /* !XEN3 */ - .ascii "GUEST_OS=netbsd,GUEST_VER=2.0,XEN_VER=2.0" -#endif /* XEN3 */ .ascii ",LOADER=generic" -#if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE) +#if (NKSYMS || defined(DDB) || defined(MODULAR)) && !defined(SYMTAB_SPACE) .ascii ",BSD_SYMTAB=yes" #endif .byte 0 @@ -208,7 +201,7 @@ __KERNEL_RCSID(0, "$NetBSD: locore.S,v 1 .globl _C_LABEL(esym) .globl _C_LABEL(eblob) .globl _C_LABEL(atdevbase) - .globl _C_LABEL(proc0uarea),_C_LABEL(PDPpaddr) + .globl _C_LABEL(lwp0uarea),_C_LABEL(PDPpaddr) .globl _C_LABEL(gdt) .globl _C_LABEL(idt) .globl _C_LABEL(lapic_tpr) @@ -239,13 +232,18 @@ _C_LABEL(lapic_tpr): _C_LABEL(cpu): .long 0 # are we 80486, Pentium, or.. _C_LABEL(cpuid_level): .long 0 _C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual -_C_LABEL(proc0uarea): .long 0 +_C_LABEL(lwp0uarea): .long 0 _C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm _C_LABEL(tablesize): .long 0 .space 512 tmpstk: - +#ifdef XEN + .align PAGE_SIZE, 0x0 # Align on page boundary +_C_LABEL(tmpgdt): + .space PAGE_SIZE # Xen expects a page +#endif /* XEN */ + .globl tmpgdt #ifndef XEN #define _RELOC(x) ((x) - KERNBASE) #else @@ -489,34 +487,48 @@ try586: /* Use the `cpuid' instruction. movl $_RELOC(tmpstk),%esp # bootstrap stack end location /* - * Virtual address space of kernel: + * Virtual address space of kernel, without PAE. The page dir is 1 page long. * * text | data | bss | [syms] | [blobs] | page dir | proc0 kstack | L1 ptp * 0 1 2 3 + * + * Virtual address space of kernel, with PAE. We need 4 pages for the page dir + * and 1 page for the L3. + * text | data | bss | [syms] | [blobs] | L3 | page dir | proc0 kstack | L1 ptp + * 0 1 5 6 7 */ - +#ifndef PAE #define PROC0_PDIR_OFF 0 -#define PROC0_STK_OFF (PROC0_PDIR_OFF + PAGE_SIZE) +#else +#define PROC0_L3_OFF 0 +#define PROC0_PDIR_OFF 1 * PAGE_SIZE +#endif + +#define PROC0_STK_OFF (PROC0_PDIR_OFF + PDP_SIZE * PAGE_SIZE) #define PROC0_PTP1_OFF (PROC0_STK_OFF + UPAGES * PAGE_SIZE) /* - * fillkpt + * fillkpt - Fill in a kernel page table * eax = pte (page frame | control | status) * ebx = page table address * ecx = number of pages to map + * + * For PAE, each entry is 8 bytes long: we must set the 4 upper bytes to 0. + * This is done by the first instruction of fillkpt. In the non-PAE case, this + * instruction just clears the page table entry. */ #define fillkpt \ -1: movl %eax,(%ebx) ; /* store phys addr */ \ - addl $4,%ebx ; /* next pte/pde */ \ - addl $PAGE_SIZE,%eax ; /* next phys page */ \ - loop 1b ; \ - +1: movl $0,(PDE_SIZE-4)(%ebx) ; /* clear bits */ \ + movl %eax,(%ebx) ; /* store phys addr */ \ + addl $PDE_SIZE,%ebx ; /* next pte/pde */ \ + addl $PAGE_SIZE,%eax ; /* next phys page */ \ + loop 1b ; /* Find end of kernel image. */ movl $RELOC(end),%edi -#if (NKSYMS || defined(DDB) || defined(LKM)) && !defined(SYMTAB_SPACE) +#if (NKSYMS || defined(DDB) || defined(MODULAR)) && !defined(SYMTAB_SPACE) /* Save the symbols (if loaded). */ movl RELOC(esym),%eax testl %eax,%eax @@ -545,9 +557,14 @@ try586: /* Use the `cpuid' instruction. incl %eax /* one more ptp for VAs stolen by bootstrap */ 1: movl %eax,RELOC(nkptp)+1*4 - /* tablesize = (1 + UPAGES + nkptp) << PGSHIFT; */ - addl $(1+UPAGES),%eax + /* tablesize = (PDP_SIZE + UPAGES + nkptp) << PGSHIFT; */ + addl $(PDP_SIZE+UPAGES),%eax +#ifdef PAE + incl %eax /* one more page for the L3 PD */ + shll $PGSHIFT+1,%eax /* PTP tables are twice larger with PAE */ +#else shll $PGSHIFT,%eax +#endif movl %eax,RELOC(tablesize) /* ensure that nkptp covers bootstrap tables */ @@ -585,7 +602,10 @@ try586: /* Use the `cpuid' instruction. */ movl $_RELOC(KERNTEXTOFF),%eax movl %eax,%ecx - shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */ + shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */ +#ifdef PAE + shll $1,%ecx /* pdes are twice larger with PAE */ +#endif addl %ecx,%ebx /* Map the kernel text read-only. */ @@ -612,43 +632,58 @@ try586: /* Use the `cpuid' instruction. * Construct a page table directory. */ /* Set up top level entries for identity mapping */ - leal (PROC0_PDIR_OFF)(%esi),%ebx + leal (PROC0_PDIR_OFF)(%esi),%ebx leal (PROC0_PTP1_OFF)(%esi),%eax orl $(PG_V|PG_KW), %eax movl RELOC(nkptp)+1*4,%ecx fillkpt /* Set up top level entries for actual kernel mapping */ - leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*4)(%esi),%ebx + leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*PDE_SIZE)(%esi),%ebx leal (PROC0_PTP1_OFF)(%esi),%eax orl $(PG_V|PG_KW), %eax movl RELOC(nkptp)+1*4,%ecx fillkpt /* Install a PDE recursively mapping page directory as a page table! */ - leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*4)(%esi),%ebx - leal (PROC0_PDIR_OFF)(%esi),%eax + leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*PDE_SIZE)(%esi),%ebx + leal (PROC0_PDIR_OFF)(%esi),%eax orl $(PG_V|PG_KW),%eax - movl %eax,(%ebx) - + movl $PDP_SIZE,%ecx + fillkpt + +#ifdef PAE + /* Fill in proc0 L3 page with entries pointing to the page dirs */ + leal (PROC0_L3_OFF)(%esi),%ebx + leal (PROC0_PDIR_OFF)(%esi),%eax + orl $(PG_V),%eax + movl $PDP_SIZE,%ecx + fillkpt + + /* Enable PAE mode */ + movl %cr4,%eax + orl $CR4_PAE,%eax + movl %eax,%cr4 +#endif /* Save phys. addr of PDP, for libkvm. */ - movl %esi,RELOC(PDPpaddr) + leal (PROC0_PDIR_OFF)(%esi),%eax + movl %eax,RELOC(PDPpaddr) - /* - * Startup checklist: - * 1. Load %cr3 with pointer to PDIR. - */ + /* + * Startup checklist: + * 1. Load %cr3 with pointer to PDIR (or L3 PD page for PAE). + */ movl %esi,%eax # phys address of ptd in proc 0 movl %eax,%cr3 # load ptd addr into mmu - + /* * 2. Enable paging and the rest of it. */ movl %cr0,%eax # get control word # enable paging & NPX emulation - orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_EM|CR0_MP),%eax - movl %eax,%cr0 # and let's page NOW! + orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_EM|CR0_MP|CR0_WP|CR0_AM),%eax + movl %eax,%cr0 # and page NOW! pushl $begin # jump to high mem ret @@ -660,10 +695,11 @@ begin: * memory, remove it. */ movl _C_LABEL(nkptp)+1*4,%ecx - leal (PROC0_PDIR_OFF)(%esi),%ebx # old, phys address of PDIR - addl $(KERNBASE), %ebx # new, virtual address of PDIR -1: movl $0,(%ebx) - addl $4,%ebx + leal (PROC0_PDIR_OFF)(%esi),%ebx # old, phys address of PDIR + addl $(KERNBASE), %ebx # new, virtual address of PDIR +1: movl $0,(PDE_SIZE-4)(%ebx) # Upper bits (for PAE) + movl $0,(%ebx) + addl $PDE_SIZE,%ebx loop 1b /* Relocate atdevbase. */ @@ -674,7 +710,7 @@ begin: /* Set up bootstrap stack. */ leal (PROC0_STK_OFF+KERNBASE)(%esi),%eax - movl %eax,_C_LABEL(proc0uarea) + movl %eax,_C_LABEL(lwp0uarea) leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3 xorl %ebp,%ebp # mark end of frames @@ -695,9 +731,13 @@ begin: movl _C_LABEL(tablesize),%eax addl %esi,%eax # skip past stack and page tables +#ifdef PAE + pushl $0 # init386() expects a 64 bits paddr_t with PAE +#endif pushl %eax call _C_LABEL(init386) # wire 386 chip for unix operation - addl $4+NGDT*8,%esp # pop temporary gdt + addl $PDE_SIZE,%esp # pop paddr_t + addl $NGDT*8,%esp # pop temporary gdt #ifdef SAFARI_FIFO_HACK movb $5,%al @@ -725,11 +765,7 @@ start: popfl cld -#ifdef XEN3 movl %esp, %ebx # save start of available space -#else - movl %esi,%ebx # save start_info pointer -#endif movl $_RELOC(tmpstk),%esp # bootstrap stack end location /* Clear BSS first so that there are no surprises... */ @@ -756,15 +792,22 @@ start: cpuid movl %eax,RELOC(cpuid_level) + /* + * Use a temp page. We'll re- add it to uvm(9) once we're + * done using it. + */ + movl $RELOC(tmpgdt), %eax + pushl %eax # start of temporary gdt + call _C_LABEL(initgdt) + addl $4,%esp + call xen_pmap_bootstrap + /* * First avail returned by xen_pmap_bootstrap in %eax */ movl %eax, %esi; - movl %esi, _C_LABEL(proc0uarea) - -#define PROC0PDIR ((0) * PAGE_SIZE) -#define PROC0STACK ((1) * PAGE_SIZE) + movl %esi, _C_LABEL(lwp0uarea) /* Set up bootstrap stack. */ leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp @@ -772,18 +815,22 @@ start: addl $USPACE, %esi subl $KERNBASE, %esi #init386 want a physical address + +#ifdef PAE + pushl $0 # init386() expects a 64 bits paddr_t with PAE +#endif pushl %esi call _C_LABEL(init386) # wire 386 chip for unix operation - addl $4,%esp + addl $PDE_SIZE,%esp # pop paddr_t call _C_LABEL(main) -#if defined(XEN3) && !defined(XEN_COMPAT_030001) +#if defined(XEN) && !defined(XEN_COMPAT_030001) /* space for the hypercall call page */ #define HYPERCALL_PAGE_OFFSET 0x1000 .org HYPERCALL_PAGE_OFFSET ENTRY(hypercall_page) .skip 0x1000 -#endif /* defined(XEN3) && !defined(XEN_COMPAT_030001) */ +#endif /* defined(XEN) && !defined(XEN_COMPAT_030001) */ /* * void lgdt_finish(void); @@ -909,7 +956,7 @@ ENTRY(dumpsys) END(dumpsys) /* - * struct lwp *cpu_switchto(struct lwp *oldlwp, struct newlwp, + * struct lwp *cpu_switchto(struct lwp *oldlwp, struct *newlwp, * bool returning) * * 1. if (oldlwp != NULL), save its context. @@ -942,12 +989,12 @@ ENTRY(cpu_switchto) jz 1f /* Save old context. */ - movl L_ADDR(%esi),%eax + movl L_PCB(%esi),%eax movl %esp,PCB_ESP(%eax) movl %ebp,PCB_EBP(%eax) /* Switch to newlwp's stack. */ -1: movl L_ADDR(%edi),%ebx +1: movl L_PCB(%edi),%ebx movl PCB_EBP(%ebx),%ebp movl PCB_ESP(%ebx),%esp @@ -966,15 +1013,17 @@ ENTRY(cpu_switchto) pushl %edi call _C_LABEL(i386_switch_context) addl $4,%esp -#else /* XEN */ +#else /* !XEN */ /* Switch ring0 esp */ movl PCB_ESP0(%ebx),%eax movl %eax,CPUVAR(ESP0) +#endif /* !XEN */ /* Don't bother with the rest if switching to a system process. */ testl $LW_SYSTEM,L_FLAG(%edi) jnz 4f +#ifndef XEN /* Restore thread-private %fs/%gs descriptors. */ movl CPUVAR(GDT),%ecx movl PCB_FSD(%ebx), %eax @@ -985,12 +1034,12 @@ ENTRY(cpu_switchto) movl PCB_GSD+4(%ebx), %edx movl %eax, (GUGS_SEL*8)(%ecx) movl %edx, (GUGS_SEL*8+4)(%ecx) -#endif /* XEN */ +#endif /* !XEN */ /* Switch I/O bitmap */ movl PCB_IOMAP(%ebx),%eax orl %eax,%eax - jnz,pn .Lcopy_iobitmap + jnz .Lcopy_iobitmap movl $(IOMAP_INVALOFF << 16),CPUVAR(IOBASE) .Liobitmap_done: @@ -1000,22 +1049,25 @@ ENTRY(cpu_switchto) jne 5f /* - * Restore cr0 (including FPU state). Raise the IPL to IPL_IPI. + * Restore cr0 (including FPU state). Raise the IPL to IPL_HIGH. * FPU IPIs can alter the LWP's saved cr0. Dropping the priority * is deferred until mi_switch(), when cpu_switchto() returns. */ 2: -#ifndef XEN - movl $IPL_IPI,CPUVAR(ILEVEL) - movl PCB_CR0(%ebx),%ecx +#ifdef XEN + pushl %edi + call _C_LABEL(i386_tls_switch) + addl $4,%esp +#else /* !XEN */ + movl $IPL_HIGH,CPUVAR(ILEVEL) + movl PCB_CR0(%ebx),%ecx /* has CR0_TS clear */ movl %cr0,%edx /* * If our floating point registers are on a different CPU, * set CR0_TS so we'll trap rather than reuse bogus state. */ - movl PCB_FPCPU(%ebx),%eax - cmpl CPUVAR(SELF),%eax + cmpl CPUVAR(FPCURLWP),%edi je 3f orl $CR0_TS,%ecx @@ -1023,7 +1075,7 @@ ENTRY(cpu_switchto) 3: cmpl %edx,%ecx je 4f movl %ecx,%cr0 -#endif /* XEN */ +#endif /* !XEN */ /* Return to the new LWP, returning 'oldlwp' in %eax. */ 4: movl %esi,%eax @@ -1046,6 +1098,7 @@ ENTRY(cpu_switchto) .Lcopy_iobitmap: /* Copy I/O bitmap. */ + incl _C_LABEL(pmap_iobmp_evcnt)+EV_COUNT movl $(IOMAPSIZE/4),%ecx pushl %esi pushl %edi @@ -1078,8 +1131,13 @@ END(savectx) * Old call gate entry for syscall */ IDTVEC(osyscall) +#ifndef XEN + /* XXX we are in trouble! interrupts be off here. */ + cli # must be first instruction +#endif pushfl # set eflags in trap frame popl 8(%esp) + orl $PSL_I,(%esp) # re-enable ints on return to user pushl $7 # size of instruction for restart jmp syscall1 IDTVEC_END(osyscall) @@ -1094,19 +1152,21 @@ IDTVEC(syscall) syscall1: pushl $T_ASTFLT # trap # for doing ASTs INTRENTRY + STI(%eax) #ifdef DIAGNOSTIC movl CPUVAR(ILEVEL),%ebx testl %ebx,%ebx jz 1f pushl $5f - call _C_LABEL(printf) + call _C_LABEL(panic) addl $4,%esp #ifdef DDB int $3 #endif 1: #endif /* DIAGNOSTIC */ - incl CPUVAR(NSYSCALL) # count it atomically + addl $1,CPUVAR(NSYSCALL) # count it atomically + adcl $0,CPUVAR(NSYSCALL)+4 # count it atomically movl CPUVAR(CURLWP),%edi movl L_PROC(%edi),%edx movl %esp,L_MD_REGS(%edi) # save pointer to frame @@ -1150,14 +1210,14 @@ syscall1: INTRFASTEXIT 3: STI(%eax) pushl $4f - call _C_LABEL(printf) + call _C_LABEL(panic) addl $4,%esp pushl $IPL_NONE call _C_LABEL(spllower) addl $4,%esp jmp .Lsyscall_checkast -4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n" -5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n" +4: .asciz "SPL NOT LOWERED ON SYSCALL EXIT\n" +5: .asciz "SPL NOT ZERO ON SYSCALL ENTRY\n" #endif /* DIAGNOSTIC */ 9: cmpl $0, CPUVAR(WANT_PMAPLOAD) @@ -1176,6 +1236,39 @@ syscall1: jmp .Lsyscall_checkast /* re-check ASTs */ IDTVEC_END(syscall) +IDTVEC(svr4_fasttrap) + pushl $2 # size of instruction for restart + pushl $T_ASTFLT # trap # for doing ASTs + INTRENTRY + STI(%eax) + pushl $RW_READER + pushl $_C_LABEL(svr4_fasttrap_lock) + call _C_LABEL(rw_enter) + addl $8,%esp + call *_C_LABEL(svr4_fasttrap_vec) + pushl $_C_LABEL(svr4_fasttrap_lock) + call _C_LABEL(rw_exit) + addl $4,%esp +2: /* Check for ASTs on exit to user mode. */ + cli + CHECK_ASTPENDING(%eax) + je 1f + /* Always returning to user mode here. */ + CLEAR_ASTPENDING(%eax) + sti + /* Pushed T_ASTFLT into tf_trapno on entry. */ + pushl %esp + call _C_LABEL(trap) + addl $4,%esp + jmp 2b +1: CHECK_DEFERRED_SWITCH + jnz 9f + INTRFASTEXIT +9: sti + call _C_LABEL(pmap_load) + cli + jmp 2b + #if NNPX > 0 /* * Special interrupt handlers. Someday intr0-intr15 will be used to count @@ -1240,7 +1333,7 @@ ENTRY(sse2_idlezero_page) xorl %eax, %eax .align 16 1: - cmpl $0, CPUVAR(RESCHED) + testl $RESCHED_KPREEMPT, CPUVAR(RESCHED) jnz 2f movnti %eax, 0(%edx) movnti %eax, 4(%edx)