version 1.50.2.2, 2007/09/24 10:56:48 |
version 1.51.2.2, 2007/11/13 15:58:33 |
Line 464 try586: /* Use the `cpuid' instruction. |
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Line 464 try586: /* Use the `cpuid' instruction. |
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addl $PGOFSET,%esi # page align up |
addl $PGOFSET,%esi # page align up |
andl $~PGOFSET,%esi |
andl $~PGOFSET,%esi |
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/* nkptp[1] = (esi + ~L2_FRAME) >> L2_SHIFT + 1; */ |
movl %esi,%eax |
movl %esi,%eax |
addl $-L2_FRAME,%eax |
addl $~L2_FRAME,%eax |
shrl $L2_SHIFT,%eax |
shrl $L2_SHIFT,%eax |
movl %eax,RELOC(nkptp)+1*4 |
incl %eax /* one more ptp for VAs stolen by bootstrap */ |
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1: movl %eax,RELOC(nkptp)+1*4 |
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/* tablesize = (1 + UPAGES + nkptp) << PGSHIFT; */ |
addl $(1+UPAGES),%eax |
addl $(1+UPAGES),%eax |
shll $PGSHIFT,%eax |
shll $PGSHIFT,%eax |
movl %eax,RELOC(tablesize) |
movl %eax,RELOC(tablesize) |
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/* ensure that nkptp covers bootstrap tables */ |
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addl %esi,%eax |
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addl $~L2_FRAME,%eax |
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shrl $L2_SHIFT,%eax |
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incl %eax |
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cmpl %eax,RELOC(nkptp)+1*4 |
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jnz 1b |
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/* Clear tables */ |
/* Clear tables */ |
movl %esi,%edi |
movl %esi,%edi |
xorl %eax,%eax |
xorl %eax,%eax |
Line 488 try586: /* Use the `cpuid' instruction. |
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Line 499 try586: /* Use the `cpuid' instruction. |
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* Build initial page tables. |
* Build initial page tables. |
*/ |
*/ |
/* |
/* |
* Compute etext - KERNBASE. This can't be > 4G, or we can't deal |
* Compute &__data_start - KERNBASE. This can't be > 4G, |
* with it anyway, since we can't load it in 32 bit mode. So use |
* or we can't deal with it anyway, since we can't load it in |
* the bottom 32 bits. |
* 32 bit mode. So use the bottom 32 bits. |
*/ |
*/ |
movl $RELOC(etext),%edx |
movl $RELOC(__data_start),%edx |
addl $PGOFSET,%edx |
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andl $~PGOFSET,%edx |
andl $~PGOFSET,%edx |
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/* |
/* |
Line 653 NENTRY(lwp_trampoline) |
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Line 663 NENTRY(lwp_trampoline) |
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pushl %ebx |
pushl %ebx |
call *%esi |
call *%esi |
addl $4,%esp |
addl $4,%esp |
DO_DEFERRED_SWITCH(%eax) |
DO_DEFERRED_SWITCH |
INTRFASTEXIT |
INTRFASTEXIT |
/* NOTREACHED */ |
/* NOTREACHED */ |
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_C_LABEL(esigcode): |
_C_LABEL(esigcode): |
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/* |
/* |
* void lgdt(struct region_descriptor *rdp); |
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* |
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* Load a new GDT pointer (and do any necessary cleanup). |
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* XXX It's somewhat questionable whether reloading all the segment registers |
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* is necessary, since the actual descriptor data is not changed except by |
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* process creation and exit, both of which clean up via task switches. OTOH, |
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* this only happens at run time when the GDT is resized. |
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*/ |
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NENTRY(lgdt) |
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/* Reload the descriptor table. */ |
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movl 4(%esp),%eax |
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lgdt (%eax) |
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/* Flush the prefetch queue. */ |
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jmp 1f |
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nop |
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1: /* Reload "stale" selectors. */ |
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movl $GSEL(GDATA_SEL, SEL_KPL),%eax |
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movw %ax,%ds |
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movw %ax,%es |
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movw %ax,%gs |
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movw %ax,%ss |
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movl $GSEL(GCPU_SEL, SEL_KPL),%eax |
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movw %ax,%fs |
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/* Reload code selector by doing intersegment return. */ |
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popl %eax |
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pushl $GSEL(GCODE_SEL, SEL_KPL) |
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pushl %eax |
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lret |
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/* |
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* void x86_flush() |
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* |
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* Flush instruction pipelines by doing an intersegment (far) return. |
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*/ |
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NENTRY(x86_flush) |
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popl %eax |
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pushl $GSEL(GCODE_SEL, SEL_KPL) |
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pushl %eax |
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lret |
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/* |
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* int setjmp(label_t *) |
* int setjmp(label_t *) |
* |
* |
* Used primarily by DDB. |
* Used primarily by DDB. |
Line 786 ENTRY(cpu_switchto) |
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Line 755 ENTRY(cpu_switchto) |
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/* Switch TSS. Reset "task busy" flag before loading. */ |
/* Switch TSS. Reset "task busy" flag before loading. */ |
movl %cr3,%eax |
movl %cr3,%eax |
movl %eax,PCB_CR3(%ebx) # for TSS gates |
movl %eax,PCB_CR3(%ebx) # for TSS gates |
movl CPUVAR(GDT),%eax |
movl CPUVAR(GDT),%ecx |
movl L_MD_TSS_SEL(%edi),%edx |
movl L_MD_TSS_SEL(%edi),%edx |
andl $~0x0200,4(%eax,%edx, 1) |
andl $~0x0200,4(%ecx,%edx, 1) |
ltr %dx |
ltr %dx |
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/* Set curlwp. */ |
/* Set curlwp. */ |
Line 803 ENTRY(cpu_switchto) |
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Line 772 ENTRY(cpu_switchto) |
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cmpl $0,P_RASLIST(%eax) |
cmpl $0,P_RASLIST(%eax) |
jne 5f |
jne 5f |
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/* Restore thread-private %fs/%gs descriptors. */ |
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movl PCB_FSD(%ebx), %eax |
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movl PCB_FSD+4(%ebx), %edx |
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movl %eax, (GUFS_SEL*8)(%ecx) |
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movl %edx, (GUFS_SEL*8+4)(%ecx) |
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movl PCB_GSD(%ebx), %eax |
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movl PCB_GSD+4(%ebx), %edx |
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movl %eax, (GUGS_SEL*8)(%ecx) |
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movl %edx, (GUGS_SEL*8+4)(%ecx) |
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/* |
/* |
* Restore cr0 (including FPU state). Raise the IPL to IPL_IPI. |
* Restore cr0 (including FPU state). Raise the IPL to IPL_IPI. |
* FPU IPIs can alter the LWP's saved cr0. Dropping the priority |
* FPU IPIs can alter the LWP's saved cr0. Dropping the priority |
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call _C_LABEL(trap) |
call _C_LABEL(trap) |
addl $4,%esp |
addl $4,%esp |
jmp .Lsyscall_checkast /* re-check ASTs */ |
jmp .Lsyscall_checkast /* re-check ASTs */ |
1: CHECK_DEFERRED_SWITCH(%eax) |
1: CHECK_DEFERRED_SWITCH |
jnz 9f |
jnz 9f |
#ifndef DIAGNOSTIC |
#ifndef DIAGNOSTIC |
INTRFASTEXIT |
INTRFASTEXIT |
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int $3 |
int $3 |
#endif /* DDB */ |
#endif /* DDB */ |
movl $IPL_NONE,CPUVAR(ILEVEL) |
movl $IPL_NONE,CPUVAR(ILEVEL) |
jmp 2b |
jmp .Lsyscall_checkast |
4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n" |
4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n" |
5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n" |
5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n" |
6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n" |
6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n" |