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Diff for /src/sys/arch/i386/i386/locore.S between version 1.34.2.7 and 1.47.4.5

version 1.34.2.7, 2007/12/07 17:25:00

version 1.47.4.5, 2007/08/20 18:38:12

Line 1

/* $NetBSD$ */

* Copyright-o-rama!

* Written by Frank van der Linden for Wasabi Systems, Inc.

* Redistribution and use in source and binary forms, with or without

* modification, are permitted provided that the following conditions

* are met:

* 1. Redistributions of source code must retain the above copyright

* notice, this list of conditions and the following disclaimer.

* 2. Redistributions in binary form must reproduce the above copyright

* notice, this list of conditions and the following disclaimer in the

* documentation and/or other materials provided with the distribution.

* 3. All advertising materials mentioning features or use of this software

* must display the following acknowledgement:

* This product includes software developed for the NetBSD Project by

* Wasabi Systems, Inc.

* 4. The name of Wasabi Systems, Inc. may not be used to endorse

* or promote products derived from this software without specific prior

* written permission.

* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND

* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED

* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR

* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC

* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR

* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF

* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN

* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)

* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

* POSSIBILITY OF SUCH DAMAGE.

/*-

Line 111

Line 71

#include "opt_compat_oldboot.h"

#include "opt_cputype.h"

#include "opt_ddb.h"

#include "opt_realmem.h"

#include "opt_vm86.h"

Line 178 _C_LABEL(cpu): .long 0 # are we 80486,

Line 139 _C_LABEL(cpu): .long 0 # are we 80486,

_C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual

_C_LABEL(proc0uarea): .long 0

_C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm

_C_LABEL(tablesize): .long 0

.space 512

tmpstk:

Line 424 try586: /* Use the `cpuid' instruction.

Line 384 try586: /* Use the `cpuid' instruction.

* Virtual address space of kernel:

* 0 1 2 3

#define PROC0PDIR ((0) * PAGE_SIZE)

#define PROC0_PDIR_OFF 0

#define PROC0STACK ((1) * PAGE_SIZE)

#define PROC0_STK_OFF (PROC0_PDIR_OFF + PAGE_SIZE)

#define SYSMAP ((1+UPAGES) * PAGE_SIZE)

#define PROC0_PTP1_OFF (PROC0_STK_OFF + UPAGES * PAGE_SIZE)

#define TABLESIZE ((1+UPAGES) * PAGE_SIZE) /* + nkpde * PAGE_SIZE */

* fillkpt

* eax = pte (page frame | control | status)

* ebx = page table address

* ecx = number of pages to map

#define fillkpt \

1: movl %eax,(%ebx) ; /* store phys addr */ \

addl $4,%ebx ; /* next pte/pde */ \

addl $PAGE_SIZE,%eax ; /* next phys page */ \

loop 1b ; \

/* Find end of kernel image. */

movl $RELOC(end),%edi

Line 458 try586: /* Use the `cpuid' instruction.

Line 404 try586: /* Use the `cpuid' instruction.

#endif

/* Compute sizes */

/* Calculate where to start the bootstrap tables. */

movl %edi,%esi # edi = esym ? esym : end

addl $PGOFSET,%esi # page align up

andl $~PGOFSET,%esi

/* nkptp[1] = (esi + ~L2_FRAME) >> L2_SHIFT + 1; */

movl %esi,%eax

* Calculate the size of the kernel page table directory, and

addl $~L2_FRAME,%eax

* how many entries it will have. Adjust nkpde to the actual

shrl $L2_SHIFT,%eax

* kernel size automatically. Account for the bootstrap tables,

incl %eax /* one more ptp for VAs stolen by bootstrap */

* round up, and add an extra 4MB.

1: movl %eax,RELOC(nkptp)+1*4

leal TABLESIZE+NBPD+PDOFSET(%edi),%eax

/* tablesize = (1 + UPAGES + nkptp) << PGSHIFT; */

shrl $PDSHIFT,%eax

addl $(1+UPAGES),%eax

movl RELOC(nkpde),%ecx # get nkpde

shll $PGSHIFT,%eax

cmpl %ecx,%eax

movl %eax,RELOC(tablesize)

jb 1f

movl %eax,%ecx

/* ensure that nkptp covers bootstrap tables */

1: cmpl $NKPTP_MIN,%ecx # larger than min?

addl %esi,%eax

jge 1f

addl $~L2_FRAME,%eax

movl $NKPTP_MIN,%ecx # set at min

shrl $L2_SHIFT,%eax

jmp 2f

incl %eax

1: cmpl $NKPTP_MAX,%ecx # larger than max?

cmpl %eax,RELOC(nkptp)+1*4

jle 2f

jnz 1b

movl $NKPTP_MAX,%ecx

2: movl %ecx,RELOC(nkpde)

/* Clear tables */

movl %esi,%edi

/* Clear memory for bootstrap tables. */

shll $PGSHIFT,%ecx

addl $TABLESIZE,%ecx

addl %esi,%ecx # end of tables

subl %edi,%ecx # size of tables

shrl $2,%ecx

xorl %eax,%eax

cld

movl RELOC(tablesize),%ecx

shrl $2,%ecx

rep

stosl

leal (PROC0_PTP1_OFF)(%esi), %ebx

* fillkpt

* eax = pte (page frame | control | status)

* ebx = page table address

* ecx = number of pages to map

#define fillkpt \

1: movl %eax,(%ebx) ; \

addl $PAGE_SIZE,%eax ; /* increment physical address */ \

addl $4,%ebx ; /* next pte */ \

loop 1b ;

* Build initial page tables.

/* Calculate end of text segment, rounded to a page. */

* Compute &__data_start - KERNBASE. This can't be > 4G,

leal (RELOC(etext)+PGOFSET),%edx

* or we can't deal with it anyway, since we can't load it in

* 32 bit mode. So use the bottom 32 bits.

movl $RELOC(__data_start),%edx

andl $~PGOFSET,%edx

/* Skip over the first 1MB. */

* Skip the first MB.

movl $_RELOC(KERNTEXTOFF),%eax

movl %eax,%ecx

shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */

shrl $PGSHIFT,%ecx

addl %ecx,%ebx

leal (SYSMAP)(%esi,%ecx,4),%ebx

/* Map the kernel text read-only. */

movl %edx,%ecx

Line 522 try586: /* Use the `cpuid' instruction.

Line 475 try586: /* Use the `cpuid' instruction.

/* Map the data, BSS, and bootstrap tables read-write. */

leal (PG_V|PG_KW)(%edx),%eax

movl RELOC(tablesize),%ecx

movl RELOC(nkpde),%ecx

shll $PGSHIFT,%ecx

addl $TABLESIZE,%ecx

addl %esi,%ecx # end of tables

subl %edx,%ecx # subtract end of text

shrl $PGSHIFT,%ecx

fillkpt

/* Map ISA I/O mem (later atdevbase) */

/* Map ISA I/O memory. */

movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax # having these bits set

movl $(IOM_SIZE>>PGSHIFT),%ecx # for this many pte s,

fillkpt

Line 536 try586: /* Use the `cpuid' instruction.

Line 491 try586: /* Use the `cpuid' instruction.

* Construct a page table directory.

/* Set up top level entries for identity mapping */

/* Install PDEs for temporary double map of kernel. */

leal (PROC0_PDIR_OFF)(%esi),%ebx

movl RELOC(nkpde),%ecx # for this many pde s,

leal (PROC0_PTP1_OFF)(%esi),%eax

leal (PROC0PDIR+0*4)(%esi),%ebx # which is where temp maps!

orl $(PG_V|PG_KW), %eax

leal (SYSMAP+PG_V|PG_KW)(%esi),%eax # pte for KPT in proc 0,

movl RELOC(nkptp)+1*4,%ecx

fillkpt

/* Set up top level entries for actual kernel mapping */

/* Map kernel PDEs. */

leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*4)(%esi),%ebx

movl RELOC(nkpde),%ecx # for this many pde s,

leal (PROC0_PTP1_OFF)(%esi),%eax

leal (PROC0PDIR+PDSLOT_KERN*4)(%esi),%ebx # kernel pde offset

orl $(PG_V|PG_KW), %eax

leal (SYSMAP+PG_V|PG_KW)(%esi),%eax # pte for KPT in proc 0,

movl RELOC(nkptp)+1*4,%ecx

fillkpt

/* Install a PDE recursively mapping page directory as a page table! */

leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*4)(%esi),%ebx

leal (PROC0PDIR+PG_V|PG_KW)(%esi),%eax # pte for ptd

leal (PROC0_PDIR_OFF)(%esi),%eax

movl %eax,(PROC0PDIR+PDSLOT_PTE*4)(%esi) # recursive PD slot

orl $(PG_V|PG_KW),%eax

movl %eax,(%ebx)

/* Save phys. addr of PDP, for libkvm. */

movl %esi,RELOC(PDPpaddr)

/* Load base of page directory and enable mapping. */

* Startup checklist:

* 1. Load %cr3 with pointer to PDIR.

movl %esi,%eax # phys address of ptd in proc 0

movl %eax,%cr3 # load ptd addr into mmu

* 2. Enable paging and the rest of it.

movl %cr0,%eax # get control word

# enable paging & NPX emulation

Line 579 try586: /* Use the `cpuid' instruction.

Line 522 try586: /* Use the `cpuid' instruction.

ret

begin:

/* Now running relocated at KERNBASE. Remove double mapping. */

* We have arrived.

movl _C_LABEL(nkpde),%ecx # for this many pde s,

* There's no need anymore for the identity mapping in low

leal (PROC0PDIR+0*4)(%esi),%ebx # which is where temp maps!

* memory, remove it.

addl $(KERNBASE), %ebx # now use relocated address

movl _C_LABEL(nkptp)+1*4,%ecx

leal (PROC0_PDIR_OFF)(%esi),%ebx # old, phys address of PDIR

addl $(KERNBASE), %ebx # new, virtual address of PDIR

1: movl $0,(%ebx)

addl $4,%ebx

addl $4,%ebx # next pde

loop 1b

/* Relocate atdevbase. */

movl $KERNBASE,%edx

movl _C_LABEL(nkpde),%edx

addl _C_LABEL(tablesize),%edx

shll $PGSHIFT,%edx

addl $(TABLESIZE+KERNBASE),%edx

addl %esi,%edx

movl %edx,_C_LABEL(atdevbase)

/* Set up bootstrap stack. */

leal (PROC0_STK_OFF+KERNBASE)(%esi),%eax

leal (PROC0STACK+KERNBASE)(%esi),%eax

movl %eax,_C_LABEL(proc0uarea)

leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp

movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3

Line 617 begin:

Line 557 begin:

call _C_LABEL(initgdt)

addl $4,%esp

movl _C_LABEL(tablesize),%eax

movl _C_LABEL(nkpde),%eax

shll $PGSHIFT,%eax

addl $TABLESIZE,%eax

addl %esi,%eax # skip past stack and page tables

pushl %eax

Line 662 NENTRY(lwp_trampoline)

Line 604 NENTRY(lwp_trampoline)

pushl %ebx

call *%esi

addl $4,%esp

DO_DEFERRED_SWITCH

DO_DEFERRED_SWITCH(%eax)

INTRFASTEXIT

/* NOTREACHED */

Line 688 NENTRY(sigcode)

Line 630 NENTRY(sigcode)

_C_LABEL(esigcode):

* void lgdt(struct region_descriptor *rdp);

* Load a new GDT pointer (and do any necessary cleanup).

* XXX It's somewhat questionable whether reloading all the segment registers

* is necessary, since the actual descriptor data is not changed except by

* process creation and exit, both of which clean up via task switches. OTOH,

* this only happens at run time when the GDT is resized.

NENTRY(lgdt)

/* Reload the descriptor table. */

movl 4(%esp),%eax

lgdt (%eax)

/* Flush the prefetch queue. */

jmp 1f

nop

1: /* Reload "stale" selectors. */

movl $GSEL(GDATA_SEL, SEL_KPL),%eax

movw %ax,%ds

movw %ax,%es

movw %ax,%gs

movw %ax,%ss

movl $GSEL(GCPU_SEL, SEL_KPL),%eax

movw %ax,%fs

/* Reload code selector by doing intersegment return. */

popl %eax

pushl $GSEL(GCODE_SEL, SEL_KPL)

pushl %eax

lret

* void x86_flush()

* Flush instruction pipelines by doing an intersegment (far) return.

NENTRY(x86_flush)

popl %eax

pushl $GSEL(GCODE_SEL, SEL_KPL)

pushl %eax

lret

* int setjmp(label_t *)

* Used primarily by DDB.

Line 763 ENTRY(cpu_switchto)

Line 746 ENTRY(cpu_switchto)

/* Switch TSS. Reset "task busy" flag before loading. */

movl %cr3,%eax

movl %eax,PCB_CR3(%ebx) # for TSS gates

movl CPUVAR(GDT),%ecx

movl CPUVAR(GDT),%eax

movl L_MD_TSS_SEL(%edi),%edx

andl $~0x0200,4(%ecx,%edx, 1)

andl $~0x0200,4(%eax,%edx, 1)

ltr %dx

/* Don't bother with the rest if switching to a system process. */

testl $LW_SYSTEM,L_FLAG(%edi)

jnz 4f

/* Restore thread-private %fs/%gs descriptors. */

movl PCB_FSD(%ebx), %eax

movl PCB_FSD+4(%ebx), %edx

movl %eax, (GUFS_SEL*8)(%ecx)

movl %edx, (GUFS_SEL*8+4)(%ecx)

movl PCB_GSD(%ebx), %eax

movl PCB_GSD+4(%ebx), %edx

movl %eax, (GUGS_SEL*8)(%ecx)

movl %edx, (GUGS_SEL*8+4)(%ecx)

/* Is this process using RAS (restartable atomic sequences)? */

movl L_PROC(%edi),%eax

cmpl $0,P_RASLIST(%eax)

Line 899 syscall1:

Line 872 syscall1:

call _C_LABEL(trap)

addl $4,%esp

jmp .Lsyscall_checkast /* re-check ASTs */

1: CHECK_DEFERRED_SWITCH

1: CHECK_DEFERRED_SWITCH(%eax)

jnz 9f

#ifndef DIAGNOSTIC

INTRFASTEXIT

Line 911 syscall1:

Line 884 syscall1:

pushl $4f

call _C_LABEL(printf)

addl $4,%esp

pushl $IPL_NONE

#ifdef DDB

call _C_LABEL(spllower)

int $3

addl $4,%esp

#endif /* DDB */

jmp .Lsyscall_checkast

movl $IPL_NONE,CPUVAR(ILEVEL)

jmp 2b

4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n"

5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n"

6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n"

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