src/sys/arch/i386/i386/locore.S - diff

Return to locore.S CVS log

Up to [cvs.NetBSD.org] / src / sys / arch / i386 / i386

Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files.

Diff for /src/sys/arch/i386/i386/locore.S between version 1.34.2.6 and 1.45.2.1

version 1.34.2.6, 2007/11/15 11:42:56

version 1.45.2.1, 2007/02/17 10:30:45

Line 1

/* $NetBSD$ */

* Copyright-o-rama!

* Written by Frank van der Linden for Wasabi Systems, Inc.

* Redistribution and use in source and binary forms, with or without

* modification, are permitted provided that the following conditions

* are met:

* 1. Redistributions of source code must retain the above copyright

* notice, this list of conditions and the following disclaimer.

* 2. Redistributions in binary form must reproduce the above copyright

* notice, this list of conditions and the following disclaimer in the

* documentation and/or other materials provided with the distribution.

* 3. All advertising materials mentioning features or use of this software

* must display the following acknowledgement:

* This product includes software developed for the NetBSD Project by

* Wasabi Systems, Inc.

* 4. The name of Wasabi Systems, Inc. may not be used to endorse

* or promote products derived from this software without specific prior

* written permission.

* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND

* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED

* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR

* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC

* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR

* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF

* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS

* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN

* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)

* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE

* POSSIBILITY OF SUCH DAMAGE.

/*-

* This code is derived from software contributed to The NetBSD Foundation

Line 110

Line 70

* @(#)locore.s 7.3 (Berkeley) 5/13/91

#include "opt_compat_netbsd.h"

#include "opt_compat_oldboot.h"

#include "opt_cputype.h"

#include "opt_ddb.h"

#include "opt_ipkdb.h"

#include "opt_lockdebug.h"

#include "opt_multiprocessor.h"

#include "opt_realmem.h"

#include "opt_user_ldt.h"

#include "opt_vm86.h"

#include "npx.h"

Line 128

Line 94

#include <machine/segments.h>

#include <machine/specialreg.h>

#include <machine/trap.h>

#if NLAPIC > 0

#include <machine/i82489reg.h>

#endif

#include <machine/multiboot.h>

/* LINTSTUB: include <sys/types.h> */

/* LINTSTUB: include <machine/cpu.h> */

/* LINTSTUB: include <sys/systm.h> */

#include <machine/asm.h>

#include <machine/frameasm.h>

#include <machine/i82489reg.h>

/* XXX temporary kluge; these should not be here */

/* Get definitions for IOM_BEGIN, IOM_END, and IOM_SIZE */

#include <dev/isa/isareg.h>

/* Disallow old names for REALBASEMEM */

#ifdef BIOSBASEMEM

#error BIOSBASEMEM option deprecated; use REALBASEMEM only if memory size reported by latest boot block is incorrect

#endif

/* Disallow old names for REALEXTMEM */

#ifdef EXTMEM_SIZE

#error EXTMEM_SIZE option deprecated; use REALEXTMEM only if memory size reported by latest boot block is incorrect

#endif

#ifdef BIOSEXTMEM

#error BIOSEXTMEM option deprecated; use REALEXTMEM only if memory size reported by latest boot block is incorrect

#endif

#include <machine/frameasm.h>

#ifdef MULTIPROCESSOR

#include <machine/i82489reg.h>

#endif

* Initialization

Line 148

Line 142

.globl _C_LABEL(atdevbase)

.globl _C_LABEL(proc0uarea),_C_LABEL(PDPpaddr)

.globl _C_LABEL(gdt)

#ifdef I586_CPU

.globl _C_LABEL(idt)

#endif

.globl _C_LABEL(lapic_tpr)

#if NLAPIC > 0

Line 174 _C_LABEL(lapic_tpr):

Line 170 _C_LABEL(lapic_tpr):

.long 0

#endif

_C_LABEL(cpu): .long 0 # are we 80486, Pentium, or..

_C_LABEL(cpu): .long 0 # are we 386, 386sx, or 486,

# or Pentium, or..

_C_LABEL(atdevbase): .long 0 # location of start of iomem in virtual

_C_LABEL(proc0uarea): .long 0

_C_LABEL(PDPpaddr): .long 0 # paddr of PDP, for libkvm

_C_LABEL(tablesize): .long 0

.space 512

tmpstk:

Line 424 try586: /* Use the `cpuid' instruction.

Line 421 try586: /* Use the `cpuid' instruction.

* Virtual address space of kernel:

* 0 1 2 3

#define PROC0PDIR ((0) * PAGE_SIZE)

#define PROC0_PDIR_OFF 0

#define PROC0STACK ((1) * PAGE_SIZE)

#define PROC0_STK_OFF (PROC0_PDIR_OFF + PAGE_SIZE)

#define SYSMAP ((1+UPAGES) * PAGE_SIZE)

#define PROC0_PTP1_OFF (PROC0_STK_OFF + UPAGES * PAGE_SIZE)

#define TABLESIZE ((1+UPAGES) * PAGE_SIZE) /* + nkpde * PAGE_SIZE */

* fillkpt

* eax = pte (page frame | control | status)

* ebx = page table address

* ecx = number of pages to map

#define fillkpt \

1: movl %eax,(%ebx) ; /* store phys addr */ \

addl $4,%ebx ; /* next pte/pde */ \

addl $PAGE_SIZE,%eax ; /* next phys page */ \

loop 1b ; \

/* Find end of kernel image. */

movl $RELOC(end),%edi

Line 458 try586: /* Use the `cpuid' instruction.

Line 441 try586: /* Use the `cpuid' instruction.

#endif

/* Compute sizes */

/* Calculate where to start the bootstrap tables. */

movl %edi,%esi # edi = esym ? esym : end

addl $PGOFSET,%esi # page align up

andl $~PGOFSET,%esi

/* nkptp[1] = (esi + ~L2_FRAME) >> L2_SHIFT + 1; */

movl %esi,%eax

* Calculate the size of the kernel page table directory, and

addl $~L2_FRAME,%eax

* how many entries it will have. Adjust nkpde to the actual

shrl $L2_SHIFT,%eax

* kernel size automatically. Account for the bootstrap tables,

incl %eax /* one more ptp for VAs stolen by bootstrap */

* round up, and add an extra 4MB.

1: movl %eax,RELOC(nkptp)+1*4

leal TABLESIZE+NBPD+PDOFSET(%edi),%eax

/* tablesize = (1 + UPAGES + nkptp) << PGSHIFT; */

shrl $PDSHIFT,%eax

addl $(1+UPAGES),%eax

movl RELOC(nkpde),%ecx # get nkpde

shll $PGSHIFT,%eax

cmpl %ecx,%eax

movl %eax,RELOC(tablesize)

jb 1f

movl %eax,%ecx

/* ensure that nkptp covers bootstrap tables */

1: cmpl $NKPTP_MIN,%ecx # larger than min?

addl %esi,%eax

jge 1f

addl $~L2_FRAME,%eax

movl $NKPTP_MIN,%ecx # set at min

shrl $L2_SHIFT,%eax

jmp 2f

incl %eax

1: cmpl $NKPTP_MAX,%ecx # larger than max?

cmpl %eax,RELOC(nkptp)+1*4

jle 2f

jnz 1b

movl $NKPTP_MAX,%ecx

2: movl %ecx,RELOC(nkpde)

/* Clear tables */

movl %esi,%edi

/* Clear memory for bootstrap tables. */

shll $PGSHIFT,%ecx

addl $TABLESIZE,%ecx

addl %esi,%ecx # end of tables

subl %edi,%ecx # size of tables

shrl $2,%ecx

xorl %eax,%eax

cld

movl RELOC(tablesize),%ecx

shrl $2,%ecx

rep

stosl

leal (PROC0_PTP1_OFF)(%esi), %ebx

* fillkpt

* eax = pte (page frame | control | status)

* ebx = page table address

* ecx = number of pages to map

#define fillkpt \

1: movl %eax,(%ebx) ; \

addl $PAGE_SIZE,%eax ; /* increment physical address */ \

addl $4,%ebx ; /* next pte */ \

loop 1b ;

* Build initial page tables.

/* Calculate end of text segment, rounded to a page. */

* Compute &__data_start - KERNBASE. This can't be > 4G,

leal (RELOC(etext)+PGOFSET),%edx

* or we can't deal with it anyway, since we can't load it in

* 32 bit mode. So use the bottom 32 bits.

movl $RELOC(__data_start),%edx

andl $~PGOFSET,%edx

/* Skip over the first 1MB. */

* Skip the first MB.

movl $_RELOC(KERNTEXTOFF),%eax

movl %eax,%ecx

shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */

shrl $PGSHIFT,%ecx

addl %ecx,%ebx

leal (SYSMAP)(%esi,%ecx,4),%ebx

/* Map the kernel text read-only. */

movl %edx,%ecx

Line 522 try586: /* Use the `cpuid' instruction.

Line 512 try586: /* Use the `cpuid' instruction.

/* Map the data, BSS, and bootstrap tables read-write. */

leal (PG_V|PG_KW)(%edx),%eax

movl RELOC(tablesize),%ecx

movl RELOC(nkpde),%ecx

shll $PGSHIFT,%ecx

addl $TABLESIZE,%ecx

addl %esi,%ecx # end of tables

subl %edx,%ecx # subtract end of text

shrl $PGSHIFT,%ecx

fillkpt

/* Map ISA I/O mem (later atdevbase) */

/* Map ISA I/O memory. */

movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax # having these bits set

movl $(IOM_SIZE>>PGSHIFT),%ecx # for this many pte s,

fillkpt

Line 536 try586: /* Use the `cpuid' instruction.

Line 528 try586: /* Use the `cpuid' instruction.

* Construct a page table directory.

/* Set up top level entries for identity mapping */

/* Install PDEs for temporary double map of kernel. */

leal (PROC0_PDIR_OFF)(%esi),%ebx

movl RELOC(nkpde),%ecx # for this many pde s,

leal (PROC0_PTP1_OFF)(%esi),%eax

leal (PROC0PDIR+0*4)(%esi),%ebx # which is where temp maps!

orl $(PG_V|PG_KW), %eax

leal (SYSMAP+PG_V|PG_KW)(%esi),%eax # pte for KPT in proc 0,

movl RELOC(nkptp)+1*4,%ecx

fillkpt

/* Set up top level entries for actual kernel mapping */

/* Map kernel PDEs. */

leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*4)(%esi),%ebx

movl RELOC(nkpde),%ecx # for this many pde s,

leal (PROC0_PTP1_OFF)(%esi),%eax

leal (PROC0PDIR+PDSLOT_KERN*4)(%esi),%ebx # kernel pde offset

orl $(PG_V|PG_KW), %eax

leal (SYSMAP+PG_V|PG_KW)(%esi),%eax # pte for KPT in proc 0,

movl RELOC(nkptp)+1*4,%ecx

fillkpt

/* Install a PDE recursively mapping page directory as a page table! */

leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*4)(%esi),%ebx

leal (PROC0PDIR+PG_V|PG_KW)(%esi),%eax # pte for ptd

leal (PROC0_PDIR_OFF)(%esi),%eax

movl %eax,(PROC0PDIR+PDSLOT_PTE*4)(%esi) # recursive PD slot

orl $(PG_V|PG_KW),%eax

movl %eax,(%ebx)

/* Save phys. addr of PDP, for libkvm. */

movl %esi,RELOC(PDPpaddr)

/* Load base of page directory and enable mapping. */

* Startup checklist:

* 1. Load %cr3 with pointer to PDIR.

movl %esi,%eax # phys address of ptd in proc 0

movl %eax,%cr3 # load ptd addr into mmu

* 2. Enable paging and the rest of it.

movl %cr0,%eax # get control word

# enable paging & NPX emulation

Line 579 try586: /* Use the `cpuid' instruction.

Line 559 try586: /* Use the `cpuid' instruction.

ret

begin:

/* Now running relocated at KERNBASE. Remove double mapping. */

* We have arrived.

movl _C_LABEL(nkpde),%ecx # for this many pde s,

* There's no need anymore for the identity mapping in low

leal (PROC0PDIR+0*4)(%esi),%ebx # which is where temp maps!

* memory, remove it.

addl $(KERNBASE), %ebx # now use relocated address

movl _C_LABEL(nkptp)+1*4,%ecx

leal (PROC0_PDIR_OFF)(%esi),%ebx # old, phys address of PDIR

addl $(KERNBASE), %ebx # new, virtual address of PDIR

1: movl $0,(%ebx)

addl $4,%ebx

addl $4,%ebx # next pde

loop 1b

/* Relocate atdevbase. */

movl $KERNBASE,%edx

movl _C_LABEL(nkpde),%edx

addl _C_LABEL(tablesize),%edx

shll $PGSHIFT,%edx

addl $(TABLESIZE+KERNBASE),%edx

addl %esi,%edx

movl %edx,_C_LABEL(atdevbase)

/* Set up bootstrap stack. */

leal (PROC0_STK_OFF+KERNBASE)(%esi),%eax

leal (PROC0STACK+KERNBASE)(%esi),%eax

movl %eax,_C_LABEL(proc0uarea)

leal (KSTACK_SIZE-FRAMESIZE)(%eax),%esp

movl %esi,(KSTACK_SIZE+PCB_CR3)(%eax) # pcb->pcb_cr3

Line 617 begin:

Line 594 begin:

call _C_LABEL(initgdt)

addl $4,%esp

movl _C_LABEL(tablesize),%eax

movl _C_LABEL(nkpde),%eax

shll $PGSHIFT,%eax

addl $TABLESIZE,%eax

addl %esi,%eax # skip past stack and page tables

pushl %eax

Line 646 begin:

Line 625 begin:

* void lwp_trampoline(void);

* This is a trampoline function pushed onto the stack of a newly created

* process in order to do some additional setup. The trampoline is entered by

* cpu_switch()ing to the process, so we abuse the callee-saved registers used

* by cpu_switch() to store the information about the stub to call.

* NOTE: This function does not have a normal calling sequence!

/* LINTSTUB: Func: void lwp_trampoline(void) */

NENTRY(lwp_trampoline)

pushl %ebp

xorl %ebp,%ebp

Line 662 NENTRY(lwp_trampoline)

Line 641 NENTRY(lwp_trampoline)

pushl %ebx

call *%esi

addl $4,%esp

DO_DEFERRED_SWITCH

DO_DEFERRED_SWITCH(%eax)

INTRFASTEXIT

/* NOTREACHED */

/*****************************************************************************/

#ifdef COMPAT_16

* sigcode()

* Signal trampoline; copied to top of user stack.

* Signal trampoline; copied to top of user stack. Used only for

* compatibility with old releases of NetBSD.

/* LINTSTUB: Var: char sigcode[1], esigcode[1]; */

NENTRY(sigcode)

* Handler has returned here as if we called it. The sigcontext

Line 686 NENTRY(sigcode)

Line 665 NENTRY(sigcode)

int $0x80 # exit if sigreturn fails

.globl _C_LABEL(esigcode)

_C_LABEL(esigcode):

#endif

/*****************************************************************************/

* int setjmp(label_t *)

* The following is i386-specific nonsense.

* Used primarily by DDB.

* void lgdt(struct region_descriptor *rdp);

* Load a new GDT pointer (and do any necessary cleanup).

* XXX It's somewhat questionable whether reloading all the segment registers

* is necessary, since the actual descriptor data is not changed except by

* process creation and exit, both of which clean up via task switches. OTOH,

* this only happens at run time when the GDT is resized.

/* LINTSTUB: Func: void lgdt(struct region_descriptor *rdp) */

NENTRY(lgdt)

/* Reload the descriptor table. */

movl 4(%esp),%eax

lgdt (%eax)

/* Flush the prefetch queue. */

jmp 1f

nop

1: /* Reload "stale" selectors. */

movl $GSEL(GDATA_SEL, SEL_KPL),%eax

movw %ax,%ds

movw %ax,%es

movw %ax,%gs

movw %ax,%ss

movl $GSEL(GCPU_SEL, SEL_KPL),%eax

movw %ax,%fs

/* Reload code selector by doing intersegment return. */

popl %eax

pushl $GSEL(GCODE_SEL, SEL_KPL)

pushl %eax

lret

NENTRY(x86_flush)

/* Reload code selector by doing intersegment return. */

popl %eax

pushl $GSEL(GCODE_SEL, SEL_KPL)

pushl %eax

lret

/*****************************************************************************/

* These functions are primarily used by DDB.

/* LINTSTUB: Func: int setjmp (label_t *l) */

ENTRY(setjmp)

movl 4(%esp),%eax

movl %ebx,(%eax) # save ebx

Line 701 ENTRY(setjmp)

Line 726 ENTRY(setjmp)

movl %edi,16(%eax) # save edi

movl (%esp),%edx # get rta

movl %edx,20(%eax) # save eip

xorl %eax,%eax # return 0

xorl %eax,%eax # return (0);

ret

/* LINTSTUB: Func: void longjmp (label_t *l) */

* int longjmp(label_t *)

* Used primarily by DDB.

ENTRY(longjmp)

movl 4(%esp),%eax

movl (%eax),%ebx # restore ebx

Line 718 ENTRY(longjmp)

Line 739 ENTRY(longjmp)

movl 16(%eax),%edi # restore edi

movl 20(%eax),%edx # get rta

movl %edx,(%esp) # put in return frame

movl $1,%eax # return 1

xorl %eax,%eax # return (1);

incl %eax

ret

/*****************************************************************************/

.globl _C_LABEL(uvmexp),_C_LABEL(panic)

#ifdef DIAGNOSTIC

NENTRY(switch_error)

pushl $1f

call _C_LABEL(panic)

/* NOTREACHED */

1: .asciz "cpu_switch"

#endif /* DIAGNOSTIC */

* struct lwp *cpu_switchto(struct lwp *oldlwp, struct newlwp)

* 1. if (oldlwp != NULL), save its context.

* 1. if (oldlwp != NULL), save its context and call sched_switch_unlock().

* 2. then, restore context of newlwp.

* Note that the stack frame layout is known to "struct switchframe" in

* Note that the stack frame layout is known to "struct switchframe"

* <machine/frame.h> and to the code in cpu_lwp_fork() which initializes

* in <machine/frame.h> and to the code in cpu_lwp_fork() which initializes

* it for a new lwp.

ENTRY(cpu_switchto)

Line 738 ENTRY(cpu_switchto)

Line 772 ENTRY(cpu_switchto)

movl 16(%esp),%esi # oldlwp

movl 20(%esp),%edi # newlwp

testl %esi,%esi

jz 1f

jz switch_skipsave

* Save old context.

/* Save old context. */

movl L_ADDR(%esi),%eax

movl %esp,PCB_ESP(%eax)

movl %ebp,PCB_EBP(%eax)

/* Switch to newlwp's stack. */

switch_skipsave:

1: movl L_ADDR(%edi),%ebx

* Switch to newlwp's stack.

movl L_ADDR(%edi),%ebx

movl PCB_EBP(%ebx),%ebp

movl PCB_ESP(%ebx),%esp

/* Switch TSS. Reset "task busy" flag before loading. */

* Restore the rest of newlwp's context.

* Registers:

* %ebx - new pcb

* %edi - new lwp

#if 0

/* Don't bother with the rest if switching to a system process. */

testl $L_SYSTEM,L_FLAG(%edi);

jnz switch_restored

#endif

/* Switch TSS. Reset "task busy" flag before loading. */

movl %cr3,%eax

movl %eax,PCB_CR3(%ebx) # for TSS gates

movl %eax,PCB_CR3(%ebx) /* for TSS gates */

movl CPUVAR(GDT),%ecx

#ifdef MULTIPROCESSOR

movl CPUVAR(GDT),%eax

#else

/* Load TSS info. */

movl _C_LABEL(gdt),%eax

#endif

movl L_MD_TSS_SEL(%edi),%edx

andl $~0x0200,4(%ecx,%edx, 1)

ltr %dx

/* Set curlwp. */

andl $~0x0200,4(%eax,%edx, 1)

movl %edi,CPUVAR(CURLWP)

ltr %dx

/* Don't bother with the rest if switching to a system process. */

#if 0

testl $LW_SYSTEM,L_FLAG(%edi)

switch_restored:

jnz 4f

#endif

/* Restore thread-private %fs/%gs descriptors. */

movl $0,CPUVAR(RESCHED)

movl PCB_FSD(%ebx), %eax

movl PCB_FSD+4(%ebx), %edx

movl %eax, (GUFS_SEL*8)(%ecx)

movl %edx, (GUFS_SEL*8+4)(%ecx)

movl PCB_GSD(%ebx), %eax

movl PCB_GSD+4(%ebx), %edx

movl %eax, (GUGS_SEL*8)(%ecx)

movl %edx, (GUGS_SEL*8+4)(%ecx)

/* Is this process using RAS (restartable atomic sequences)? */

movl L_PROC(%edi),%eax

cmpl $0,P_RASLIST(%eax)

jne 5f

/* Restore cr0 (including FPU state). */

* Restore cr0 (including FPU state). Raise the IPL to IPL_IPI.

cli

* FPU IPIs can alter the LWP's saved cr0. Dropping the priority

* is deferred until mi_switch(), when cpu_switchto() returns.

2: movl $IPL_IPI,CPUVAR(ILEVEL)

movl PCB_CR0(%ebx),%ecx

movl %cr0,%edx

#ifdef MULTIPROCESSOR

* If our floating point registers are on a different CPU,

* set CR0_TS so we'll trap rather than reuse bogus state.

movl PCB_FPCPU(%ebx),%eax

cmpl CPUVAR(SELF),%eax

je 3f

jz 1f

orl $CR0_TS,%ecx

/* Reloading CR0 is very expensive - avoid if possible. */

#endif

3: cmpl %edx,%ecx

je 4f

movl %ecx,%cr0

/* Return to the new LWP, returning 'oldlwp' in %eax. */

/* Interrupts are okay again. */

4: movl %esi,%eax

sti

* Check for restartable atomic sequences (RAS)

movl L_PROC(%edi),%ebx

cmpl $0,P_RASLIST(%ebx)

jne check_ras

switch_return:

movl %esi,%eax # return 'oldlwp'

popl %edi

popl %esi

popl %ebx

ret

/* Check for restartable atomic sequences (RAS). */

check_ras:

5: movl L_MD_REGS(%edi),%ecx

movl L_MD_REGS(%edi),%ebx

pushl TF_EIP(%ecx)

movl TF_EIP(%ebx),%eax

pushl %eax

pushl %esi

call _C_LABEL(ras_lookup)

addl $8,%esp

cmpl $-1,%eax

je 2b

je switch_return

movl L_MD_REGS(%edi),%ecx

movl %eax,TF_EIP(%ebx)

movl %eax,TF_EIP(%ecx)

jmp switch_return

jmp 2b

* void savectx(struct pcb *pcb);

* Update pcb, saving current processor state.

/* LINTSTUB: Func: void savectx(struct pcb *pcb) */

ENTRY(savectx)

movl 4(%esp),%edx # edx = pcb

movl 4(%esp),%edx # edx = p->p_addr

/* Save stack pointers. */

movl %esp,PCB_ESP(%edx)

movl %ebp,PCB_EBP(%edx)

ret

* osyscall()

* Old call gate entry for syscall

/* LINTSTUB: Var: char Xosyscall[1]; */

IDTVEC(osyscall)

pushfl # set eflags in trap frame

/* Set eflags in trap frame. */

pushfl

popl 8(%esp)

pushl $7 # size of instruction for restart

jmp syscall1

* syscall()

* Trap gate entry for syscall

/* LINTSTUB: Var: char Xsyscall[1]; */

IDTVEC(syscall)

pushl $2 # size of instruction for restart

syscall1:

Line 893 syscall1:

Line 947 syscall1:

call _C_LABEL(trap)

addl $4,%esp

jmp .Lsyscall_checkast /* re-check ASTs */

1: CHECK_DEFERRED_SWITCH

1: CHECK_DEFERRED_SWITCH(%eax)

jnz 9f

#ifndef DIAGNOSTIC

INTRFASTEXIT

Line 909 syscall1:

Line 963 syscall1:

int $3

#endif /* DDB */

movl $IPL_NONE,CPUVAR(ILEVEL)

jmp .Lsyscall_checkast

jmp 2b

4: .asciz "WARNING: SPL NOT LOWERED ON SYSCALL EXIT\n"

5: .asciz "WARNING: SPL NOT ZERO ON SYSCALL ENTRY\n"

6: .asciz "WARNING: WANT PMAPLOAD ON SYSCALL ENTRY\n"

Line 925 syscall1:

Line 979 syscall1:

* latch stuff in probintr() can be moved to npxprobe().

/* LINTSTUB: Func: void probeintr(void) */

* void probeintr(void)

NENTRY(probeintr)

incl _C_LABEL(npx_intrs_while_probing)

Line 940 NENTRY(probeintr)

Line 992 NENTRY(probeintr)

popl %eax

iret

/* LINTSTUB: Func: void probetrap(void) */

* void probetrap(void)

NENTRY(probetrap)

incl _C_LABEL(npx_traps_while_probing)

fnclex

iret

/* LINTSTUB: Func: int npx586bug1(int a, int b) */

* int npx586bug1(int a, int b)

NENTRY(npx586bug1)

fildl 4(%esp) # x

fildl 8(%esp) # y

Line 964 NENTRY(npx586bug1)

Line 1012 NENTRY(npx586bug1)

popl %eax

ret

#endif /* NNPX > 0 */

* void sse2_zero_page(void *pg)

* Zero a page without polluting the cache.

ENTRY(sse2_zero_page)

pushl %ebp

movl %esp,%ebp

movl 8(%esp), %edx

movl $PAGE_SIZE, %ecx

xorl %eax, %eax

.align 16

movnti %eax, 0(%edx)

movnti %eax, 4(%edx)

movnti %eax, 8(%edx)

movnti %eax, 12(%edx)

movnti %eax, 16(%edx)

movnti %eax, 20(%edx)

movnti %eax, 24(%edx)

movnti %eax, 28(%edx)

subl $32, %ecx

leal 32(%edx), %edx

jnz 1b

sfence

pop %ebp

ret

* void sse2_copy_page(void *src, void *dst)

* Copy a page without polluting the cache.

ENTRY(sse2_copy_page)

pushl %ebp

pushl %ebx

pushl %esi

pushl %edi

movl 20(%esp), %esi

movl 24(%esp), %edi

movl $PAGE_SIZE, %ebp

.align 16

movl 0(%esi), %eax

movl 4(%esi), %ebx

movl 8(%esi), %ecx

movl 12(%esi), %edx

movnti %eax, 0(%edi)

movnti %ebx, 4(%edi)

movnti %ecx, 8(%edi)

movnti %edx, 12(%edi)

subl $16, %ebp

leal 16(%esi), %esi

leal 16(%edi), %edi

jnz 1b

sfence

popl %edi

popl %esi

popl %ebx

popl %ebp

ret

CVSweb <webmaster@jp.NetBSD.org>