version 1.115, 2016/05/11 17:48:05 |
version 1.137, 2016/07/25 16:03:38 |
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*/ |
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/* |
/* |
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* Copyright (c) 1998, 2000, 2004, 2006, 2007, 2009, 2016 |
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* The NetBSD Foundation, Inc., All rights reserved. |
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* |
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* This code is derived from software contributed to The NetBSD Foundation |
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* by Charles M. Hannum, by Andrew Doran and by Maxime Villard. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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/* |
* Copyright (c) 2006 Manuel Bouyer. |
* Copyright (c) 2006 Manuel Bouyer. |
* |
* |
* Redistribution and use in source and binary forms, with or without |
* Redistribution and use in source and binary forms, with or without |
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*/ |
*/ |
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/*- |
/*- |
* Copyright (c) 1998, 2000, 2004, 2006, 2007, 2009 The NetBSD Foundation, Inc. |
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* All rights reserved. |
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* |
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* This code is derived from software contributed to The NetBSD Foundation |
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* by Charles M. Hannum, and by Andrew Doran. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
|
* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
|
* notice, this list of conditions and the following disclaimer in the |
|
* documentation and/or other materials provided with the distribution. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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/*- |
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* Copyright (c) 1990 The Regents of the University of California. |
* Copyright (c) 1990 The Regents of the University of California. |
* All rights reserved. |
* All rights reserved. |
* |
* |
Line 147 __KERNEL_RCSID(0, "$NetBSD$"); |
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Line 147 __KERNEL_RCSID(0, "$NetBSD$"); |
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#include <sys/errno.h> |
#include <sys/errno.h> |
#include <sys/syscall.h> |
#include <sys/syscall.h> |
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#include <machine/cputypes.h> |
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#include <machine/segments.h> |
#include <machine/segments.h> |
#include <machine/specialreg.h> |
#include <machine/specialreg.h> |
#include <machine/trap.h> |
#include <machine/trap.h> |
#include <machine/i82489reg.h> |
#include <machine/i82489reg.h> |
#include <machine/frameasm.h> |
#include <machine/frameasm.h> |
#include <machine/i82489reg.h> |
#include <machine/i82489reg.h> |
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#include <machine/cputypes.h> |
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#ifndef XEN |
#ifndef XEN |
#include <machine/multiboot.h> |
#include <machine/multiboot.h> |
#endif |
#endif |
Line 168 __KERNEL_RCSID(0, "$NetBSD$"); |
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Line 169 __KERNEL_RCSID(0, "$NetBSD$"); |
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#endif /* XEN */ |
#endif /* XEN */ |
#define RELOC(x) _RELOC(_C_LABEL(x)) |
#define RELOC(x) _RELOC(_C_LABEL(x)) |
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/* 32bit version of PG_NX */ |
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#define PG_NX32 0x80000000 |
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#ifndef PAE |
#ifndef PAE |
#define PROC0_PDIR_OFF 0 |
#define PROC0_PDIR_OFF 0 |
#else |
#else |
Line 188 __KERNEL_RCSID(0, "$NetBSD$"); |
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Line 192 __KERNEL_RCSID(0, "$NetBSD$"); |
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* This is done by the first instruction of fillkpt. In the non-PAE case, this |
* This is done by the first instruction of fillkpt. In the non-PAE case, this |
* instruction just clears the page table entry. |
* instruction just clears the page table entry. |
*/ |
*/ |
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#define fillkpt \ |
#define fillkpt \ |
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cmpl $0,%ecx ; /* zero-sized? */ \ |
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je 2f ; \ |
1: movl $0,(PDE_SIZE-4)(%ebx) ; /* upper 32 bits: 0 */ \ |
1: movl $0,(PDE_SIZE-4)(%ebx) ; /* upper 32 bits: 0 */ \ |
movl %eax,(%ebx) ; /* store phys addr */ \ |
movl %eax,(%ebx) ; /* store phys addr */ \ |
addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ |
addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ |
addl $PAGE_SIZE,%eax ; /* next phys page */ \ |
addl $PAGE_SIZE,%eax ; /* next phys page */ \ |
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loop 1b ; \ |
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2: ; |
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/* |
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* fillkpt_nox - Same as fillkpt, but sets the NX/XD bit. |
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*/ |
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#define fillkpt_nox \ |
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cmpl $0,%ecx ; /* zero-sized? */ \ |
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je 2f ; \ |
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pushl %ebp ; \ |
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movl RELOC(nox_flag),%ebp ; \ |
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1: movl %ebp,(PDE_SIZE-4)(%ebx) ; /* upper 32 bits: NX */ \ |
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movl %eax,(%ebx) ; /* store phys addr */ \ |
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addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ |
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addl $PAGE_SIZE,%eax ; /* next phys page */ \ |
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loop 1b ; \ |
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popl %ebp ; \ |
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2: ; |
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/* |
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* fillkpt_blank - Fill in a kernel page table with blank entries |
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* ebx = page table address |
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* ecx = number of pages to map |
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*/ |
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#define fillkpt_blank \ |
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cmpl $0,%ecx ; /* zero-sized? */ \ |
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je 2f ; \ |
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1: movl $0,(PDE_SIZE-4)(%ebx) ; /* upper 32 bits: 0 */ \ |
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movl $0,(%ebx) ; /* lower 32 bits: 0 */ \ |
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addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ |
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loop 1b ; \ |
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2: ; |
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/* |
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* killkpt - Destroy a kernel page table |
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* ebx = page table address |
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* ecx = number of pages to destroy |
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*/ |
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#define killkpt \ |
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1: movl $0,(PDE_SIZE-4)(%ebx) ; /* upper bits (for PAE) */ \ |
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movl $0,(%ebx) ; \ |
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addl $PDE_SIZE,%ebx ; \ |
loop 1b ; |
loop 1b ; |
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Line 223 __KERNEL_RCSID(0, "$NetBSD$"); |
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Line 270 __KERNEL_RCSID(0, "$NetBSD$"); |
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*/ |
*/ |
.data |
.data |
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.globl _C_LABEL(cputype) |
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.globl _C_LABEL(cpuid_level) |
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.globl _C_LABEL(esym) |
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.globl _C_LABEL(eblob) |
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.globl _C_LABEL(atdevbase) |
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.globl _C_LABEL(lwp0uarea) |
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.globl _C_LABEL(PDPpaddr) |
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.globl _C_LABEL(gdt) |
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.globl _C_LABEL(idt) |
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.globl _C_LABEL(lapic_tpr) |
.globl _C_LABEL(lapic_tpr) |
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#if NLAPIC > 0 |
#if NLAPIC > 0 |
#ifdef __ELF__ |
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.align PAGE_SIZE |
.align PAGE_SIZE |
#else |
.globl _C_LABEL(local_apic) |
.align 12 |
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#endif |
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.globl _C_LABEL(local_apic), _C_LABEL(lapic_id) |
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.type _C_LABEL(local_apic), @object |
.type _C_LABEL(local_apic), @object |
LABEL(local_apic) |
LABEL(local_apic) |
.space LAPIC_ID |
.space LAPIC_TPRI |
END(local_apic) |
END(local_apic) |
.type _C_LABEL(lapic_id), @object |
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LABEL(lapic_id) |
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.long 0x00000000 |
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.space LAPIC_TPRI-(LAPIC_ID+4) |
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END(lapic_id) |
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.type _C_LABEL(lapic_tpr), @object |
.type _C_LABEL(lapic_tpr), @object |
LABEL(lapic_tpr) |
LABEL(lapic_tpr) |
.space LAPIC_PPRI-LAPIC_TPRI |
.space PAGE_SIZE-LAPIC_TPRI |
END(lapic_tpr) |
END(lapic_tpr) |
.type _C_LABEL(lapic_ppr), @object |
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_C_LABEL(lapic_ppr): |
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.space LAPIC_ISR-LAPIC_PPRI |
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END(lapic_ppr) |
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.type _C_LABEL(lapic_isr), @object |
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_C_LABEL(lapic_isr): |
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.space PAGE_SIZE-LAPIC_ISR |
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END(lapic_isr) |
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#else |
#else |
.type _C_LABEL(lapic_tpr), @object |
.type _C_LABEL(lapic_tpr), @object |
LABEL(lapic_tpr) |
LABEL(lapic_tpr) |
.long 0 |
.long 0 |
END(lapic_tpr) |
END(lapic_tpr) |
#endif |
#endif |
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.globl _C_LABEL(tablesize) |
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.globl _C_LABEL(nox_flag) |
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.globl _C_LABEL(cputype) |
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.globl _C_LABEL(cpuid_level) |
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.globl _C_LABEL(esym) |
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.globl _C_LABEL(eblob) |
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.globl _C_LABEL(atdevbase) |
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.globl _C_LABEL(PDPpaddr) |
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.globl _C_LABEL(lwp0uarea) |
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.globl _C_LABEL(gdt) |
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.globl _C_LABEL(idt) |
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.type _C_LABEL(tablesize), @object |
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_C_LABEL(tablesize): .long 0 |
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END(tablesize) |
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.type _C_LABEL(nox_flag), @object |
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LABEL(nox_flag) .long 0 /* 32bit NOX flag, set if supported */ |
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END(nox_flag) |
.type _C_LABEL(cputype), @object |
.type _C_LABEL(cputype), @object |
LABEL(cputype) .long 0 /* are we 80486, Pentium, or.. */ |
LABEL(cputype) .long 0 /* are we 80486, Pentium, or.. */ |
END(cputype) |
END(cputype) |
.type _C_LABEL(cpuid_level), @object |
.type _C_LABEL(cpuid_level), @object |
LABEL(cpuid_level) .long 0 |
LABEL(cpuid_level) .long -1 /* max. level accepted by cpuid instr */ |
END(cpuid_level) |
END(cpuid_level) |
.type _C_LABEL(atdevbase), @object |
.type _C_LABEL(atdevbase), @object |
LABEL(atdevbase) .long 0 /* location of start of iomem in virt */ |
LABEL(atdevbase) .long 0 /* location of start of iomem in virt */ |
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.type _C_LABEL(PDPpaddr), @object |
.type _C_LABEL(PDPpaddr), @object |
LABEL(PDPpaddr) .long 0 /* paddr of PDP, for libkvm */ |
LABEL(PDPpaddr) .long 0 /* paddr of PDP, for libkvm */ |
END(PDPpaddr) |
END(PDPpaddr) |
.type _C_LABEL(tablesize), @object |
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_C_LABEL(tablesize): .long 0 |
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END(tablesize) |
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/* Space for the temporary stack */ |
/* Space for the temporary stack */ |
.size tmpstk, tmpstk - . |
.size tmpstk, tmpstk - . |
Line 340 _C_LABEL(Multiboot_Header): |
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Line 378 _C_LABEL(Multiboot_Header): |
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1: |
1: |
/* |
/* |
* At this point, we know that a NetBSD-specific boot loader |
* At this point, we know that a NetBSD-specific boot loader |
* booted this kernel. The stack carries the following parameters: |
* booted this kernel. |
* (boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem), |
* |
* 4 bytes each. |
* Load parameters from the stack (32 bits): |
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* boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem |
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* We are not interested in 'bootdev'. |
*/ |
*/ |
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addl $4,%esp /* Discard return address to boot loader */ |
addl $4,%esp /* Discard return address to boot loader */ |
call _C_LABEL(native_loader) |
call _C_LABEL(native_loader) |
addl $24,%esp |
addl $24,%esp |
Line 357 _C_LABEL(Multiboot_Header): |
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Line 398 _C_LABEL(Multiboot_Header): |
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xorl %eax,%eax |
xorl %eax,%eax |
movw %ax,%fs |
movw %ax,%fs |
movw %ax,%gs |
movw %ax,%gs |
decl %eax |
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movl %eax,RELOC(cpuid_level) |
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/* Find out our CPU type. */ |
/* Find out our CPU type. */ |
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Line 520 try586: /* Use the `cpuid' instruction. |
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Line 559 try586: /* Use the `cpuid' instruction. |
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cpuid |
cpuid |
movl %eax,RELOC(cpuid_level) |
movl %eax,RELOC(cpuid_level) |
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/* |
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* Retrieve the NX/XD flag. We use the 32bit version of PG_NX. |
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*/ |
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movl $0x80000001,%eax |
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cpuid |
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andl $CPUID_NOX,%edx |
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jz no_NOX |
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movl $PG_NX32,RELOC(nox_flag) |
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no_NOX: |
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2: |
2: |
/* |
/* |
* Finished with old stack; load new %esp now instead of later so we |
* Finished with old stack; load new %esp now instead of later so we |
Line 537 try586: /* Use the `cpuid' instruction. |
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Line 586 try586: /* Use the `cpuid' instruction. |
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movl $_RELOC(tmpstk),%esp |
movl $_RELOC(tmpstk),%esp |
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/* |
/* |
* Virtual address space of kernel, without PAE. The page dir is 1 page long. |
* There are two different layouts possible, depending on whether PAE is |
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* enabled or not. |
* |
* |
* text | data | bss | [syms] | [blobs] | page dir | proc0 kstack | L1 ptp |
* If PAE is not enabled, there are two levels of pages: PD -> PT. They will |
* 0 1 2 3 |
* be referred to as: L2 -> L1. L2 is 1 page long. The BOOTSTRAP TABLES have |
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* the following layout: |
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* +-----+------------+----+ |
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* | L2 -> PROC0 STK -> L1 | |
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* +-----+------------+----+ |
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* |
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* If PAE is enabled, there are three levels of pages: PDP -> PD -> PT. They |
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* will be referred to as: L3 -> L2 -> L1. L3 is 1 page long, L2 is 4 page |
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* long. The BOOTSTRAP TABLES have the following layout: |
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* +-----+-----+------------+----+ |
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* | L3 -> L2 -> PROC0 STK -> L1 | |
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* +-----+-----+------------+----+ |
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* |
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* Virtual address space of the kernel in both cases: |
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* +------+--------+------+-----+--------+---------------------+----------- |
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* | TEXT | RODATA | DATA | BSS | [SYMS] | [PRELOADED MODULES] | BOOTSTRAP |
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* +------+--------+------+-----+--------+---------------------+----------- |
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* (1) (2) (3) |
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* |
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* -------+-------------+ |
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* TABLES | ISA I/O MEM | |
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* -------+-------------+ |
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* (4) |
* |
* |
* Virtual address space of kernel, with PAE. We need 4 pages for the page dir |
* PROC0 STK is obviously not linked as a page level. It just happens to be |
* and 1 page for the L3. |
* caught between L2 and L1. |
* text | data | bss | [syms] | [blobs] | L3 | page dir | proc0 kstack | L1 ptp |
* |
* 0 1 5 6 7 |
* Important note: the kernel segments are properly 4k-aligned |
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* (see kern.ldscript), so there's no need to enforce alignment. |
*/ |
*/ |
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/* Find end of kernel image. */ |
/* Find end of kernel image; brings us on (1). */ |
movl $RELOC(end),%edi |
movl $RELOC(end),%edi |
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#if (NKSYMS || defined(DDB) || defined(MODULAR)) && !defined(makeoptions_COPY_SYMTAB) |
#if (NKSYMS || defined(DDB) || defined(MODULAR)) && !defined(makeoptions_COPY_SYMTAB) |
/* Save the symbols (if loaded). */ |
/* Save the symbols (if loaded); brinds us on (2). */ |
movl RELOC(esym),%eax |
movl RELOC(esym),%eax |
testl %eax,%eax |
testl %eax,%eax |
jz 1f |
jz 1f |
Line 561 try586: /* Use the `cpuid' instruction. |
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Line 634 try586: /* Use the `cpuid' instruction. |
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1: |
1: |
#endif |
#endif |
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/* Skip over any modules/blobs. */ |
/* Skip over any modules/blobs; brings us on (3). */ |
movl RELOC(eblob),%eax |
movl RELOC(eblob),%eax |
testl %eax,%eax |
testl %eax,%eax |
jz 1f |
jz 1f |
subl $KERNBASE,%eax |
subl $KERNBASE,%eax |
movl %eax,%edi |
movl %eax,%edi |
1: |
1: |
/* Compute sizes */ |
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/* We are on (3). Align up for BOOTSTRAP TABLES. */ |
movl %edi,%esi |
movl %edi,%esi |
addl $PGOFSET,%esi |
addl $PGOFSET,%esi |
andl $~PGOFSET,%esi |
andl $~PGOFSET,%esi |
Line 577 try586: /* Use the `cpuid' instruction. |
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Line 651 try586: /* Use the `cpuid' instruction. |
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movl %esi,%eax |
movl %esi,%eax |
addl $~L2_FRAME,%eax |
addl $~L2_FRAME,%eax |
shrl $L2_SHIFT,%eax |
shrl $L2_SHIFT,%eax |
incl %eax /* one more ptp for VAs stolen by bootstrap */ |
incl %eax /* one more PTP for VAs stolen by bootstrap */ |
1: movl %eax,RELOC(nkptp)+1*4 |
1: movl %eax,RELOC(nkptp)+1*4 |
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/* tablesize = (PDP_SIZE + UPAGES + nkptp) << PGSHIFT; */ |
/* tablesize = (PDP_SIZE + UPAGES + nkptp) << PGSHIFT; */ |
addl $(PDP_SIZE+UPAGES),%eax |
addl $(PDP_SIZE+UPAGES),%eax |
#ifdef PAE |
#ifdef PAE |
incl %eax /* one more page for the L3 PD */ |
incl %eax /* one more page for L3 */ |
shll $PGSHIFT+1,%eax /* PTP tables are twice larger with PAE */ |
shll $PGSHIFT+1,%eax /* PTP tables are twice larger with PAE */ |
#else |
#else |
shll $PGSHIFT,%eax |
shll $PGSHIFT,%eax |
#endif |
#endif |
movl %eax,RELOC(tablesize) |
movl %eax,RELOC(tablesize) |
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/* ensure that nkptp covers bootstrap tables */ |
/* Ensure that nkptp covers BOOTSTRAP TABLES. */ |
addl %esi,%eax |
addl %esi,%eax |
addl $~L2_FRAME,%eax |
addl $~L2_FRAME,%eax |
shrl $L2_SHIFT,%eax |
shrl $L2_SHIFT,%eax |
Line 598 try586: /* Use the `cpuid' instruction. |
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Line 672 try586: /* Use the `cpuid' instruction. |
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cmpl %eax,RELOC(nkptp)+1*4 |
cmpl %eax,RELOC(nkptp)+1*4 |
jnz 1b |
jnz 1b |
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/* Clear tables */ |
/* Now, zero out the BOOTSTRAP TABLES (before filling them in). */ |
movl %esi,%edi |
movl %esi,%edi |
xorl %eax,%eax |
xorl %eax,%eax |
cld |
cld |
movl RELOC(tablesize),%ecx |
movl RELOC(tablesize),%ecx |
shrl $2,%ecx |
shrl $2,%ecx |
rep |
rep |
stosl |
stosl /* copy eax -> edi */ |
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leal (PROC0_PTP1_OFF)(%esi), %ebx |
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/* |
/* |
* Build initial page tables. |
* Build the page tables and levels. We go from L1 to L2/L3, and link the levels |
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* together. Note: RELOC computes &addr - KERNBASE in 32 bits; the value can't |
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* be > 4G, or we can't deal with it anyway, since we are in 32bit mode. |
*/ |
*/ |
/* |
/* |
* Compute &__data_start - KERNBASE. This can't be > 4G, |
* Build L1. |
* or we can't deal with it anyway, since we can't load it in |
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* 32 bit mode. So use the bottom 32 bits. |
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*/ |
*/ |
movl $RELOC(__data_start),%edx |
leal (PROC0_PTP1_OFF)(%esi),%ebx |
andl $~PGOFSET,%edx |
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/* |
/* Skip the first MB. */ |
* Skip the first MB. |
movl $(KERNTEXTOFF - KERNBASE),%ecx |
*/ |
shrl $PGSHIFT,%ecx |
movl $_RELOC(KERNTEXTOFF),%eax |
fillkpt_blank |
movl %eax,%ecx |
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shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */ |
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#ifdef PAE |
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shll $1,%ecx /* pdes are twice larger with PAE */ |
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#endif |
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addl %ecx,%ebx |
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/* Map the kernel text read-only. */ |
/* Map the kernel text RX. */ |
movl %edx,%ecx |
movl $(KERNTEXTOFF - KERNBASE),%eax /* start of TEXT */ |
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movl $RELOC(__rodata_start),%ecx |
subl %eax,%ecx |
subl %eax,%ecx |
shrl $PGSHIFT,%ecx |
shrl $PGSHIFT,%ecx |
orl $(PG_V|PG_KR),%eax |
orl $(PG_V|PG_KR),%eax |
fillkpt |
fillkpt |
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/* Map the data, BSS, and bootstrap tables read-write. */ |
/* Map the kernel rodata R. */ |
leal (PG_V|PG_KW)(%edx),%eax |
movl $RELOC(__rodata_start),%eax |
movl RELOC(tablesize),%ecx |
movl $RELOC(__data_start),%ecx |
addl %esi,%ecx /* end of tables */ |
subl %eax,%ecx |
subl %edx,%ecx /* subtract end of text */ |
|
shrl $PGSHIFT,%ecx |
shrl $PGSHIFT,%ecx |
fillkpt |
orl $(PG_V|PG_KR),%eax |
|
fillkpt_nox |
|
|
/* Map ISA I/O mem (later atdevbase) */ |
/* Map the kernel data+bss RW. */ |
movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax |
movl $RELOC(__data_start),%eax |
movl $(IOM_SIZE>>PGSHIFT),%ecx |
movl $RELOC(__kernel_end),%ecx |
fillkpt |
subl %eax,%ecx |
|
shrl $PGSHIFT,%ecx |
|
orl $(PG_V|PG_KW),%eax |
|
fillkpt_nox |
|
|
/* |
/* Map [SYMS]+[PRELOADED MODULES] RW. */ |
* Construct a page table directory. |
movl $RELOC(__kernel_end),%eax |
*/ |
movl %esi,%ecx /* start of BOOTSTRAP TABLES */ |
/* Set up top level entries for identity mapping */ |
subl %eax,%ecx |
|
shrl $PGSHIFT,%ecx |
|
orl $(PG_V|PG_KW),%eax |
|
fillkpt_nox |
|
|
|
/* Map the BOOTSTRAP TABLES RW. */ |
|
movl %esi,%eax /* start of BOOTSTRAP TABLES */ |
|
movl RELOC(tablesize),%ecx /* length of BOOTSTRAP TABLES */ |
|
shrl $PGSHIFT,%ecx |
|
orl $(PG_V|PG_KW),%eax |
|
fillkpt_nox |
|
|
|
/* We are on (4). Map ISA I/O MEM RW. */ |
|
movl $IOM_BEGIN,%eax |
|
movl $IOM_SIZE,%ecx /* size of ISA I/O MEM */ |
|
shrl $PGSHIFT,%ecx |
|
orl $(PG_V|PG_KW/*|PG_N*/),%eax |
|
fillkpt_nox |
|
|
|
/* |
|
* Build L2 for identity mapping. Linked to L1. |
|
*/ |
leal (PROC0_PDIR_OFF)(%esi),%ebx |
leal (PROC0_PDIR_OFF)(%esi),%ebx |
leal (PROC0_PTP1_OFF)(%esi),%eax |
leal (PROC0_PTP1_OFF)(%esi),%eax |
orl $(PG_V|PG_KW), %eax |
orl $(PG_V|PG_KW),%eax |
movl RELOC(nkptp)+1*4,%ecx |
movl RELOC(nkptp)+1*4,%ecx |
fillkpt |
fillkpt |
|
|
/* Set up top level entries for actual kernel mapping */ |
/* Set up L2 entries for actual kernel mapping */ |
leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*PDE_SIZE)(%esi),%ebx |
leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx |
leal (PROC0_PTP1_OFF)(%esi),%eax |
leal (PROC0_PTP1_OFF)(%esi),%eax |
orl $(PG_V|PG_KW), %eax |
orl $(PG_V|PG_KW),%eax |
movl RELOC(nkptp)+1*4,%ecx |
movl RELOC(nkptp)+1*4,%ecx |
fillkpt |
fillkpt |
|
|
/* Install a PDE recursively mapping page directory as a page table! */ |
/* Install recursive top level PDE */ |
leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*PDE_SIZE)(%esi),%ebx |
leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE * PDE_SIZE)(%esi),%ebx |
leal (PROC0_PDIR_OFF)(%esi),%eax |
leal (PROC0_PDIR_OFF)(%esi),%eax |
orl $(PG_V|PG_KW),%eax |
orl $(PG_V|PG_KW),%eax |
movl $PDP_SIZE,%ecx |
movl $PDP_SIZE,%ecx |
fillkpt |
fillkpt_nox |
|
|
#ifdef PAE |
#ifdef PAE |
/* Fill in proc0 L3 page with entries pointing to the page dirs */ |
/* |
|
* Build L3. Linked to L2. |
|
*/ |
leal (PROC0_L3_OFF)(%esi),%ebx |
leal (PROC0_L3_OFF)(%esi),%ebx |
leal (PROC0_PDIR_OFF)(%esi),%eax |
leal (PROC0_PDIR_OFF)(%esi),%eax |
orl $(PG_V),%eax |
orl $(PG_V),%eax |
Line 689 try586: /* Use the `cpuid' instruction. |
|
Line 781 try586: /* Use the `cpuid' instruction. |
|
movl %eax,%cr4 |
movl %eax,%cr4 |
#endif |
#endif |
|
|
/* Save phys. addr of PDP, for libkvm. */ |
/* Save physical address of L2. */ |
leal (PROC0_PDIR_OFF)(%esi),%eax |
leal (PROC0_PDIR_OFF)(%esi),%eax |
movl %eax,RELOC(PDPpaddr) |
movl %eax,RELOC(PDPpaddr) |
|
|
/* |
/* |
* Startup checklist: |
* Startup checklist: |
* 1. Load %cr3 with pointer to PDIR (or L3 PD page for PAE). |
* 1. Load %cr3 with pointer to L2 (or L3 for PAE). |
*/ |
*/ |
movl %esi,%eax /* phys address of PTD in proc0 */ |
movl %esi,%eax |
movl %eax,%cr3 /* load PTD addr into MMU */ |
movl %eax,%cr3 |
|
|
/* |
/* |
* 2. Enable paging and the rest of it. |
* 2. Set NOX in EFER, if available. |
|
*/ |
|
movl RELOC(nox_flag),%ebx |
|
cmpl $0,%ebx |
|
je skip_NOX |
|
movl $MSR_EFER,%ecx |
|
rdmsr |
|
xorl %eax,%eax |
|
orl $(EFER_NXE),%eax |
|
wrmsr |
|
skip_NOX: |
|
|
|
/* |
|
* 3. Enable paging and the rest of it. |
*/ |
*/ |
movl %cr0,%eax |
movl %cr0,%eax |
orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM),%eax |
orl $(CR0_PE|CR0_PG|CR0_NE|CR0_TS|CR0_MP|CR0_WP|CR0_AM),%eax |
Line 712 try586: /* Use the `cpuid' instruction. |
|
Line 817 try586: /* Use the `cpuid' instruction. |
|
|
|
begin: |
begin: |
/* |
/* |
* We have arrived. |
* We have arrived. There's no need anymore for the identity mapping in |
* There's no need anymore for the identity mapping in low |
* low memory, remove it. |
* memory, remove it. |
|
*/ |
*/ |
movl _C_LABEL(nkptp)+1*4,%ecx |
movl _C_LABEL(nkptp)+1*4,%ecx |
leal (PROC0_PDIR_OFF)(%esi),%ebx /* old, phys address of PDIR */ |
leal (PROC0_PDIR_OFF)(%esi),%ebx /* old, phys address of PDIR */ |
addl $(KERNBASE), %ebx /* new, virt address of PDIR */ |
addl $(KERNBASE), %ebx /* new, virt address of PDIR */ |
1: movl $0,(PDE_SIZE-4)(%ebx) /* upper bits (for PAE) */ |
killkpt |
movl $0,(%ebx) |
|
addl $PDE_SIZE,%ebx |
|
loop 1b |
|
|
|
/* Relocate atdevbase. */ |
/* Relocate atdevbase. */ |
movl $KERNBASE,%edx |
movl $KERNBASE,%edx |
|
|
|
|
/* |
/* |
* struct lwp *cpu_switchto(struct lwp *oldlwp, struct lwp *newlwp, |
* struct lwp *cpu_switchto(struct lwp *oldlwp, struct lwp *newlwp, |
* bool returning) |
* bool returning) |
* |
* |
* 1. if (oldlwp != NULL), save its context. |
* 1. if (oldlwp != NULL), save its context. |
* 2. then, restore context of newlwp. |
* 2. then, restore context of newlwp. |
Line 1009 ENTRY(cpu_switchto) |
|
Line 1110 ENTRY(cpu_switchto) |
|
movl 16(%esp),%esi /* oldlwp */ |
movl 16(%esp),%esi /* oldlwp */ |
movl 20(%esp),%edi /* newlwp */ |
movl 20(%esp),%edi /* newlwp */ |
movl 24(%esp),%edx /* returning */ |
movl 24(%esp),%edx /* returning */ |
testl %esi,%esi |
|
jz 1f |
testl %esi,%esi /* oldlwp = NULL ? */ |
|
jz skip_save |
|
|
/* Save old context. */ |
/* Save old context. */ |
movl L_PCB(%esi),%eax |
movl L_PCB(%esi),%eax |
movl %esp,PCB_ESP(%eax) |
movl %esp,PCB_ESP(%eax) |
movl %ebp,PCB_EBP(%eax) |
movl %ebp,PCB_EBP(%eax) |
|
skip_save: |
|
|
/* Switch to newlwp's stack. */ |
/* Switch to newlwp's stack. */ |
1: movl L_PCB(%edi),%ebx |
movl L_PCB(%edi),%ebx |
movl PCB_EBP(%ebx),%ebp |
movl PCB_EBP(%ebx),%ebp |
movl PCB_ESP(%ebx),%esp |
movl PCB_ESP(%ebx),%esp |
|
|
Line 1031 ENTRY(cpu_switchto) |
|
Line 1134 ENTRY(cpu_switchto) |
|
|
|
/* Skip the rest if returning to a pinned LWP. */ |
/* Skip the rest if returning to a pinned LWP. */ |
testl %edx,%edx |
testl %edx,%edx |
jnz 4f |
jnz switch_return |
|
|
|
/* Switch ring0 stack */ |
#ifdef XEN |
#ifdef XEN |
pushl %edi |
pushl %edi |
call _C_LABEL(i386_switch_context) |
call _C_LABEL(i386_switch_context) |
addl $4,%esp |
addl $4,%esp |
#else /* !XEN */ |
#else |
/* Switch ring0 esp */ |
|
movl PCB_ESP0(%ebx),%eax |
movl PCB_ESP0(%ebx),%eax |
movl %eax,CPUVAR(ESP0) |
movl %eax,CPUVAR(ESP0) |
#endif /* !XEN */ |
#endif |
|
|
/* Don't bother with the rest if switching to a system process. */ |
/* Don't bother with the rest if switching to a system process. */ |
testl $LW_SYSTEM,L_FLAG(%edi) |
testl $LW_SYSTEM,L_FLAG(%edi) |
jnz 4f |
jnz switch_return |
|
|
#ifndef XEN |
#ifndef XEN |
/* Restore thread-private %fs/%gs descriptors. */ |
/* Restore thread-private %fs/%gs descriptors. */ |
movl CPUVAR(GDT),%ecx |
movl CPUVAR(GDT),%ecx |
movl PCB_FSD(%ebx), %eax |
movl PCB_FSD(%ebx),%eax |
movl PCB_FSD+4(%ebx), %edx |
movl PCB_FSD+4(%ebx),%edx |
movl %eax, (GUFS_SEL*8)(%ecx) |
movl %eax,(GUFS_SEL*8)(%ecx) |
movl %edx, (GUFS_SEL*8+4)(%ecx) |
movl %edx,(GUFS_SEL*8+4)(%ecx) |
movl PCB_GSD(%ebx), %eax |
movl PCB_GSD(%ebx),%eax |
movl PCB_GSD+4(%ebx), %edx |
movl PCB_GSD+4(%ebx),%edx |
movl %eax, (GUGS_SEL*8)(%ecx) |
movl %eax,(GUGS_SEL*8)(%ecx) |
movl %edx, (GUGS_SEL*8+4)(%ecx) |
movl %edx,(GUGS_SEL*8+4)(%ecx) |
#endif /* !XEN */ |
#endif /* !XEN */ |
|
|
/* Switch I/O bitmap */ |
/* Switch I/O bitmap */ |
Line 1070 ENTRY(cpu_switchto) |
|
Line 1173 ENTRY(cpu_switchto) |
|
/* Is this process using RAS (restartable atomic sequences)? */ |
/* Is this process using RAS (restartable atomic sequences)? */ |
movl L_PROC(%edi),%eax |
movl L_PROC(%edi),%eax |
cmpl $0,P_RASLIST(%eax) |
cmpl $0,P_RASLIST(%eax) |
jne 5f |
je no_RAS |
|
|
|
/* Handle restartable atomic sequences (RAS). */ |
|
movl L_MD_REGS(%edi),%ecx |
|
pushl TF_EIP(%ecx) |
|
pushl %eax |
|
call _C_LABEL(ras_lookup) |
|
addl $8,%esp |
|
cmpl $-1,%eax |
|
je no_RAS |
|
movl L_MD_REGS(%edi),%ecx |
|
movl %eax,TF_EIP(%ecx) |
|
no_RAS: |
|
|
/* |
/* |
* Restore cr0 (including FPU state). Raise the IPL to IPL_HIGH. |
* Restore cr0 (including FPU state). Raise the IPL to IPL_HIGH. |
* FPU IPIs can alter the LWP's saved cr0. Dropping the priority |
* FPU IPIs can alter the LWP's saved cr0. Dropping the priority |
* is deferred until mi_switch(), when cpu_switchto() returns. |
* is deferred until mi_switch(), when cpu_switchto() returns. |
*/ |
*/ |
2: |
|
#ifdef XEN |
#ifdef XEN |
pushl %edi |
pushl %edi |
call _C_LABEL(i386_tls_switch) |
call _C_LABEL(i386_tls_switch) |
Line 1092 ENTRY(cpu_switchto) |
|
Line 1206 ENTRY(cpu_switchto) |
|
* set CR0_TS so we'll trap rather than reuse bogus state. |
* set CR0_TS so we'll trap rather than reuse bogus state. |
*/ |
*/ |
cmpl CPUVAR(FPCURLWP),%edi |
cmpl CPUVAR(FPCURLWP),%edi |
je 3f |
je skip_TS |
orl $CR0_TS,%ecx |
orl $CR0_TS,%ecx |
|
skip_TS: |
|
|
/* Reloading CR0 is very expensive - avoid if possible. */ |
/* Reloading CR0 is very expensive - avoid if possible. */ |
3: cmpl %edx,%ecx |
cmpl %edx,%ecx |
je 4f |
je switch_return |
movl %ecx,%cr0 |
movl %ecx,%cr0 |
#endif /* !XEN */ |
#endif /* !XEN */ |
|
|
|
switch_return: |
/* Return to the new LWP, returning 'oldlwp' in %eax. */ |
/* Return to the new LWP, returning 'oldlwp' in %eax. */ |
4: movl %esi,%eax |
movl %esi,%eax |
popl %edi |
popl %edi |
popl %esi |
popl %esi |
popl %ebx |
popl %ebx |
ret |
ret |
|
|
/* Check for restartable atomic sequences (RAS). */ |
|
5: movl L_MD_REGS(%edi),%ecx |
|
pushl TF_EIP(%ecx) |
|
pushl %eax |
|
call _C_LABEL(ras_lookup) |
|
addl $8,%esp |
|
cmpl $-1,%eax |
|
je 2b |
|
movl L_MD_REGS(%edi),%ecx |
|
movl %eax,TF_EIP(%ecx) |
|
jmp 2b |
|
|
|
.Lcopy_iobitmap: |
.Lcopy_iobitmap: |
/* Copy I/O bitmap. */ |
/* Copy I/O bitmap. */ |
incl _C_LABEL(pmap_iobmp_evcnt)+EV_COUNT |
incl _C_LABEL(pmap_iobmp_evcnt)+EV_COUNT |