Please note that diffs are not public domain; they are subject to the copyright notices on the relevant files. =================================================================== RCS file: /ftp/cvs/cvsroot/src/sys/arch/i386/i386/locore.S,v rcsdiff: /ftp/cvs/cvsroot/src/sys/arch/i386/i386/locore.S,v: warning: Unknown phrases like `commitid ...;' are present. retrieving revision 1.121 retrieving revision 1.135.2.3 diff -u -p -r1.121 -r1.135.2.3 --- src/sys/arch/i386/i386/locore.S 2016/05/14 08:49:16 1.121 +++ src/sys/arch/i386/i386/locore.S 2017/01/07 08:56:18 1.135.2.3 @@ -1,10 +1,39 @@ -/* $NetBSD: locore.S,v 1.121 2016/05/14 08:49:16 maxv Exp $ */ +/* $NetBSD: locore.S,v 1.135.2.3 2017/01/07 08:56:18 pgoyette Exp $ */ /* * Copyright-o-rama! */ /* + * Copyright (c) 1998, 2000, 2004, 2006, 2007, 2009, 2016 + * The NetBSD Foundation, Inc., All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Charles M. Hannum, by Andrew Doran and by Maxime Villard. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* * Copyright (c) 2006 Manuel Bouyer. * * Redistribution and use in source and binary forms, with or without @@ -65,35 +94,6 @@ */ /*- - * Copyright (c) 1998, 2000, 2004, 2006, 2007, 2009 The NetBSD Foundation, Inc. - * All rights reserved. - * - * This code is derived from software contributed to The NetBSD Foundation - * by Charles M. Hannum, and by Andrew Doran. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS - * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED - * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS - * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -/*- * Copyright (c) 1990 The Regents of the University of California. * All rights reserved. * @@ -128,7 +128,7 @@ */ #include -__KERNEL_RCSID(0, "$NetBSD: locore.S,v 1.121 2016/05/14 08:49:16 maxv Exp $"); +__KERNEL_RCSID(0, "$NetBSD: locore.S,v 1.135.2.3 2017/01/07 08:56:18 pgoyette Exp $"); #include "opt_compat_oldboot.h" #include "opt_copy_symtab.h" @@ -147,13 +147,14 @@ __KERNEL_RCSID(0, "$NetBSD: locore.S,v 1 #include #include -#include #include #include #include #include #include #include +#include + #ifndef XEN #include #endif @@ -191,18 +192,22 @@ __KERNEL_RCSID(0, "$NetBSD: locore.S,v 1 * This is done by the first instruction of fillkpt. In the non-PAE case, this * instruction just clears the page table entry. */ - #define fillkpt \ + cmpl $0,%ecx ; /* zero-sized? */ \ + je 2f ; \ 1: movl $0,(PDE_SIZE-4)(%ebx) ; /* upper 32 bits: 0 */ \ movl %eax,(%ebx) ; /* store phys addr */ \ addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ addl $PAGE_SIZE,%eax ; /* next phys page */ \ - loop 1b ; + loop 1b ; \ +2: ; /* * fillkpt_nox - Same as fillkpt, but sets the NX/XD bit. */ #define fillkpt_nox \ + cmpl $0,%ecx ; /* zero-sized? */ \ + je 2f ; \ pushl %ebp ; \ movl RELOC(nox_flag),%ebp ; \ 1: movl %ebp,(PDE_SIZE-4)(%ebx) ; /* upper 32 bits: NX */ \ @@ -210,7 +215,22 @@ __KERNEL_RCSID(0, "$NetBSD: locore.S,v 1 addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ addl $PAGE_SIZE,%eax ; /* next phys page */ \ loop 1b ; \ - popl %ebp ; + popl %ebp ; \ +2: ; + +/* + * fillkpt_blank - Fill in a kernel page table with blank entries + * ebx = page table address + * ecx = number of pages to map + */ +#define fillkpt_blank \ + cmpl $0,%ecx ; /* zero-sized? */ \ + je 2f ; \ +1: movl $0,(PDE_SIZE-4)(%ebx) ; /* upper 32 bits: 0 */ \ + movl $0,(%ebx) ; /* lower 32 bits: 0 */ \ + addl $PDE_SIZE,%ebx ; /* next PTE/PDE */ \ + loop 1b ; \ +2: ; /* * killkpt - Destroy a kernel page table @@ -250,53 +270,21 @@ __KERNEL_RCSID(0, "$NetBSD: locore.S,v 1 */ .data + .globl _C_LABEL(tablesize) .globl _C_LABEL(nox_flag) .globl _C_LABEL(cputype) .globl _C_LABEL(cpuid_level) .globl _C_LABEL(esym) .globl _C_LABEL(eblob) .globl _C_LABEL(atdevbase) - .globl _C_LABEL(lwp0uarea) .globl _C_LABEL(PDPpaddr) + .globl _C_LABEL(lwp0uarea) .globl _C_LABEL(gdt) .globl _C_LABEL(idt) - .globl _C_LABEL(lapic_tpr) - -#if NLAPIC > 0 -#ifdef __ELF__ - .align PAGE_SIZE -#else - .align 12 -#endif - .globl _C_LABEL(local_apic), _C_LABEL(lapic_id) - .type _C_LABEL(local_apic), @object -LABEL(local_apic) - .space LAPIC_ID -END(local_apic) - .type _C_LABEL(lapic_id), @object -LABEL(lapic_id) - .long 0x00000000 - .space LAPIC_TPRI-(LAPIC_ID+4) -END(lapic_id) - .type _C_LABEL(lapic_tpr), @object -LABEL(lapic_tpr) - .space LAPIC_PPRI-LAPIC_TPRI -END(lapic_tpr) - .type _C_LABEL(lapic_ppr), @object -_C_LABEL(lapic_ppr): - .space LAPIC_ISR-LAPIC_PPRI -END(lapic_ppr) - .type _C_LABEL(lapic_isr), @object -_C_LABEL(lapic_isr): - .space PAGE_SIZE-LAPIC_ISR -END(lapic_isr) -#else - .type _C_LABEL(lapic_tpr), @object -LABEL(lapic_tpr) - .long 0 -END(lapic_tpr) -#endif + .type _C_LABEL(tablesize), @object +_C_LABEL(tablesize): .long 0 +END(tablesize) .type _C_LABEL(nox_flag), @object LABEL(nox_flag) .long 0 /* 32bit NOX flag, set if supported */ END(nox_flag) @@ -304,7 +292,7 @@ END(nox_flag) LABEL(cputype) .long 0 /* are we 80486, Pentium, or.. */ END(cputype) .type _C_LABEL(cpuid_level), @object -LABEL(cpuid_level) .long 0 +LABEL(cpuid_level) .long -1 /* max. level accepted by cpuid instr */ END(cpuid_level) .type _C_LABEL(atdevbase), @object LABEL(atdevbase) .long 0 /* location of start of iomem in virt */ @@ -315,9 +303,6 @@ END(lwp0uarea) .type _C_LABEL(PDPpaddr), @object LABEL(PDPpaddr) .long 0 /* paddr of PDP, for libkvm */ END(PDPpaddr) - .type _C_LABEL(tablesize), @object -_C_LABEL(tablesize): .long 0 -END(tablesize) /* Space for the temporary stack */ .size tmpstk, tmpstk - . @@ -392,8 +377,6 @@ _C_LABEL(Multiboot_Header): xorl %eax,%eax movw %ax,%fs movw %ax,%gs - decl %eax - movl %eax,RELOC(cpuid_level) /* Find out our CPU type. */ @@ -555,6 +538,16 @@ try586: /* Use the `cpuid' instruction. cpuid movl %eax,RELOC(cpuid_level) + /* + * Retrieve the NX/XD flag. We use the 32bit version of PG_NX. + */ + movl $0x80000001,%eax + cpuid + andl $CPUID_NOX,%edx + jz no_NOX + movl $PG_NX32,RELOC(nox_flag) +no_NOX: + 2: /* * Finished with old stack; load new %esp now instead of later so we @@ -571,16 +564,6 @@ try586: /* Use the `cpuid' instruction. */ movl $_RELOC(tmpstk),%esp - /* - * Retrieve the NX/XD flag. We use the 32bit version of PG_NX. - */ - movl $0x80000001,%eax - cpuid - andl $CPUID_NOX,%edx - jz no_NOX - movl $PG_NX32,RELOC(nox_flag) -no_NOX: - /* * There are two different layouts possible, depending on whether PAE is * enabled or not. @@ -605,17 +588,20 @@ no_NOX: * +------+--------+------+-----+--------+---------------------+----------- * (1) (2) (3) * - * -------+------------+ - * TABLES | ISA IO MEM | - * -------+------------+ + * -------+-------------+ + * TABLES | ISA I/O MEM | + * -------+-------------+ * (4) * * PROC0 STK is obviously not linked as a page level. It just happens to be * caught between L2 and L1. + * + * Important note: the kernel segments are properly 4k-aligned + * (see kern.ldscript), so there's no need to enforce alignment. */ /* Find end of kernel image; brings us on (1). */ - movl $RELOC(end),%edi + movl $RELOC(__kernel_end),%edi #if (NKSYMS || defined(DDB) || defined(MODULAR)) && !defined(makeoptions_COPY_SYMTAB) /* Save the symbols (if loaded); brinds us on (2). */ @@ -647,7 +633,7 @@ no_NOX: incl %eax /* one more PTP for VAs stolen by bootstrap */ 1: movl %eax,RELOC(nkptp)+1*4 - /* tablesize = (PDP_SIZE + UPAGES + nkptp) << PGSHIFT; */ + /* tablesize = (PDP_SIZE + UPAGES + nkptp[1]) << PGSHIFT; */ addl $(PDP_SIZE+UPAGES),%eax #ifdef PAE incl %eax /* one more page for L3 */ @@ -657,7 +643,8 @@ no_NOX: #endif movl %eax,RELOC(tablesize) - /* Ensure that nkptp covers BOOTSTRAP TABLES. */ + /* Ensure that nkptp[1] covers BOOTSTRAP TABLES, ie: + * (esi + tablesize) >> L2_SHIFT + 1 < nkptp[1] */ addl %esi,%eax addl $~L2_FRAME,%eax shrl $L2_SHIFT,%eax @@ -685,15 +672,12 @@ no_NOX: leal (PROC0_PTP1_OFF)(%esi),%ebx /* Skip the first MB. */ - movl $(KERNTEXTOFF - KERNBASE),%eax - movl %eax,%ecx - shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # PDEs */ -#ifdef PAE - shll $1,%ecx /* PDEs are twice larger with PAE */ -#endif - addl %ecx,%ebx + movl $(KERNTEXTOFF - KERNBASE),%ecx + shrl $PGSHIFT,%ecx + fillkpt_blank /* Map the kernel text RX. */ + movl $(KERNTEXTOFF - KERNBASE),%eax /* start of TEXT */ movl $RELOC(__rodata_start),%ecx subl %eax,%ecx shrl $PGSHIFT,%ecx @@ -716,26 +700,27 @@ no_NOX: orl $(PG_V|PG_KW),%eax fillkpt_nox - /* - * We actually have to be careful here. The memory layout is as - * follows: - * +----------+---------------------+------------------+ - * | DATA+BSS < [PRELOADED MODULES] | BOOTSTRAP TABLES > - * +----------+---------------------+------------------+ - * We just map everything from < to > with RWX rights. - */ + /* Map [SYMS]+[PRELOADED MODULES] RW. */ movl $RELOC(__kernel_end),%eax movl %esi,%ecx /* start of BOOTSTRAP TABLES */ - addl RELOC(tablesize),%ecx /* end of BOOTSTRAP TABLES */ - subl %eax,%ecx /* subtract end of kernel image */ + subl %eax,%ecx shrl $PGSHIFT,%ecx orl $(PG_V|PG_KW),%eax - fillkpt + fillkpt_nox - /* Map ISA I/O mem (later atdevbase) */ - movl $(IOM_BEGIN|PG_V|PG_KW/*|PG_N*/),%eax - movl $(IOM_SIZE>>PGSHIFT),%ecx - fillkpt + /* Map the BOOTSTRAP TABLES RW. */ + movl %esi,%eax /* start of BOOTSTRAP TABLES */ + movl RELOC(tablesize),%ecx /* length of BOOTSTRAP TABLES */ + shrl $PGSHIFT,%ecx + orl $(PG_V|PG_KW),%eax + fillkpt_nox + + /* We are on (4). Map ISA I/O MEM RW. */ + movl $IOM_BEGIN,%eax + movl $IOM_SIZE,%ecx /* size of ISA I/O MEM */ + shrl $PGSHIFT,%ecx + orl $(PG_V|PG_KW/*|PG_N*/),%eax + fillkpt_nox /* * Build L2 for identity mapping. Linked to L1. @@ -753,12 +738,12 @@ no_NOX: movl RELOC(nkptp)+1*4,%ecx fillkpt - /* Install a PDE recursively mapping page directory as a page table! */ + /* Install recursive top level PDE */ leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE * PDE_SIZE)(%esi),%ebx leal (PROC0_PDIR_OFF)(%esi),%eax orl $(PG_V|PG_KW),%eax movl $PDP_SIZE,%ecx - fillkpt + fillkpt_nox #ifdef PAE /* @@ -853,7 +838,7 @@ begin: pushl $0 /* init386() expects a 64 bits paddr_t with PAE */ #endif pushl %eax - call _C_LABEL(init386) /* wire 386 chip for unix operation */ + call _C_LABEL(init386) addl $PDE_SIZE,%esp /* pop paddr_t */ addl $NGDT*8,%esp /* pop temporary gdt */ @@ -882,62 +867,67 @@ begin: popfl cld - movl %esp, %ebx /* save start of available space */ - movl $_RELOC(tmpstk),%esp /* bootstrap stack end location */ + + /* + * Xen info: + * - %esp -> stack, *theoretically* the last used page by Xen bootstrap + */ + movl %esp,%ebx + movl $_RELOC(tmpstk),%esp /* Clear BSS. */ xorl %eax,%eax movl $RELOC(__bss_start),%edi movl $RELOC(_end),%ecx subl %edi,%ecx - rep stosb + rep + stosb /* Copy the necessary stuff from start_info structure. */ /* We need to copy shared_info early, so that sti/cli work */ movl $RELOC(start_info_union),%edi movl $128,%ecx - rep movsl + rep + movsl - /* Clear segment registers; always null in proc0. */ + /* Clear segment registers. */ xorl %eax,%eax movw %ax,%fs movw %ax,%gs - decl %eax - movl %eax,RELOC(cpuid_level) xorl %eax,%eax cpuid movl %eax,RELOC(cpuid_level) /* - * Use a temp page. We'll re- add it to uvm(9) once we're - * done using it. + * Use a temporary GDT page. We'll re-add it to uvm(9) once we're done + * using it. */ - movl $RELOC(tmpgdt), %eax + movl $RELOC(tmpgdt),%eax pushl %eax /* start of temporary gdt */ call _C_LABEL(initgdt) addl $4,%esp - call xen_pmap_bootstrap + call xen_locore /* - * First avail returned by xen_pmap_bootstrap in %eax + * The first VA available is returned by xen_locore in %eax. We + * use it as the UAREA, and set up the stack here. */ - movl %eax, %esi; - movl %esi, _C_LABEL(lwp0uarea) - - /* Set up bootstrap stack. */ + movl %eax,%esi + movl %esi,_C_LABEL(lwp0uarea) leal (USPACE-FRAMESIZE)(%eax),%esp xorl %ebp,%ebp /* mark end of frames */ - addl $USPACE, %esi - subl $KERNBASE, %esi /* init386 wants a physical address */ + /* Set first_avail after the DUMMY PAGE (see xen_locore). */ + addl $(USPACE+PAGE_SIZE),%esi + subl $KERNBASE,%esi /* init386 wants a physical address */ #ifdef PAE pushl $0 /* init386() expects a 64 bits paddr_t with PAE */ #endif pushl %esi - call _C_LABEL(init386) /* wire 386 chip for unix operation */ + call _C_LABEL(init386) addl $PDE_SIZE,%esp /* pop paddr_t */ call _C_LABEL(main) #endif /* XEN */ @@ -1077,7 +1067,7 @@ END(dumpsys) /* * struct lwp *cpu_switchto(struct lwp *oldlwp, struct lwp *newlwp, - * bool returning) + * bool returning) * * 1. if (oldlwp != NULL), save its context. * 2. then, restore context of newlwp. @@ -1105,16 +1095,18 @@ ENTRY(cpu_switchto) movl 16(%esp),%esi /* oldlwp */ movl 20(%esp),%edi /* newlwp */ movl 24(%esp),%edx /* returning */ - testl %esi,%esi - jz 1f + + testl %esi,%esi /* oldlwp = NULL ? */ + jz skip_save /* Save old context. */ movl L_PCB(%esi),%eax movl %esp,PCB_ESP(%eax) movl %ebp,PCB_EBP(%eax) +skip_save: /* Switch to newlwp's stack. */ -1: movl L_PCB(%edi),%ebx + movl L_PCB(%edi),%ebx movl PCB_EBP(%ebx),%ebp movl PCB_ESP(%ebx),%esp @@ -1127,33 +1119,33 @@ ENTRY(cpu_switchto) /* Skip the rest if returning to a pinned LWP. */ testl %edx,%edx - jnz 4f + jnz switch_return + /* Switch ring0 stack */ #ifdef XEN pushl %edi call _C_LABEL(i386_switch_context) addl $4,%esp -#else /* !XEN */ - /* Switch ring0 esp */ +#else movl PCB_ESP0(%ebx),%eax movl %eax,CPUVAR(ESP0) -#endif /* !XEN */ +#endif /* Don't bother with the rest if switching to a system process. */ testl $LW_SYSTEM,L_FLAG(%edi) - jnz 4f + jnz switch_return #ifndef XEN /* Restore thread-private %fs/%gs descriptors. */ movl CPUVAR(GDT),%ecx - movl PCB_FSD(%ebx), %eax - movl PCB_FSD+4(%ebx), %edx - movl %eax, (GUFS_SEL*8)(%ecx) - movl %edx, (GUFS_SEL*8+4)(%ecx) - movl PCB_GSD(%ebx), %eax - movl PCB_GSD+4(%ebx), %edx - movl %eax, (GUGS_SEL*8)(%ecx) - movl %edx, (GUGS_SEL*8+4)(%ecx) + movl PCB_FSD(%ebx),%eax + movl PCB_FSD+4(%ebx),%edx + movl %eax,(GUFS_SEL*8)(%ecx) + movl %edx,(GUFS_SEL*8+4)(%ecx) + movl PCB_GSD(%ebx),%eax + movl PCB_GSD+4(%ebx),%edx + movl %eax,(GUGS_SEL*8)(%ecx) + movl %edx,(GUGS_SEL*8+4)(%ecx) #endif /* !XEN */ /* Switch I/O bitmap */ @@ -1166,14 +1158,25 @@ ENTRY(cpu_switchto) /* Is this process using RAS (restartable atomic sequences)? */ movl L_PROC(%edi),%eax cmpl $0,P_RASLIST(%eax) - jne 5f + je no_RAS + + /* Handle restartable atomic sequences (RAS). */ + movl L_MD_REGS(%edi),%ecx + pushl TF_EIP(%ecx) + pushl %eax + call _C_LABEL(ras_lookup) + addl $8,%esp + cmpl $-1,%eax + je no_RAS + movl L_MD_REGS(%edi),%ecx + movl %eax,TF_EIP(%ecx) +no_RAS: /* * Restore cr0 (including FPU state). Raise the IPL to IPL_HIGH. * FPU IPIs can alter the LWP's saved cr0. Dropping the priority * is deferred until mi_switch(), when cpu_switchto() returns. */ -2: #ifdef XEN pushl %edi call _C_LABEL(i386_tls_switch) @@ -1188,34 +1191,24 @@ ENTRY(cpu_switchto) * set CR0_TS so we'll trap rather than reuse bogus state. */ cmpl CPUVAR(FPCURLWP),%edi - je 3f + je skip_TS orl $CR0_TS,%ecx +skip_TS: /* Reloading CR0 is very expensive - avoid if possible. */ -3: cmpl %edx,%ecx - je 4f + cmpl %edx,%ecx + je switch_return movl %ecx,%cr0 #endif /* !XEN */ +switch_return: /* Return to the new LWP, returning 'oldlwp' in %eax. */ -4: movl %esi,%eax + movl %esi,%eax popl %edi popl %esi popl %ebx ret - /* Check for restartable atomic sequences (RAS). */ -5: movl L_MD_REGS(%edi),%ecx - pushl TF_EIP(%ecx) - pushl %eax - call _C_LABEL(ras_lookup) - addl $8,%esp - cmpl $-1,%eax - je 2b - movl L_MD_REGS(%edi),%ecx - movl %eax,TF_EIP(%ecx) - jmp 2b - .Lcopy_iobitmap: /* Copy I/O bitmap. */ incl _C_LABEL(pmap_iobmp_evcnt)+EV_COUNT