version 1.116, 2016/05/12 06:45:16 |
version 1.117, 2016/05/13 14:03:00 |
Line 340 _C_LABEL(Multiboot_Header): |
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Line 340 _C_LABEL(Multiboot_Header): |
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1: |
1: |
/* |
/* |
* At this point, we know that a NetBSD-specific boot loader |
* At this point, we know that a NetBSD-specific boot loader |
* booted this kernel. The stack carries the following parameters: |
* booted this kernel. |
* (boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem), |
* |
* 4 bytes each. |
* Load parameters from the stack (32 bits): |
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* boothowto, [bootdev], bootinfo, esym, biosextmem, biosbasemem |
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* We are not interested in 'bootdev'. |
*/ |
*/ |
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addl $4,%esp /* Discard return address to boot loader */ |
addl $4,%esp /* Discard return address to boot loader */ |
call _C_LABEL(native_loader) |
call _C_LABEL(native_loader) |
addl $24,%esp |
addl $24,%esp |
Line 537 try586: /* Use the `cpuid' instruction. |
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Line 540 try586: /* Use the `cpuid' instruction. |
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movl $_RELOC(tmpstk),%esp |
movl $_RELOC(tmpstk),%esp |
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/* |
/* |
* Virtual address space of kernel, without PAE. The page dir is 1 page long. |
* There are two different layouts possible, depending on whether PAE is |
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* enabled or not. |
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* |
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* If PAE is not enabled, there are two levels of pages: PD -> PT. They will |
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* be referred to as: L2 -> L1. L2 is 1 page long. The BOOTSTRAP TABLES have |
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* the following layout: |
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* +-----+------------+----+ |
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* | L2 -> PROC0 STK -> L1 | |
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* +-----+------------+----+ |
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* |
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* If PAE is enabled, there are three levels of pages: PDP -> PD -> PT. They |
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* will be referred to as: L3 -> L2 -> L1. L3 is 1 page long, L2 is 4 page |
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* long. The BOOTSTRAP TABLES have the following layout: |
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* +-----+-----+------------+----+ |
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* | L3 -> L2 -> PROC0 STK -> L1 | |
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* +-----+-----+------------+----+ |
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* |
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* Virtual address space of the kernel in both cases: |
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* +------+--------+------+-----+--------+---------------------+----------- |
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* | TEXT | RODATA | DATA | BSS | [SYMS] | [PRELOADED MODULES] | BOOTSTRAP |
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* +------+--------+------+-----+--------+---------------------+----------- |
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* (1) (2) (3) |
* |
* |
* text | data | bss | [syms] | [blobs] | page dir | proc0 kstack | L1 ptp |
* -------+------------+ |
* 0 1 2 3 |
* TABLES | ISA IO MEM | |
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* -------+------------+ |
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* (4) |
* |
* |
* Virtual address space of kernel, with PAE. We need 4 pages for the page dir |
* PROC0 STK is obviously not linked as a page level. It just happens to be |
* and 1 page for the L3. |
* caught between L2 and L1. |
* text | data | bss | [syms] | [blobs] | L3 | page dir | proc0 kstack | L1 ptp |
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* 0 1 5 6 7 |
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*/ |
*/ |
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/* Find end of kernel image. */ |
/* Find end of kernel image; brings us on (1). */ |
movl $RELOC(end),%edi |
movl $RELOC(end),%edi |
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#if (NKSYMS || defined(DDB) || defined(MODULAR)) && !defined(makeoptions_COPY_SYMTAB) |
#if (NKSYMS || defined(DDB) || defined(MODULAR)) && !defined(makeoptions_COPY_SYMTAB) |
/* Save the symbols (if loaded). */ |
/* Save the symbols (if loaded); brinds us on (2). */ |
movl RELOC(esym),%eax |
movl RELOC(esym),%eax |
testl %eax,%eax |
testl %eax,%eax |
jz 1f |
jz 1f |
Line 561 try586: /* Use the `cpuid' instruction. |
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Line 585 try586: /* Use the `cpuid' instruction. |
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1: |
1: |
#endif |
#endif |
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/* Skip over any modules/blobs. */ |
/* Skip over any modules/blobs; brings us on (3). */ |
movl RELOC(eblob),%eax |
movl RELOC(eblob),%eax |
testl %eax,%eax |
testl %eax,%eax |
jz 1f |
jz 1f |
subl $KERNBASE,%eax |
subl $KERNBASE,%eax |
movl %eax,%edi |
movl %eax,%edi |
1: |
1: |
/* Compute sizes */ |
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/* We are on (3). Align up for BOOTSTRAP TABLES. */ |
movl %edi,%esi |
movl %edi,%esi |
addl $PGOFSET,%esi |
addl $PGOFSET,%esi |
andl $~PGOFSET,%esi |
andl $~PGOFSET,%esi |
Line 577 try586: /* Use the `cpuid' instruction. |
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Line 602 try586: /* Use the `cpuid' instruction. |
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movl %esi,%eax |
movl %esi,%eax |
addl $~L2_FRAME,%eax |
addl $~L2_FRAME,%eax |
shrl $L2_SHIFT,%eax |
shrl $L2_SHIFT,%eax |
incl %eax /* one more ptp for VAs stolen by bootstrap */ |
incl %eax /* one more PTP for VAs stolen by bootstrap */ |
1: movl %eax,RELOC(nkptp)+1*4 |
1: movl %eax,RELOC(nkptp)+1*4 |
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/* tablesize = (PDP_SIZE + UPAGES + nkptp) << PGSHIFT; */ |
/* tablesize = (PDP_SIZE + UPAGES + nkptp) << PGSHIFT; */ |
addl $(PDP_SIZE+UPAGES),%eax |
addl $(PDP_SIZE+UPAGES),%eax |
#ifdef PAE |
#ifdef PAE |
incl %eax /* one more page for the L3 PD */ |
incl %eax /* one more page for L3 */ |
shll $PGSHIFT+1,%eax /* PTP tables are twice larger with PAE */ |
shll $PGSHIFT+1,%eax /* PTP tables are twice larger with PAE */ |
#else |
#else |
shll $PGSHIFT,%eax |
shll $PGSHIFT,%eax |
#endif |
#endif |
movl %eax,RELOC(tablesize) |
movl %eax,RELOC(tablesize) |
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/* ensure that nkptp covers bootstrap tables */ |
/* Ensure that nkptp covers BOOTSTRAP TABLES. */ |
addl %esi,%eax |
addl %esi,%eax |
addl $~L2_FRAME,%eax |
addl $~L2_FRAME,%eax |
shrl $L2_SHIFT,%eax |
shrl $L2_SHIFT,%eax |
Line 598 try586: /* Use the `cpuid' instruction. |
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Line 623 try586: /* Use the `cpuid' instruction. |
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cmpl %eax,RELOC(nkptp)+1*4 |
cmpl %eax,RELOC(nkptp)+1*4 |
jnz 1b |
jnz 1b |
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/* Clear tables */ |
/* Now, zero out the BOOTSTRAP TABLES (before filling them in). */ |
movl %esi,%edi |
movl %esi,%edi |
xorl %eax,%eax |
xorl %eax,%eax |
cld |
cld |
movl RELOC(tablesize),%ecx |
movl RELOC(tablesize),%ecx |
shrl $2,%ecx |
shrl $2,%ecx |
rep |
rep |
stosl |
stosl /* copy eax -> edi */ |
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leal (PROC0_PTP1_OFF)(%esi), %ebx |
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/* |
/* |
* Build initial page tables. |
* Build the page tables and levels. We go from L1 to L2/L3, and link the levels |
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* together. Note: RELOC computes &addr - KERNBASE in 32 bits; the value can't |
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* be > 4G, or we can't deal with it anyway, since we are in 32bit mode. |
*/ |
*/ |
/* |
/* |
* Compute &__rodata_start - KERNBASE. This can't be > 4G, |
* Build L1. |
* or we can't deal with it anyway, since we can't load it in |
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* 32 bit mode. So use the bottom 32 bits. |
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*/ |
*/ |
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leal (PROC0_PTP1_OFF)(%esi),%ebx |
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/* Compute &__rodata_start - KERNBASE. */ |
movl $RELOC(__rodata_start),%edx |
movl $RELOC(__rodata_start),%edx |
andl $~PGOFSET,%edx |
andl $~PGOFSET,%edx |
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/* |
/* Skip the first MB. */ |
* Skip the first MB. |
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*/ |
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movl $_RELOC(KERNTEXTOFF),%eax |
movl $_RELOC(KERNTEXTOFF),%eax |
movl %eax,%ecx |
movl %eax,%ecx |
shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # pdes */ |
shrl $(PGSHIFT-2),%ecx /* ((n >> PGSHIFT) << 2) for # PDEs */ |
#ifdef PAE |
#ifdef PAE |
shll $1,%ecx /* pdes are twice larger with PAE */ |
shll $1,%ecx /* PDEs are twice larger with PAE */ |
#endif |
#endif |
addl %ecx,%ebx |
addl %ecx,%ebx |
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Line 651 try586: /* Use the `cpuid' instruction. |
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Line 675 try586: /* Use the `cpuid' instruction. |
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movl $(IOM_SIZE>>PGSHIFT),%ecx |
movl $(IOM_SIZE>>PGSHIFT),%ecx |
fillkpt |
fillkpt |
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/* |
/* |
* Construct a page table directory. |
* Build L2 for identity mapping. Linked to L1. |
*/ |
*/ |
/* Set up top level entries for identity mapping */ |
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leal (PROC0_PDIR_OFF)(%esi),%ebx |
leal (PROC0_PDIR_OFF)(%esi),%ebx |
leal (PROC0_PTP1_OFF)(%esi),%eax |
leal (PROC0_PTP1_OFF)(%esi),%eax |
orl $(PG_V|PG_KW), %eax |
orl $(PG_V|PG_KW),%eax |
movl RELOC(nkptp)+1*4,%ecx |
movl RELOC(nkptp)+1*4,%ecx |
fillkpt |
fillkpt |
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/* Set up top level entries for actual kernel mapping */ |
/* Set up L2 entries for actual kernel mapping */ |
leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE*PDE_SIZE)(%esi),%ebx |
leal (PROC0_PDIR_OFF + L2_SLOT_KERNBASE * PDE_SIZE)(%esi),%ebx |
leal (PROC0_PTP1_OFF)(%esi),%eax |
leal (PROC0_PTP1_OFF)(%esi),%eax |
orl $(PG_V|PG_KW), %eax |
orl $(PG_V|PG_KW),%eax |
movl RELOC(nkptp)+1*4,%ecx |
movl RELOC(nkptp)+1*4,%ecx |
fillkpt |
fillkpt |
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/* Install a PDE recursively mapping page directory as a page table! */ |
/* Install a PDE recursively mapping page directory as a page table! */ |
leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE*PDE_SIZE)(%esi),%ebx |
leal (PROC0_PDIR_OFF + PDIR_SLOT_PTE * PDE_SIZE)(%esi),%ebx |
leal (PROC0_PDIR_OFF)(%esi),%eax |
leal (PROC0_PDIR_OFF)(%esi),%eax |
orl $(PG_V|PG_KW),%eax |
orl $(PG_V|PG_KW),%eax |
movl $PDP_SIZE,%ecx |
movl $PDP_SIZE,%ecx |
fillkpt |
fillkpt |
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#ifdef PAE |
#ifdef PAE |
/* Fill in proc0 L3 page with entries pointing to the page dirs */ |
/* |
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* Build L3. Linked to L2. |
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*/ |
leal (PROC0_L3_OFF)(%esi),%ebx |
leal (PROC0_L3_OFF)(%esi),%ebx |
leal (PROC0_PDIR_OFF)(%esi),%eax |
leal (PROC0_PDIR_OFF)(%esi),%eax |
orl $(PG_V),%eax |
orl $(PG_V),%eax |
Line 689 try586: /* Use the `cpuid' instruction. |
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Line 714 try586: /* Use the `cpuid' instruction. |
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movl %eax,%cr4 |
movl %eax,%cr4 |
#endif |
#endif |
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/* Save phys. addr of PDP, for libkvm. */ |
/* Save physical address of L2. */ |
leal (PROC0_PDIR_OFF)(%esi),%eax |
leal (PROC0_PDIR_OFF)(%esi),%eax |
movl %eax,RELOC(PDPpaddr) |
movl %eax,RELOC(PDPpaddr) |
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/* |
/* |
* Startup checklist: |
* Startup checklist: |
* 1. Load %cr3 with pointer to PDIR (or L3 PD page for PAE). |
* 1. Load %cr3 with pointer to L2 (or L3 for PAE). |
*/ |
*/ |
movl %esi,%eax /* phys address of PTD in proc0 */ |
movl %esi,%eax |
movl %eax,%cr3 /* load PTD addr into MMU */ |
movl %eax,%cr3 |
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/* |
/* |
* 2. Enable paging and the rest of it. |
* 2. Enable paging and the rest of it. |
Line 712 try586: /* Use the `cpuid' instruction. |
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Line 737 try586: /* Use the `cpuid' instruction. |
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begin: |
begin: |
/* |
/* |
* We have arrived. |
* We have arrived. There's no need anymore for the identity mapping in |
* There's no need anymore for the identity mapping in low |
* low memory, remove it. |
* memory, remove it. |
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*/ |
*/ |
movl _C_LABEL(nkptp)+1*4,%ecx |
movl _C_LABEL(nkptp)+1*4,%ecx |
leal (PROC0_PDIR_OFF)(%esi),%ebx /* old, phys address of PDIR */ |
leal (PROC0_PDIR_OFF)(%esi),%ebx /* old, phys address of PDIR */ |