Annotation of src/sys/arch/i386/i386/i386func.S, Revision 1.3.6.2
1.3.6.1 mjf 1: /* $NetBSD$ */
1.1 ad 2:
3: /*-
1.3.6.1 mjf 4: * Copyright (c) 1998, 2007, 2008 The NetBSD Foundation, Inc.
1.1 ad 5: * All rights reserved.
6: *
7: * This code is derived from software contributed to The NetBSD Foundation
8: * by Charles M. Hannum, and by Andrew Doran.
9: *
10: * Redistribution and use in source and binary forms, with or without
11: * modification, are permitted provided that the following conditions
12: * are met:
13: * 1. Redistributions of source code must retain the above copyright
14: * notice, this list of conditions and the following disclaimer.
15: * 2. Redistributions in binary form must reproduce the above copyright
16: * notice, this list of conditions and the following disclaimer in the
17: * documentation and/or other materials provided with the distribution.
18: *
19: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29: * POSSIBILITY OF SUCH DAMAGE.
30: */
31:
32: /*
33: * Functions to provide access to i386-specific instructions.
34: *
35: * These are _not_ shared with NetBSD/xen.
36: */
37:
38: #include <machine/asm.h>
1.3 lukem 39: __KERNEL_RCSID(0, "$NetBSD$");
40:
1.1 ad 41: #include <machine/specialreg.h>
42: #include <machine/segments.h>
43:
44: #include "assym.h"
45:
1.2 ad 46: ENTRY(invlpg)
1.1 ad 47: movl 4(%esp), %eax
48: invlpg (%eax)
49: ret
1.3.6.2 ! mjf 50: END(invlpg)
1.1 ad 51:
1.2 ad 52: ENTRY(lldt)
1.1 ad 53: movl 4(%esp), %eax
1.3.6.2 ! mjf 54: cmpl %eax, CPUVAR(CURLDT)
! 55: jne 1f
! 56: ret
! 57: 1:
! 58: movl %eax, CPUVAR(CURLDT)
1.1 ad 59: lldt %ax
60: ret
1.3.6.2 ! mjf 61: END(lldt)
1.1 ad 62:
1.2 ad 63: ENTRY(ltr)
1.1 ad 64: movl 4(%esp), %eax
65: ltr %ax
66: ret
1.3.6.2 ! mjf 67: END(ltr)
1.1 ad 68:
1.2 ad 69: ENTRY(lcr0)
1.1 ad 70: movl 4(%esp), %eax
71: movl %eax, %cr0
72: ret
1.3.6.2 ! mjf 73: END(lcr0)
1.1 ad 74:
1.2 ad 75: ENTRY(rcr0)
1.1 ad 76: movl %cr0, %eax
77: ret
1.3.6.2 ! mjf 78: END(rcr0)
1.1 ad 79:
1.2 ad 80: ENTRY(lcr3)
1.1 ad 81: movl 4(%esp), %eax
82: movl %eax, %cr3
83: ret
1.3.6.2 ! mjf 84: END(lcr3)
1.1 ad 85:
86: /*
87: * Big hammer: flush all TLB entries, including ones from PTE's
88: * with the G bit set. This should only be necessary if TLB
89: * shootdown falls far behind.
90: *
91: * Intel Architecture Software Developer's Manual, Volume 3,
92: * System Programming, section 9.10, "Invalidating the
93: * Translation Lookaside Buffers (TLBS)":
94: * "The following operations invalidate all TLB entries, irrespective
95: * of the setting of the G flag:
96: * ...
97: * "(P6 family processors only): Writing to control register CR4 to
98: * modify the PSE, PGE, or PAE flag."
99: *
100: * (the alternatives not quoted above are not an option here.)
101: *
102: * If PGE is not in use, we reload CR3 for the benefit of
103: * pre-P6-family processors.
104: */
1.2 ad 105: ENTRY(tlbflushg)
1.1 ad 106: testl $CPUID_PGE, _C_LABEL(cpu_feature)
107: jz 1f
108: movl %cr4, %eax
109: movl %eax, %edx
110: andl $~CR4_PGE, %edx
111: movl %edx, %cr4
112: movl %eax, %cr4
113: ret
1.3.6.2 ! mjf 114: END(tlbflushg)
1.1 ad 115:
1.2 ad 116: ENTRY(tlbflush)
1.1 ad 117: 1:
118: movl %cr3, %eax
119: movl %eax, %cr3
120: ret
1.3.6.2 ! mjf 121: END(tlbflush)
1.1 ad 122:
1.2 ad 123: ENTRY(ldr6)
1.1 ad 124: movl 4(%esp), %eax
125: movl %eax, %dr6
126: ret
1.3.6.2 ! mjf 127: END(ldr6)
1.1 ad 128:
1.2 ad 129: ENTRY(rdr6)
1.1 ad 130: movl %dr6, %eax
131: ret
1.3.6.2 ! mjf 132: END(rdr6)
1.1 ad 133:
1.2 ad 134: ENTRY(rcr2)
1.1 ad 135: movl %cr2, %eax
136: ret
1.3.6.2 ! mjf 137: END(rcr2)
! 138:
! 139: ENTRY(lcr2)
! 140: movl 4(%esp), %eax
! 141: movl %eax, %cr2
! 142: ret
! 143: END(lcr2)
1.1 ad 144:
1.2 ad 145: ENTRY(wbinvd)
1.1 ad 146: wbinvd
147: ret
1.3.6.2 ! mjf 148: END(wbinvd)
1.1 ad 149:
1.3.6.2 ! mjf 150: ENTRY(x86_disable_intr)
1.1 ad 151: cli
152: ret
1.3.6.2 ! mjf 153: END(x86_disable_intr)
1.1 ad 154:
1.3.6.2 ! mjf 155: ENTRY(x86_enable_intr)
1.1 ad 156: sti
157: ret
1.3.6.2 ! mjf 158: END(x86_enable_intr)
1.1 ad 159:
160: /*
161: * void lgdt(struct region_descriptor *rdp);
162: *
163: * Load a new GDT pointer (and do any necessary cleanup).
164: * XXX It's somewhat questionable whether reloading all the segment registers
165: * is necessary, since the actual descriptor data is not changed except by
166: * process creation and exit, both of which clean up via task switches. OTOH,
167: * this only happens at run time when the GDT is resized.
168: */
1.2 ad 169: ENTRY(lgdt)
1.1 ad 170: /* Reload the descriptor table. */
171: movl 4(%esp), %eax
172: lgdt (%eax)
173: /* Flush the prefetch queue. */
174: jmp 1f
175: nop
176: 1: /* Reload "stale" selectors. */
177: movl $GSEL(GDATA_SEL, SEL_KPL), %eax
178: movl %eax, %ds
179: movl %eax, %es
180: movl %eax, %gs
181: movl %eax, %ss
182: movl $GSEL(GCPU_SEL, SEL_KPL), %eax
183: movl %eax, %fs
184: jmp _C_LABEL(x86_flush)
1.3.6.2 ! mjf 185: END(lgdt)
1.3.6.1 mjf 186:
187: ENTRY(tsc_get_timecount)
1.3.6.2 ! mjf 188: movl CPUVAR(CURLWP), %ecx
1.3.6.1 mjf 189: 1:
1.3.6.2 ! mjf 190: pushl L_NCSW(%ecx)
! 191: rdtsc
! 192: addl CPUVAR(CC_SKEW), %eax
! 193: popl %edx
! 194: cmpl %edx, L_NCSW(%ecx)
! 195: jne 2f
1.3.6.1 mjf 196: ret
197: 2:
198: jmp 1b
1.3.6.2 ! mjf 199: END(tsc_get_timecount)
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