Annotation of src/sys/arch/i386/eisa/eisa_machdep.c, Revision 1.19.2.2
1.19.2.1 skrll 1: /* $NetBSD: eisa_machdep.c,v 1.22 2004/04/22 00:34:52 itojun Exp $ */
1.6 thorpej 2:
3: /*-
1.7 thorpej 4: * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
1.6 thorpej 5: * All rights reserved.
6: *
7: * This code is derived from software contributed to The NetBSD Foundation
8: * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9: * NASA Ames Research Center.
10: *
11: * Redistribution and use in source and binary forms, with or without
12: * modification, are permitted provided that the following conditions
13: * are met:
14: * 1. Redistributions of source code must retain the above copyright
15: * notice, this list of conditions and the following disclaimer.
16: * 2. Redistributions in binary form must reproduce the above copyright
17: * notice, this list of conditions and the following disclaimer in the
18: * documentation and/or other materials provided with the distribution.
19: * 3. All advertising materials mentioning features or use of this software
20: * must display the following acknowledgement:
21: * This product includes software developed by the NetBSD
22: * Foundation, Inc. and its contributors.
23: * 4. Neither the name of The NetBSD Foundation nor the names of its
24: * contributors may be used to endorse or promote products derived
25: * from this software without specific prior written permission.
26: *
27: * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28: * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29: * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30: * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31: * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32: * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33: * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34: * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35: * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36: * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37: * POSSIBILITY OF SUCH DAMAGE.
38: */
1.1 cgd 39:
40: /*
41: * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
42: *
43: * Redistribution and use in source and binary forms, with or without
44: * modification, are permitted provided that the following conditions
45: * are met:
46: * 1. Redistributions of source code must retain the above copyright
47: * notice, this list of conditions and the following disclaimer.
48: * 2. Redistributions in binary form must reproduce the above copyright
49: * notice, this list of conditions and the following disclaimer in the
50: * documentation and/or other materials provided with the distribution.
51: * 3. All advertising materials mentioning features or use of this software
52: * must display the following acknowledgement:
53: * This product includes software developed by Christopher G. Demetriou
54: * for the NetBSD Project.
55: * 4. The name of the author may not be used to endorse or promote products
56: * derived from this software without specific prior written permission
57: *
58: * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
59: * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60: * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61: * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
62: * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
63: * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
64: * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
65: * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
66: * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
67: * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68: */
69:
70: /*
71: * Machine-specific functions for EISA autoconfiguration.
72: */
1.14 lukem 73:
74: #include <sys/cdefs.h>
1.19.2.1 skrll 75: __KERNEL_RCSID(0, "$NetBSD: eisa_machdep.c,v 1.22 2004/04/22 00:34:52 itojun Exp $");
1.16 fvdl 76:
77: #include "ioapic.h"
1.1 cgd 78:
79: #include <sys/types.h>
80: #include <sys/param.h>
81: #include <sys/time.h>
82: #include <sys/systm.h>
83: #include <sys/errno.h>
84: #include <sys/device.h>
1.5 thorpej 85: #include <sys/extent.h>
1.1 cgd 86:
1.18 fvdl 87: #define _X86_BUS_DMA_PRIVATE
1.6 thorpej 88: #include <machine/bus.h>
89:
1.5 thorpej 90: #include <dev/isa/isareg.h>
1.1 cgd 91: #include <dev/isa/isavar.h>
92: #include <dev/eisa/eisavar.h>
93:
1.16 fvdl 94: #if NIOAPIC > 0
95: #include <machine/i82093var.h>
96: #include <machine/mpbiosvar.h>
97: #endif
98:
1.6 thorpej 99: /*
100: * EISA doesn't have any special needs; just use the generic versions
101: * of these funcions.
102: */
1.18 fvdl 103: struct x86_bus_dma_tag eisa_bus_dma_tag = {
1.10 thorpej 104: 0, /* _bounce_thresh */
1.19 fvdl 105: 0, /* _bounce_alloc_lo */
106: 0, /* _bounce_alloc_hi */
107: NULL, /* _may_bounce */
1.6 thorpej 108: _bus_dmamap_create,
109: _bus_dmamap_destroy,
110: _bus_dmamap_load,
111: _bus_dmamap_load_mbuf,
112: _bus_dmamap_load_uio,
113: _bus_dmamap_load_raw,
114: _bus_dmamap_unload,
115: NULL, /* _dmamap_sync */
116: _bus_dmamem_alloc,
117: _bus_dmamem_free,
118: _bus_dmamem_map,
119: _bus_dmamem_unmap,
120: _bus_dmamem_mmap,
121: };
122:
1.1 cgd 123: void
124: eisa_attach_hook(parent, self, eba)
125: struct device *parent, *self;
126: struct eisabus_attach_args *eba;
127: {
1.7 thorpej 128: extern int eisa_has_been_seen;
1.1 cgd 129:
1.7 thorpej 130: /*
1.8 thorpej 131: * Notify others that might need to know that the EISA bus
1.7 thorpej 132: * has now been attached.
133: */
134: if (eisa_has_been_seen)
135: panic("eisaattach: EISA bus already seen!");
136: eisa_has_been_seen = 1;
1.1 cgd 137: }
138:
139: int
140: eisa_maxslots(ec)
141: eisa_chipset_tag_t ec;
142: {
143:
144: /*
145: * Always try 16 slots.
146: */
147: return (16);
148: }
149:
150: int
151: eisa_intr_map(ec, irq, ihp)
152: eisa_chipset_tag_t ec;
153: u_int irq;
154: eisa_intr_handle_t *ihp;
155: {
1.17 fvdl 156: if (irq >= NUM_LEGACY_IRQS) {
1.4 christos 157: printf("eisa_intr_map: bad IRQ %d\n", irq);
1.1 cgd 158: *ihp = -1;
159: return 1;
160: }
161: if (irq == 2) {
1.4 christos 162: printf("eisa_intr_map: changed IRQ 2 to IRQ 9\n");
1.1 cgd 163: irq = 9;
164: }
165:
1.16 fvdl 166: #if NIOAPIC > 0
1.17 fvdl 167:
1.16 fvdl 168: if (mp_busses != NULL) {
1.17 fvdl 169: if (intr_find_mpmapping(mp_eisa_bus, irq, ihp) == 0 ||
170: intr_find_mpmapping(mp_isa_bus, irq, ihp) == 0) {
171: *ihp |= irq;
172: return 0;
173: } else
174: printf("eisa_intr_map: no MP mapping found\n");
1.16 fvdl 175: }
1.17 fvdl 176: printf("eisa_intr_map: no MP mapping found\n");
1.16 fvdl 177: #endif
178:
1.1 cgd 179: *ihp = irq;
180: return 0;
181: }
182:
183: const char *
184: eisa_intr_string(ec, ih)
185: eisa_chipset_tag_t ec;
186: eisa_intr_handle_t ih;
187: {
188: static char irqstr[8]; /* 4 + 2 + NULL + sanity */
189:
1.17 fvdl 190: if (ih == 0 || (ih & 0xff) >= NUM_LEGACY_IRQS || ih == 2)
1.15 provos 191: panic("eisa_intr_string: bogus handle 0x%x", ih);
1.1 cgd 192:
1.16 fvdl 193: #if NIOAPIC > 0
194: if (ih & APIC_INT_VIA_APIC)
1.19.2.1 skrll 195: snprintf(irqstr, sizeof(irqstr), "apic %d int %d (irq %d)",
1.16 fvdl 196: APIC_IRQ_APIC(ih),
197: APIC_IRQ_PIN(ih),
198: ih&0xff);
199: else
1.19.2.1 skrll 200: snprintf(irqstr, sizeof(irqstr), "irq %d", ih&0xff);
1.16 fvdl 201: #else
1.19.2.1 skrll 202: snprintf(irqstr, sizeof(irqstr), "irq %d", ih);
1.16 fvdl 203: #endif
1.1 cgd 204: return (irqstr);
205:
1.11 cgd 206: }
207:
208: const struct evcnt *
209: eisa_intr_evcnt(eisa_chipset_tag_t ec, eisa_intr_handle_t ih)
210: {
211:
212: /* XXX for now, no evcnt parent reported */
213: return NULL;
1.1 cgd 214: }
215:
216: void *
217: eisa_intr_establish(ec, ih, type, level, func, arg)
218: eisa_chipset_tag_t ec;
219: eisa_intr_handle_t ih;
220: int type, level, (*func) __P((void *));
221: void *arg;
222: {
1.17 fvdl 223: int pin, irq;
224: struct pic *pic;
225:
226: pic = &i8259_pic;
227: pin = irq = ih;
228:
1.16 fvdl 229: #if NIOAPIC > 0
1.17 fvdl 230: if (ih & APIC_INT_VIA_APIC) {
231: pic = (struct pic *)ioapic_find(APIC_IRQ_APIC(ih));
232: if (pic == NULL) {
233: printf("eisa_intr_establish: bad ioapic %d\n",
234: APIC_IRQ_APIC(ih));
235: return NULL;
1.16 fvdl 236: }
1.17 fvdl 237: pin = APIC_IRQ_PIN(ih);
238: irq = APIC_IRQ_LEGACY_IRQ(ih);
239: if (irq < 0 || irq >= NUM_LEGACY_IRQS)
240: irq = -1;
241: }
1.16 fvdl 242: #endif
1.1 cgd 243:
1.17 fvdl 244: return intr_establish(irq, pic, pin, type, level, func, arg);
1.1 cgd 245: }
246:
247: void
248: eisa_intr_disestablish(ec, cookie)
249: eisa_chipset_tag_t ec;
250: void *cookie;
251: {
252:
1.17 fvdl 253: intr_disestablish(cookie);
1.5 thorpej 254: }
255:
256: int
257: eisa_mem_alloc(t, size, align, boundary, cacheable, addrp, bahp)
258: bus_space_tag_t t;
259: bus_size_t size, align;
260: bus_addr_t boundary;
261: int cacheable;
262: bus_addr_t *addrp;
263: bus_space_handle_t *bahp;
264: {
265: extern struct extent *iomem_ex;
266:
267: /*
268: * Allocate physical address space after the ISA hole.
269: */
270: return bus_space_alloc(t, IOM_END, iomem_ex->ex_end, size, align,
271: boundary, cacheable, addrp, bahp);
272: }
273:
274: void
275: eisa_mem_free(t, bah, size)
276: bus_space_tag_t t;
277: bus_space_handle_t bah;
278: bus_size_t size;
279: {
280:
281: bus_space_free(t, bah, size);
1.12 thorpej 282: }
283:
284: int
285: eisa_conf_read_mem(ec, slot, func, entry, ecm)
286: eisa_chipset_tag_t ec;
287: int slot, func, entry;
288: struct eisa_cfg_mem *ecm;
289: {
290:
291: /* XXX XXX XXX */
292: return (ENOENT);
293: }
294:
295: int
296: eisa_conf_read_irq(ec, slot, func, entry, eci)
297: eisa_chipset_tag_t ec;
298: int slot, func, entry;
299: struct eisa_cfg_irq *eci;
300: {
301:
302: /* XXX XXX XXX */
303: return (ENOENT);
304: }
305:
306: int
307: eisa_conf_read_dma(ec, slot, func, entry, ecd)
308: eisa_chipset_tag_t ec;
309: int slot, func, entry;
310: struct eisa_cfg_dma *ecd;
311: {
312:
313: /* XXX XXX XXX */
314: return (ENOENT);
315: }
316:
317: int
318: eisa_conf_read_io(ec, slot, func, entry, ecio)
319: eisa_chipset_tag_t ec;
320: int slot, func, entry;
321: struct eisa_cfg_io *ecio;
322: {
323:
324: /* XXX XXX XXX */
325: return (ENOENT);
1.1 cgd 326: }
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